📄 displayport.c
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//--------------------------------------------------
// Description : DP initial !!
// Input Value : None
// Output Value :
//--------------------------------------------------
void CDpInitial(void)
{
#if(_MCU_TYPE == _REALTEK_EMBEDDED)
CScalerPageSelect(_PAGEC);
CScalerSetByte(_PC_AUX_IIC_SET_D1,0x06); //eagleeyes-20080401-0x00(old)-new for CTS
#else //external MCU
CScalerPageSelect(_PAGEC);
#if(_EMBEDDED_EDID==_ON)
CScalerSetByte(_PC_AUX_IIC_SET_D1,0x06); //eagleeyes-20080401-0x00(old)-new for CTS
CScalerPageSelect(_PAGED);
CScalerSetByte(_PD_DVI_DCC_ENABLE_BE,0x00);
CScalerSetByte(0xd3,0x00);
CScalerPageSelect(_PAGED);
CScalerSetByte(0xCC,0x01);
CScalerSetByte(_PD_DVI_DCC_ENABLE_BE,0x01);
#endif
CScalerPageSelect(_PAGEE);
CScalerSetByte(0xE4,0x1f); //pinshare
CScalerSetByte(0xE5,0x1f);
CScalerPageSelect(_PAGEB);
CScalerSetByte(_PB_DP_AUX_01_B8,0x63); //phy_AUX_SWING
CScalerSetByte(_PB_DP_AUX_02_B9,0x05); //0xA5, //debug-eagle-20080117
CScalerSetByte(_PB_DIG02_E2,0x00);
CScalerSetByte(_PB_DIG03_E3,0x01); //ming
CScalerSetByte(_PB_DP_AUX_00_B3,0x80); // whhsiao + VERB
CScalerPageSelect(_PAGEC);
CScalerSetByte(_PC_AUX_MODE_SET_D0,0xE3); //eagleeyes-20080401-0xF3
CScalerSetByte(_PC_DP_CTL_A1,0x08);//mac set 1 lane
#endif // End of #if(_MCU_TYPE == _REALTEK_EMBEDDED)
CScalerPageSelect(_PAGEC);
CScalerSetByte(_PC_DP_CTL_A1,0x08);//mac set 1 lane
CScalerPageSelect(_PAGEB);
if(GET_INPUT_PORT(ucSearchIndex) == _D0_INPUT_PORT)
CScalerSetByte(_PB_DP_2D_SWITCH_B5,0x02); // whhsiao VerA/B the same
else if(GET_INPUT_PORT(ucSearchIndex) == _D1_INPUT_PORT)
CScalerSetByte(_PB_DP_2D_SWITCH_B5,0x06); // whhsiao + VerB
CScalerCodeW(tDP_AUX_INITIAL);
CScalerCodeW(tDP_DPCD_TABLE); //load DPCD
CScalerPageSelect(_PAGEC);
CScalerSetByte(_PC_AUX_MODE_SET_D0,0xE3);//eagleeyes-20080401-0xF3
// CScalerCodeW(tDP_DPCD_INITIAL); // whhsiao-20080401
}
//--------------------------------------------------
// Description : DISABLE DP PHY/MAC and AUX channel
// Input Value : None
// Output Value : None
//--------------------------------------------------
void CDpReset(void)
{
CScalerPageSelect(_PAGEB); //DISABLE DP PHY
CScalerSetByte(_PB_DP_PWR_CTL_B4 ,0x00);
CScalerPageSelect(_PAGEC);
CScalerSetByte(_PC_DP_CTL_A1 ,0xc0);
}
//--------------------------------------------------
// Description : Dp interrupt initial
// Input Value : None
// Output Value : None
//--------------------------------------------------
void CDpInterruptInitial(void)
{
CScalerSetByte(_PC_AUX_IIC_SET_D1,0x06); //eagleeyes-20080401-0x00(old)-new for CTS
CScalerSetByte(_PC_DP_CTL_A1,0x08);
CScalerSetByte(_PC_DPCD_CTL_C0,0x00);
CScalerSetByte(_PC_AUX_IRQ_STATUS_EN_DD,0x04);
CScalerSetByte(_PC_AUX_MODE_SET_D0,0xE3); //eagleeyes-20080401-0xF3
CScalerSetByte(_IRQ_CTRL0_04,0x80);
}
//--------------------------------------------------
// Description : Dp hotplug process
// Input Value : None
// Output Value : None
//--------------------------------------------------
void CDpHotPlugProc(BYTE ms)
{
#if(_MCU_TYPE == _REALTEK_EMBEDDED)
#if(_D0_INPUT_PORT_TYPE == _D0_DP_PORT)
D0_HPD_LOW();
CTimerDelayXms(ms);
D0_HPD_HIGH();
#elif(_D1_INPUT_PORT_TYPE == _D1_DP_PORT)
D1_HPD_LOW();
CTimerDelayXms(ms);
D1_HPD_HIGH();
#endif
#else
CScalerPageSelect(_PAGEE);//HPD
CScalerSetByte(_PE_PIN_SHARE_CTRL01_D5,0x1c);
CScalerSetByte(_PE_CEC_CR0_EB,0x90);
CTimerDelayXms(ms); //debug-eagle-20080117 1ms: AMD or 10ms: Quanmdata/unigraf
CScalerSetByte(_PE_CEC_CR0_EB,0xb0);
#endif
}
//--------------------------------------------------
// Description : GET DPCD Attributes After Link Training @ support DPCD Ver1.1
// Input Value : None
// Output Value : ucDisplayPortCtrl
//--------------------------------------------------
void CDpGetDisplayPortControl(void)
{
BYTE xdata buf;
ucDisplayPortCtrl = 0;
//Get DPCD address 0x100
//get link clk rate @ ucDisplayPortCtrl[7]: 1--> 2.7Ghz, 0:1.62Ghz
CScalerSetByteInt(_PAGE_SELECT_9F,_PAGEC);
CScalerSetByteInt(_PC_DPCD_ACCESS_PORT_H_C1 , 0x00);
CScalerSetByteInt(_PC_DPCD_ACCESS_PORT_M_C2 , 0x01);
CScalerSetByteInt(_PC_DPCD_ACCESS_PORT_L_C3 , 0x00);
// CScalerReadInt(_PC_DPCD_DATA_PORT_L_C4, 1, &buf, _NON_AUTOINC);
CScalerReadByteInt(_PC_DPCD_DATA_PORT_L_C4, &buf);
if (buf==0x0A)
SET_DP_HIGH_SPEED_RATE(); //2.7G;
else
CLR_DP_HIGH_SPEED_RATE(); //1.62G;
//Get DPCD address 0x101
//get Lane Count @ ucDisplayPortCtrl[1:0]: 0-->reserved , 1--> 1-lane, 2--> 2-lane, 3--> 4-lane
CScalerSetByteInt(_PC_DPCD_ACCESS_PORT_H_C1 , 0x00);
CScalerSetByteInt(_PC_DPCD_ACCESS_PORT_M_C2 , 0x01);
CScalerSetByteInt(_PC_DPCD_ACCESS_PORT_L_C3 , 0x01);
// CScalerReadInt(_PC_DPCD_DATA_PORT_L_C4, 1, &buf, _NON_AUTOINC);
CScalerReadByteInt(_PC_DPCD_DATA_PORT_L_C4, &buf);
if ( (buf&0x1F)== 0x01 )
SET_DP_ONE_LANE_INPUT(); //1-lane;
else if ( (buf&0x1F)== 0x02 )
SET_DP_TWO_LANE_INPUT(); //2-lane;
else if ( (buf&0x1F)== 0x04 )
SET_DP_FOUR_LANE_INPUT(); //4-lane;
//AK else
//AK ucDisplayPortCtrl &= 0xF8;
//get Enhance Mode @ ucDisplayPortCtrl[2]: 1--> Enhancement mode, 0:non-enhancement mode
if ( (buf&0x80)== 0x80 )
SET_DP_ENHANCEMENT_MODE(); //Enhancement On;
else
CLR_DP_ENHANCEMENT_MODE(); //Enhancement Off;
//Get DPCD address 0x102
//get Scrambling mode @ ucDisplayPortCtrl[3]: 1->scrambling mode , 0--> non-scrambling
CScalerSetByteInt(_PC_DPCD_ACCESS_PORT_H_C1 , 0x00);
CScalerSetByteInt(_PC_DPCD_ACCESS_PORT_M_C2 , 0x01);
CScalerSetByteInt(_PC_DPCD_ACCESS_PORT_L_C3 , 0x02);
// CScalerReadInt(_PC_DPCD_DATA_PORT_L_C4, 1, &buf, _NON_AUTOINC);
CScalerReadByteInt(_PC_DPCD_DATA_PORT_L_C4, &buf);
if ( (buf&0x20)== 0x00 )
SET_DP_SCRAMB_MODE(); //Enable Scrambling;
else
CLR_DP_SCRAMB_MODE(); //Disable Scrambling;
//Get DPCD addres 0x107
//get Down Spreading mode @ ucDisplayPortCtrl[4]: 1->0.5% down spreading , 0--> 0% down spreading
CScalerSetByteInt(_PC_DPCD_ACCESS_PORT_H_C1 , 0x00);
CScalerSetByteInt(_PC_DPCD_ACCESS_PORT_M_C2 , 0x01);
CScalerSetByteInt(_PC_DPCD_ACCESS_PORT_L_C3 , 0x07);
// CScalerReadInt(_PC_DPCD_DATA_PORT_L_C4, 1, &buf, _NON_AUTOINC);
CScalerReadByteInt(_PC_DPCD_DATA_PORT_L_C4, &buf);
if ( (buf&0x10)== 0x10 )
SET_DP_DOWN_SPREADING(); //0.5% Down Spreading;
else
CLR_DP_DOWN_SPREADING(); //0% Down Spreading;
//get Modulation Freq @ ucDisplayPortCtrl[5]: 1->33Khz, 0--> 30Khz
if ( (buf&0x01)== 0x01 )
SET_DP_33KHZ_MODULATION(); //33khz modulation;
else
CLR_DP_33KHZ_MODULATION(); //30Khz Down Spreading;
//Write to 0xC8
CScalerSetByteInt(0xC8, ucDisplayPortCtrl);
// CScalerSetByteInt(0xC8, &ucDisplayPortCtrl);
}
//--------------------------------------------------
// Description : Display Port PHY Stable Check (1.ANSI8B/10B, 2.CDR lock, 3.PHY Stable)
// Input Value : None
// Output Value : TRUE--> Display PHY Stable, False--> Display PHY Fail.
//--------------------------------------------------
bit CDpIsDisplayPortPhyStable(void)
{
CScalerPageSelect(_PAGEC);
if(GET_DP_ONE_LANE_INPUT())
{
CScalerSetByte(_PC_DP_LANE_VALID_A5 ,0x88);
CScalerSetByte(_PC_DP_LANE_LOCK_A6,0x80);
CScalerRead(_PC_DP_LANE_VALID_A5, 2, pData, _AUTOINC);
if(((pData[0]&0x88)==0)&&((pData[1]&0x80)==0 ))
return _TRUE;
else
return _FALSE;
}
if(GET_DP_TWO_LANE_INPUT())
{
CScalerSetByte(_PC_DP_LANE_VALID_A5,0xCC);
CScalerSetByte(_PC_DP_LANE_LOCK_A6,0xC0);
CScalerRead(_PC_DP_LANE_VALID_A5, 2, pData, _AUTOINC);
if(((pData[0]&0xCC)==0)&&((pData[1]&0xC0)==0))
return _TRUE;
else
return _FALSE;
}
if(GET_DP_FOUR_LANE_INPUT())
{
CScalerSetByte(_PC_DP_LANE_VALID_A5,0xFF);
CScalerSetByte(_PC_DP_LANE_LOCK_A6,0xF0);
CScalerRead(_PC_DP_LANE_VALID_A5, 2, pData, _AUTOINC);
if(((pData[0]&0xFF)==0 ) && ( (pData[1]&0xF0)==0 ))
return _TRUE;
else
return _FALSE;
}
}
//--------------------------------------------------
// Description : Display Port Video Stream Check (VBID Bit[3])
// Input Value : None
// Output Value : TRUE--> Video Stream, False--> Idle Pattern.
//--------------------------------------------------
//eagleeyes-20080401
bit CDpIsDisplayPortVideoStream(void)
{
CScalerPageSelect(_PAGEC);
CScalerGetDataPortByte(_PC_DP_ACCESS_PORT_B3, 0x01, 1, pData, _NON_AUTOINC);
if( ( pData[0]&0x08)==0x08 )
return _FALSE;
else
return _TRUE;
}
//--------------------------------------------------
//Description : Detect Phy Speed (High Speed or Low Speed)
//
//
//--------------------------------------------------
/*
void CDpDetectPhySpeed(void)
{
CScalerPageSelect(_PAGEB);
CScalerSetByte(_PB_DP_PWR_CTL_B4,0x00); //disable CMU
CScalerSetByte(_PB_DP_OOBS_SGN_DET_B1,0x32);//test chip only
CScalerSetByte(_PB_DP_ADP_EQ_B2,0x06); //0x16 eagle071221
CScalerSetByte(_PB_DIG00_E0,0xC0);
CScalerSetByte(_PB_DP_RXMISC_02_AF,0x87);
CScalerSetByte(_PB_DP_PWR_CTL_B4,0xff); //0x11 for one lane, 0xff for four lane
}
*/
//--------------------------------------------------
// Description : Get DP Main Stream VsyncFrontPorch Value
// Input Value : None
// Output Value : VsyncFrontPorch=pData[2:0]
//--------------------------------------------------
#if(_FRONT_PORCH_REGENERATOR == _ON)
DWORD CDpGetVsyncFrontPorch(void)
{
DWORD MvidValueData,NvidValueData;
WORD HtotalValueData ,VtotalValueData,VstartValueData,VheightValueData;
DWORD FrontPorchValueData;
CScalerPageSelect(_PAGEC);
CScalerSetDataPortByte(_PC_DP_ACCESS_PORT_B3, 0x00, 0xf8); //pop up parameter
CTimerDelayXms(2);
//get Mvid and Nvid value
CScalerGetDataPortByte(_PC_DP_ACCESS_PORT_B3, 0x16, 3, pData, _NON_AUTOINC);
MvidValueData = ( ((DWORD)pData[0]<<16) | ((DWORD)pData[1]<<8) | ((DWORD)pData[2]<<0) );
CScalerGetDataPortByte(_PC_DP_ACCESS_PORT_B3, 0x19, 3, pData, _NON_AUTOINC);
NvidValueData = ( ((DWORD)pData[0]<<16) | ((DWORD)pData[1]<<8) | ((DWORD)pData[2]<<0) );
//get Htotal
CScalerGetDataPortByte(_PC_DP_ACCESS_PORT_B3, 0x04, 2, pData, _NON_AUTOINC);
HtotalValueData = ( ((WORD)pData[0]<<8) | ((WORD)pData[1]<<0) );
//get Vtotal
CScalerGetDataPortByte(_PC_DP_ACCESS_PORT_B3, 0x01, 1, pData, _NON_AUTOINC);
if ((pData[0]&0x06)==0x06) //Set ODD-Vtotal if interlace-ODD
CScalerGetDataPortByte(_PC_DP_ACCESS_PORT_B3, 0x0E, 2, pData, _NON_AUTOINC);
else //Set Even-Vtotal if interlace-EVEN or progressive
CScalerGetDataPortByte(_PC_DP_ACCESS_PORT_B3, 0x0C, 2, pData, _NON_AUTOINC);
VtotalValueData = ( ((WORD)pData[0]<<8) | ((WORD)pData[1]<<0) );
//get Vstart
CScalerGetDataPortByte(_PC_DP_ACCESS_PORT_B3, 0x10, 2, pData, _NON_AUTOINC);
VstartValueData = ( ((WORD)pData[0]<<8) | ((WORD)pData[1]<<0) );
//get Vheight
CScalerGetDataPortByte(_PC_DP_ACCESS_PORT_B3, 0x12, 2, pData, _NON_AUTOINC);
VheightValueData = ( ((WORD)pData[0]<<8) | ((WORD)pData[1]<<0) );
//calculate FrontPorchValue
FrontPorchValueData = (((DWORD)(VtotalValueData-VheightValueData-VstartValueData)) * (NvidValueData*256/MvidValueData)) * ((DWORD)HtotalValueData)/256;
pData[0]=(FrontPorchValueData>>24);
if (pData[0]==0)
return(FrontPorchValueData);
else
return(0x000002);
}
#endif //End of #if(_FRONT_PORCH_REGENERATOR == _ON)
//--------------------------------------------------
// Description : Get DP Main Stream Attributes
// Input Value : None
// Output Value : None
//--------------------------------------------------
#if(_FRONT_PORCH_REGENERATOR == _ON)
DWORD CDpGetHsyncFrontPorch(void)
{
DWORD MvidValueData,NvidValueData;
WORD HtotalValueData ,HstartValueData,HwidthValueData;
DWORD FrontPorchValueData;
//eagleeyes-20080309
WORD data OffsetLine;
CScalerPageSelect(_PAGEC);
CScalerSetDataPortByte(_PC_DP_ACCESS_PORT_B3, 0x00, 0xf8); //pop up parameter
CTimerDelayXms(2);
//get Mvid and Nvid value
CScalerGetDataPortByte(_PC_DP_ACCESS_PORT_B3, 0x16, 3, pData, _NON_AUTOINC);
MvidValueData = (((DWORD)pData[0]<<16) | ((DWORD)pData[1]<<8) | ((DWORD)pData[2]<<0) );
CScalerGetDataPortByte(_PC_DP_ACCESS_PORT_B3, 0x19, 3, pData, _NON_AUTOINC);
NvidValueData = (((DWORD)pData[0]<<16) | ((DWORD)pData[1]<<8) | ((DWORD)pData[2]<<0) );
//get Htotal
CScalerGetDataPortByte(_PC_DP_ACCESS_PORT_B3, 0x04, 2, pData, _NON_AUTOINC);
HtotalValueData = (((WORD)pData[0]<<8) | ((WORD)pData[1]<<0));
//get Hstart
CScalerGetDataPortByte(_PC_DP_ACCESS_PORT_B3, 0x6, 2, pData, _NON_AUTOINC);
HstartValueData = (((WORD)pData[0]<<8) | ((WORD)pData[1]<<0));
//get Hwidth
CScalerGetDataPortByte(_PC_DP_ACCESS_PORT_B3, 0x8, 2, pData, _NON_AUTOINC);
HwidthValueData = (((WORD)pData[0]<<8) | ((WORD)pData[1]<<0));
CScalerPageSelect(_PAGEC);
CScalerGetDataPortByte(_PC_DP_ACCESS_PORT_B3, 0x02, 1, pData, _NON_AUTOINC);
if(pData[0]&0xE0==0)
pData[1]=6;
else if (pData[0]&0xE0==1)
pData[1]=8;
else if (pData[0]&0xE0==2)
pData[1]=10;
else if (pData[0]&0xE0==3)
pData[1]=12;
else
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