hdmi.c

realtek LCD monitor, TV开发源代码

            freq  = 176400;
            ucAudioRate = 2;
        }
        else if((freq >= 1910) && (freq <= 1930))
        {

            coeff = _AUDIO_MCK_192000;
            freq  = 192000;
            ucAudioRate = 2;
        }
        else
        {

            SET_AVRESUME();
        }

        if(!GET_AVRESUME())
        {

            do
            {
                s = s + 4;
                ((DWORD *)pData)[0] = (DWORD)128 * freq * coeff * s;
            }
          while (((DWORD *)pData)[0] < 180000000);


            // cyyeh 20080331
            // Fa(Audio Freq) = 128 * Fs(Sampling Freq)
            // Fa(Audio Freq) =  Xtal * (M/K/2^O/(2S))
            // Getting :   M  = 128 * Fs * 2^O * 2S * K / Xtal;
            // K=1 , O=1;
            m = (((DWORD *)pData)[0] << o ) / ((DWORD)_RTD_XTAL * 1000); // cyyeh 20080415
            //m = (DWORD)2 * 128 * freq * coeff * s / _RTD_XTAL / 1000;
            //m = (m >> 1) + (m & 0x01);
            m =  m + 1;
            s =  s / (o * 2);

            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_AAPNR_2D, 0x08);  // Disable SDM

            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_MCAPR_11, (m - 2));
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_SCAPR_12, (coeff == _AUDIO_256_TIMES) ? ((s / 2) | 0x80) : (s / 2));

//cyyeh 20080217
//#if(_AUDIO_LOCK_MODE == _HARDWARE_TRACKING)

            // Calculate D code
            ((DWORD *)pData)[1] = (DWORD)1000 * _RTD_XTAL * m / 2;  // PLL freq
            if (((DWORD *)pData)[0] > ((DWORD *)pData)[1])
            {
                a = (((DWORD *)pData)[0] - ((DWORD *)pData)[1]) * 128 / (((DWORD *)pData)[1] / 2048);

                a = 0xffff - a;
            }
            else
            {
                a = (((DWORD *)pData)[1] - ((DWORD *)pData)[0]) * 128 / (((DWORD *)pData)[1] / 2048);

                a += 100; // MUST for compatibility
            }

            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_DCAPR0_13, a >> 8);
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_DCAPR1_14, a & 0xff);
//#endif

//cyyeh 20080710
#if(_SCALER_TYPE == _RTD2472D)
      o = 1;
#elif((_SCALER_TYPE == _RTD2545LR) || (_SCALER_TYPE == _RTD247xRD) || (_SCALER_TYPE == _RTD248xRD))
      o = o + 1;
#else
    No Setting !!
#endif // End of #if(_SCALER_TYPE == _RTD2472D)

            CScalerSetDataPortBit(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_DPCR0_38, ~(_BIT5 | _BIT4), (o << 4));


//Anderson 080130 for New DPLL Start
#if(_SCALER_TYPE == _RTD2472D)
            // Calculate Ich for audio PLL
            pData[0] = (m < 5) ? 0 : ((m / 5) - 1);
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_DPCR1_39, pData[0] | 0x80);

#elif((_SCALER_TYPE == _RTD2545LR) || (_SCALER_TYPE == _RTD247xRD) || (_SCALER_TYPE == _RTD248xRD))//cyyeh 20080611

            // Calculate Ich for audio PLL
//            pData[0] = (m < 1067 / 100) ? 0 : ((m * 100/ 1067) - 1); // cyyeh 20080415

            pData[5] = ((DWORD) m * 4 * 100 / 1067);    // 2bit fractional part
            pData[6] = 0x00;

            if (pData[5] >=10)
                pData[5] -= 10;

            if(pData[5] >= 40)        // 2bit fractional part
            {
                pData[5] -= 40;
                pData[6] |= 0x04;
            }

            if(pData[5] >= 20)        // 2bit fractional part
            {
                pData[5] -= 20;
                pData[6] |= 0x02;
            }

            if(pData[5] >= 10)        // 2bit fractional part
            {
                pData[5] -= 10;
                pData[6]    |= 0x01;
            }
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_DPCR1_39, pData[6] | 0x70);
#else
            No Setting !!
#endif     // End of #if(_SCALER_TYPE == _RTD2472D)

#if(_SCALER_TYPE == _RTD2472D)
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_DPCR3_3B, 0x03); // Enable K and enable VCOSTART
#endif
//Anderson 080130 for New DPLL End

            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_CMCR_10, 0x50);  //Enable Double Buffer for K/M/S/D/O

            CScalerSetDataPortBit(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_DPCR0_38, ~(_BIT7 | _BIT6), 0x00);    // Enable PLL
            CTimerDelayXms(1);

#if(_AUDIO_LOCK_MODE == _HARDWARE_TRACKING)
            do
            {
                CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_AAPNR_2D, 0x00);  // Disable SDM
                CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_AAPNR_2D, 0x02);  // Enable SDM
                CTimerDelayXms(1);
                CScalerGetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_DPCR3_3B + 1, 2, pData, _NON_AUTOINC);
            }
            while((((a >> 8) & 0xff) != pData[0]) || (((a >> 0) & 0xff) != pData[1]));
#endif


            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_AOCR_62, 0x00);//Disable SPDIF/I2S Output
            CAdjustDisableHDMIWatchDog(_WD_SET_AVMUTE_ENABLE);//Disable Set_AVMute Watch Dog
            CScalerSetDataPortBit(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_AVMCR_30, ~_BIT5, _BIT5);//Enable Audio Output
            //CAdjustEnableHDMIWatchDog(_WD_SET_AVMUTE_ENABLE);//Enable Set_AVMute Watch Dog,//yc 20080401 for quntum data

#if(_AUDIO_LOCK_MODE == _HARDWARE_TRACKING)
            //H/W FIFO Tracking
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_PSCR_15, 0x04);//Enable boundary tracking
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_ICBPSR1_25, 0x01);//Set I code
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_PCBPSR1_27, 0x01);//Set P code
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_STBPR_2A, 0x80);//Set Boundary Tracking Update Response Time
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_AAPNR_2D, 0xC2);

            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_FBR_1B, 0xe2);//0xe5 for DVR team ?
            CScalerSetDataPortBit(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_WDCR0_31, ~_BIT5, _BIT5);//Enable FIFO Tracking

            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_CMCR_10, 0x50);//update double buffer

            CScalerSetByte(_P2_HDMI_SR_CB, 0x07);//Write 1 clear

            //Fine tune
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_PSCR_15, 0xEC);//Enable FIFO Trend
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_FTR_1A, 0x03);
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_ICTPSR1_21, 0x07);
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_CMCR_10, 0x50);//Update Double Buffer
#else
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_PSCR_15, 0xfe);//Enable N/CTS tracking
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, 0x1d, 0x05);//Set I code
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, 0x1f, 0x9F);//Set P code
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_AAPNR_2D, 0x02);
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_CMCR_10, 0x50);//update double buffer
#endif

//Add Calibration Setting ,  cyyeh 20080417
#if((_SCALER_TYPE == _RTD2545LR) || (_SCALER_TYPE == _RTD247xRD) || (_SCALER_TYPE == _RTD248xRD))
            CScalerPageSelect(_PAGE2);
            CScalerSetDataPortBit(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_DPCR2_3A, ~(_BIT4|_BIT3), _BIT4); // Set VCO default
            CTimerDelayXms(1);
            CScalerSetDataPortBit(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_DPCR0_38, ~_BIT0, _BIT0);         // Reg DPLL_CMPEN
            CTimerDelayXms(1);
            CScalerSetDataPortBit(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_DPCR0_38, ~_BIT1, _BIT1);         // Reg DPLL_CALLCH
            CTimerDelayXms(1);
            CScalerSetDataPortBit(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_DPCR0_38, ~_BIT2, _BIT2);         // Reg DPLL_CALSW
#endif

            SET_AUDIOWAITINGFLAG();
        }
        else
        {
            CLR_AUDIOWAITINGFLAG();
            CLR_AUDIOPLLLOCKREADY();
        }
    }
    else
    {
        CLR_AUDIOPLLLOCKREADY();
    }
}

//--------------------------------------------------
// Description  : Enable Audio Output
// Input Value  : None
// Output Value : None
//--------------------------------------------------
void CHdmiEnableAudioOutput(void)
{
    CLR_AUDIOWAITINGTIMEOUT();

    if(GET_AUDIOWAITINGFLAG())
    {
        CScalerPageSelect(_PAGE2);
        CScalerSetByte(_P2_HDMI_SR_CB, 0x07);//Write 1 clear
        CLR_AUDIOWAITINGFLAG();
        SET_AUDIOPLLLOCKREADY();
    }
    else
    {
        if (CHdmiAudioFIFODetect() || GET_AVRESUME())//For HDMI audio pll setting
        {
            CHdmiAudioFirstTracking();
            CLR_AUDIOPLLLOCKREADY();
        }
        else if (GET_AUDIOPLLLOCKREADY())
        {
            CLR_AUDIOPLLLOCKREADY();
            CScalerPageSelect(_PAGE2);
#if(_AUDIO_OUTPUT_TYPE == _I2S)
//V405 modify Start 20070905 : To slove the audio issue which may make a beep sound in HDMI port.
//            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_AOCR_62, 0x0f);//Enable I2S Output
            CScalerRead(_P2_HDMI_SR_CB, 1, pData, _NON_AUTOINC);
            CScalerGetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_AOCR_62, 1, &pData[1], _NON_AUTOINC); //Read I2S Output
            if((pData[0] & 0x16) == 0x00) //LPCM & no overflow/underflow in Audio FIFO
            {
                if((pData[1] & 0x0f) != 0x0f)
                    CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_AOCR_62, 0x0f);//Enable I2S Output
            }
            else
            {
                if((pData[1] & 0x0F) != 0x00)
                    CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_AOCR_62, 0x00);//Disable I2S Output
            }
//V405 modify End 20070905
#else
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_AOCR_62, 0xf0);//Enable SPDIF Output
#endif

#if(_AUDIO_LOCK_MODE == _HARDWARE_TRACKING)
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_AFCR_03, 0x26);//Enable Audio FIFO
#else
            CScalerSetDataPortByte(_P2_HDMI_ADDR_PORT_C9, _P2_HDMI_AFCR_03, 0x40);//Enable Audio FIFO
#endif
            CAdjustEnableHDMIWatchDog(_WD_AUDIO_FOR_TMDS_CLOCK | _WD_AUDIO_FIFO);

#if(_EXT_DAC_SUPPORT == _ON)
            CHdmiAdjustDACSampleRate(ucAudioRate);
#endif


        }
    }

// Setting pin share and Power Control for Audio Dac
    CScalerCodeW(tHDMI_AUDIO_DAC);
    CTimerActiveTimerEvent(SEC(0.5), CHdmiAudioWaitingFlagReadyEven);

}

//--------------------------------------------------
// Description  : Audio Waiting Time Flag Ready
// Input Value  : None
// Output Value : None
//--------------------------------------------------
void CHdmiAudioWaitingFlagReadyEven(void)
{
    SET_AUDIOWAITINGTIMEOUT();
}

#if(_EXT_DAC_SUPPORT == _ON)
//--------------------------------------------------
// Description  : Reset DAC Chip
// Input Value  : None
// Output Value : None
//--------------------------------------------------
void CHdmiResetDAC(void)
{

//    bAUDIOM1 = _LOW;
//    bAUDIOM2 = _LOW;

//    bAUDIORESET = _HIGH;
    CTimerDelayXms(5);
//    bAUDIORESET = _LOW;
    CTimerDelayXms(5);
//    bAUDIORESET = _HIGH;

}

//--------------------------------------------------
// Description  : Adjust DAC Sample Rate
// Input Value  : None
// Output Value : None
//--------------------------------------------------
void CHdmiAdjustDACSampleRate(BYTE ucModeType)
{
    pData[0] = 0x20;
    pData[1] = (0x90 | ucModeType);
    CI2cWrite(0x20, 0x0c, 1, &pData[0]);
    CI2cWrite(0x20, 0x01, 1, &pData[1]);
}
#endif //End of #if(_EXT_DAC_SUPPORT == _ON)


#endif //End of #if(_HDMI_SUPPORT == _ON)


#endif  // End of #if(_SCALER_SERIES_TYPE == _RTD2472D_SERIES)

//Anderson 071219 for 2545LR, 248xRD, 248xRD