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;*********************************************************************************
;
; COPYRIGHT (C) 2006 Marvell International Ltd. All Rights Reserved.
;
; The information in this file is furnished for informational use only,
; is subject to change without notice, and should not be construed as
; a commitment by Marvell. Marvell assumes no responsibility or liability
; for any errors or inaccuracies that may appear in this software or any
; documenation that may be provided in association with this software.
;
;*********************************************************************************
;
; bbu_mac.mac
; BBU Macro files
;
; Copyright (c) 2005 by Intel Corp. Hudson MA
;
; List of macros in this file:
;
;
; bbu_mapCoarseTable (Macro) Generates coarse page table for memory management
;
;*********************************************************************************
; This macro will map a region using 1MB sections
; Notes:
; 1)You must call xlli_initPageTable before this macro is valid.
; 2) This version of the macro is used when NAMED values are passed to the macro
MACRO
bbu_mapCoarseTable $w1, $w2, $w3, $size, $virtual, $physical, $access, $TableBase
; $size = size of region to be mapped (1Mb Maximum)
; $virtual = starting virtual address of region
; $physical = starting physical address of region
; $access = access bits for this region
; $TableBase = Physical address of level 2 table base
;
ldr $w2, =($size:SHR:16) ; Get partition size (in # of 64K units)
cmp $w2, #0 ; Is the partition size under 64Kb?
beq %F2 ; Yes - just exit
ldr $w1, =$TableBase ; Get table base address
ldr $w3, =($virtural:SHR:(16-2)) ; Generate table index
add $w1, $w1, $w3 ; Generate offset into table
ldr $w3, =($physical + $access) ; Generate table entry
;
; Each coarse table entry needs to be repeated 16 times
;
1 str $w3, [$w1], #4 ; Store table entry and increment
str $w3, [$w1], #4 ; Store table entry and increment
str $w3, [$w1], #4 ; Store table entry and increment
str $w3, [$w1], #4 ; Store table entry and increment
str $w3, [$w1], #4 ; Store table entry and increment
str $w3, [$w1], #4 ; Store table entry and increment
str $w3, [$w1], #4 ; Store table entry and increment
str $w3, [$w1], #4 ; Store table entry and increment
str $w3, [$w1], #4 ; Store table entry and increment
str $w3, [$w1], #4 ; Store table entry and increment
str $w3, [$w1], #4 ; Store table entry and increment
str $w3, [$w1], #4 ; Store table entry and increment
str $w3, [$w1], #4 ; Store table entry and increment
str $w3, [$w1], #4 ; Store table entry and increment
str $w3, [$w1], #4 ; Store table entry and increment
str $w3, [$w1], #4 ; Store table entry and increment
add $w3, $w3, #bbu_MemSize_64Kb ; Create next table entry
subs $w2, $w2, #1 ; Decrement loop count
bne %B1 ; Loop until table is full
;
; The fist level page descriptor needs to be changed to point to the 2nd
; level descriptor just generated above.
;
mrc p15, 0, $w3, c2, c0, 0 ; Get the page table base address from CP15
mov $w3, $w3, LSR #14 ; Clear the low order 14 bits because cp15...
mov $w3, $w3, LSL #14 ; ...read of these bits are unpredictable
ldr $w2, =($virtural:SHR:(20-2)) ; Generate offset into first level table
add $w3, $w3, $w2 ; $w3 points to first table entry to be updated
ldr $w1, =$TableBase ; Get table base address
orr $w1, $w1, #0x1 ; Identify this as a Coarse page table address
str $w1, [$w3] ; Update the 1st level entry
2
MEND
;*********************************************************************************
;
; This macro will map a region using 1MB sections
; Notes:
; 1)You must call xlli_initPageTable before this macro is valid.
; 2) This version of the macro is used when REGISTER values are passed to the macro
MACRO
bbu_mapCoarseTable_Var $w1, $w2, $w3, $w4, $size, $virtual, $physical, $access, $TableBase
; $size = size of region to be mapped
; $virtual = starting virtual address of region
; $physical = starting physical address of region
; $access = access bits for this region
; $TableBase = Physical address of level 2 table base
; get the page table base address from cp15
mrc p15, 0, $w4, c2, c0, 0
mov $w4, $w4, LSR #14 ; Clear the low order 14 bits because cp15...
mov $w4, $w4, LSL #14 ; ...read of these bits are unpredictable
mov $w3, $size ; get size of bank
cmp $w3, #0
beq %F2 ; if size=0, skip
mov $w2, $virtual, LSR #(20-2)
add $w2, $w2, #$Level1tab ; generate table index
add $w2, $w2, $w4 ; offset into page table
mov $w3, $w3, LSR #20 ; no. of 1MB segments
add $w1, $physical, $access ; create table entry
1
str $w1, [$w2], #4 ; store table entry and increment
add $w1, $w1, #xlli_MemSize_1Mb ; add section number field
subs $w3, $w3, #1 ; decrement loop count
bne %B1
2
MEND
END
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