bbu_one_wire.s

关于PXA310的最小系统的程序,初级学习阶段会有所帮助,汇编语言编写的

;
;       *****************
;       *               * 
;       * BBU_1W_putchr * Subroutine
;       *               *
;       *****************
;
;       This subroutine writes out 1 byte of data to the 1-Wire device.
;
; PARAMETERS:
;
;       INPUT:
;
;          r0 = Data to be sent to the 1-Wire device (preserved)
;
BBU_1W_putchr   FUNCTION

        stmfd   sp!,    {r0-r1, lr}             ; Save used registers & link on stack
        ldr     r1,     =BBU_W1_PHYSICAL_BASE   ; Load the 1-Wire base address
        strb    r0,     [r1, #BBU_W1TRR_offset] ; Send the data out
;
;       Don't return until the last bit is sent and controler is ready for another byte.
;
30      ldr     r0,     [r1, #BBU_W1INTR_offset]; Read the interrupt register
        ands    r0,     r0,     #BBU_TBE        ; Transmit buffer empty?
        beq     %B30                            ; Loop until last bit is transmitted
        mov     r0,     #0x1C0                  ; Set up to wait r0 uS
        bl      BBU_usWait                      ; Delay
        ldmfd   sp!,    {r0-r1, pc}             ; Return to caller
        ENDFUNC

;
;*********************************************************************************
;
;       *****************
;       *               * 
;       * BBU_1W_getchr * Subroutine
;       *               *
;       *****************
;
;       This subroutine fetches 1 byte of data from the 1-Wire device.
;
; PARAMETERS:
;
;       INPUT: (none)
;
;       OUTPUT:
;
;          r0 = Data received from the 1-Wire device
;
BBU_1W_getchr   FUNCTION

        stmfd   sp!,    {r1, lr}        ; Save used registers & link on stack
;
;       Reading from the 1-Wire device actually requires the processor to write 0xFF
;       to the device in order to provide clocking pulses to the slave for writing
;       the data back.
;
        ldr     r1,     =BBU_W1_PHYSICAL_BASE   ; Load the 1-Wire base address
        mov     r0,     #0xFF                   ; Data to send must be 0xFF
        strb    r0,     [r1, #BBU_W1TRR_offset] ; Send the data out
;
;       Loop until the entire byte has been sent and then read the returned data.
;
40      ldr     r0,     [r1, #BBU_W1INTR_offset]; Read the interrupt register
        ands    r0,     r0,     #BBU_RBF        ; Receive buffer full?
        beq     %B40                            ; Loop until byte received
        mov     r0,     #0x1C0                  ; Set up to wait r0 uS
        bl      BBU_usWait                      ; Delay
        ldrb    r0,     [r1, #BBU_W1TRR_offset] ; Now - Fetch the data
        ldmfd   sp!,    {r1, pc}                ; Return to caller
        ENDFUNC

;
;*********************************************************************************
;
;       ***************
;       *             * 
;       * BBU_1W_init * Subroutine
;       *             *
;       ***************
;
;       This subroutine initalizes the 1-Wire interface for follow-on transactions.
;       Call this routine to start any new transaction on the 1-wire bus.
;
; PARAMETERS:
;
;       INPUT: (none)
;
;       OUTPUT:
;
;          r0 = 0x0 if a error was detected - non zero if no error detected
;
BBU_1W_init     FUNCTION

        stmfd   sp!,    {r1-r2, lr}             ; Save used registers & link on stack
        ldr     r2,     =BBU_W1_PHYSICAL_BASE   ; Load the 1-Wire base address
;
;       The contoller init code consists of seting up the bus freqency.
;       Clock frequency MUST be aprox 1.00 MHz - No choice about this!
;
        mov     r1,     #0xB                    ; "Must use value" for PXA3xx processors
        str     r1,     [r2, #BBU_W1CDR_offset] ; Set up the 1-Wire clock frequency

        mov     r0,     #BBU_1WR                ; Set the the 1_wire reset bit
        str     r0,     [r2, #BBU_W1CMDR_offset]; Reset the 1-Wire bus
;
;       Loop here to test for a slave "Presence Detect" condition. BBU uses a
;       simple loop counter to exit if the bit is not cleared after a number of
;       iterations.
;
;       NOTE: Once the device has been detected, the PDR bit remains clear until
;             the platform is reset.
;
        mov     r0,     #0x8000                 ; Set up loop counter
50      ldr     r1,     [r2, #BBU_W1INTR_offset]; Read the interrupt register
        subs    r0,     r0,     #1              ; Loop count exhausted?
        beq     %F55                            ; Yes - take the exit path
        ands    r1,     r1,     #BBU_PDR        ; Is the Presence Detect Result bit clear?
        bne     %B50                            ; No - try reading it again
;
;       If the code got here, a slave (The DS2780 in this case) was detected.
;       First - do a short dealy so the following code doesn't stomp on the
;       bus reset that may is occouring on the bus.
;
;       Since there is only a single 1-Wire device on the bus, BBU can send the
;       SKIP NET ADDRESS command (0xCC) so commands to the fuel gauge do not
;       need to send the device address.
;
        mov     r0,     #1      ; Set up to wait 1 mS
        bl      BBU_msWait      ; Delay

        mov     r0,     #0xCC   ; Set the SKIP NET ADDRESS command
        bl      BBU_1W_putchr   ; Send out the command
;
;       Bus is now ready to process further commands
;
55      ldmfd   sp!,    {r1-r2, pc}                ; Return to caller
        ENDFUNC
;
;*********************************************************************************
;
;       *******************
;       *                 * 
;       * BBU_1W_BattInit * Subroutine
;       *                 *
;       *******************
;
;       This subroutine initializes the battery parameters in the fuel gauge
;
; PARAMETERS:
;
;       INPUT:
;
;          none
;
;       OUTPUT:
;
;          none
;
BBU_1W_BattInit FUNCTION

        stmfd   sp!,    {r0-r3, lr}     ; Save used registers & link on stack

        ldr     r2,     =BBU_BAT_STA    ; Get starting address of the table
        ldr     r1,     =BBU_BAT_END    ; Get ending address of the table
        sub     r3,     r1,     r2      ; r3 equals the length of the table

        ldrb    r1,     [r2],   #1      ; Fetch the first byte of data
        mov     r0,     #0x64           ; First address to be loaded
        bl      BBU_1W_writeReg         ; Write the 1st register
        sub     r3,     r3,     #1      ; Decrement the byte count
;
;       The remaining register loacations can be handled by the BBU_1W_putchr routine
;
60      ldrb    r0,     [r2],   #1      ; Get the next byte
        bl      BBU_1W_putchr           ; Output the character
        subs    r3,     r3,     #1      ; Decrement the byte count
        bne     %B60                    ; Loop until the end of the table is reached
;
;       Copy the data into EEPROM so the information is not lost when power is removed
;
        bl      BBU_1W_init             ; Init the bus
        mov     r0,     #0x48           ; 0x48 = Copy data command
        bl      BBU_1W_putchr           ; Send the character
        mov     r0,     #0x60           ; Select address in EEPROM memory block
        bl      BBU_1W_putchr           ; Send it

        ldmfd   sp!,    {r0-r3, pc}     ; Return to caller
;
;       Battery parameters to be loaded into the fuel gauge are listed below
;       starting at fuel gauge address 0x64 (VCHG register) and working up.
;
;       NOTE: At this time (26-Jan-2007) the values are VERY PRELIMINARY and
;             should only be considered as "better than having nothing" values.
;
;                      Value     REG  Description
;                      -----     ---  ---------------------
BBU_BAT_STA     DCB     0xC3    ; 64 - Charge voltage (3.8 volts)
                DCB     0x04    ; 65 - Minimum Charge Current (40 mA)
                DCB     0xA7    ; 66 - Active Empty Voltage (3.25V)
                DCB     0x14    ; 67 - Active Empty Current (200 ma)
                DCB     0x00    ; 68 - Active Empty 40
                DCB     0x05    ; 69 - Sense Resistor Prime
                DCB     0x04    ; 6A - Full 40 MSB - set to 1140 mAhr
                DCB     0x74    ; 6B - Full 40 LSB
                DCB     0xFC    ; 6C - Full 3040 Slope
                DCB     0xF8    ; 6D - Full 2030 Slope
                DCB     0xF2    ; 6E - Full 1020 Slope
                DCB     0xEC    ; 6F - Full 0010 Slope
                DCB     0x03    ; 70 - AE 3040 Slope
                DCB     0x06    ; 71 - AE 3020 Slope
                DCB     0x0A    ; 72 - AE 2030 Slope
                DCB     0x0D    ; 73 - AE 0010 Slope
                DCB     0x00    ; 74 - SE 3040 Slope
                DCB     0x01    ; 75 - SE 2030 Slope
                DCB     0x02    ; 76 - SE 1020 Slope
                DCB     0x03    ; 77 - SE 0010 Slope
BBU_BAT_END
        ALIGN   4
;
        ENDFUNC
        END