📄 bbu_mem_tests.s
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;*********************************************************************************
;
; COPYRIGHT (C) 2006 Marvell International Ltd. All Rights Reserved.
;
; The information in this file is furnished for informational use only,
; is subject to change without notice, and should not be construed as
; a commitment by Marvell. Marvell assumes no responsibility or liability
; for any errors or inaccuracies that may appear in this software or any
; documenation that may be provided in association with this software.
;
;*********************************************************************************
;
; bbu_Mem_Tests.s
; Memory Test Software (MTS)
;
; Common notes for these subroutines:
;
; r0-r8 are available for general use
; r9 = Starting address for memory tests
; r10 = number of bytes to be tested.
; r11-r12 = are available for general use
; sp, lr, pc = Not available for general register use.
;
INCLUDE xlli_PXA3xx_defs.inc
INCLUDE bbu_Littleton_defs.inc
EXTERN BBU_putstr ; UART put string routine (uses stack pointer)
EXTERN BBU_puthexd ; Prints 32-bit hex value (uses stack pointer)
EXTERN BBU_crlf ; Outputs <cr><lf> to UART (uses stack pointer)
EXTERN BBU_SMTD_AND ; Memory Tests AND mask
EXTERN BBU_SMTD_OR ; Memory Tests OR mask
EXTERN BBU_SMTD_LOOP ; Memory Tests Loop Count
EXTERN BBU_SMTD_PAT ; Memory Tests starting pattern
EXTERN BBU_SMTD_STAT ; Memory Tests Status
EXTERN BBU_SMTD_CLC ; Memory Test current loop count
EXTERN BBU_UDecToAscii ; Unsigned decimal to ASCII
GLOBAL bbu_MTS_ADP ; Analog Data Pattern
GLOBAL bbu_MTS_CDP ; Constant Data Pattern
GLOBAL bbu_MTS_CODP ; Complement Data Pattern
GLOBAL bbu_MTS_DDP ; Decrement Data Pattern
GLOBAL bbu_MTS_MEDP ; Complement Data Pattern
GLOBAL bbu_MTS_ZRRIBDP ; Zero Rotate Right & Invert Byte
GLOBAL bbu_MTS_ZRRIWDP ; Zero Rotate Right & Invert Word
GLOBAL bbu_MTS_ZRRIDDP ; Zero Rotate Right & Invert DoubleWord
GLOBAL bbu_MTS_ORLIBDP ; One Rotate Right & Invert Byte
GLOBAL bbu_MTS_ORLIWDP ; One Rotate Right & Invert Word
GLOBAL bbu_MTS_ORLIDDP ; One Rotate Right & Invert DoubleWord
GLOBAL bbu_MTS_ZRRBDP ; Zero Rotate Right Byte
GLOBAL bbu_MTS_ZRRWDP ; Zero Rotate Right Word
GLOBAL bbu_MTS_ZRRDDP ; Zero Rotate Right DoubleWord
GLOBAL bbu_MTS_ORLBDP ; One Rotate Right Byte
GLOBAL bbu_MTS_ORLWDP ; One Rotate Right Word
GLOBAL bbu_MTS_ORLDDP ; One Rotate Right DoubleWord
GLOBAL bbu_MTS_WOBDP ; Walking One Byte
GLOBAL bbu_MTS_WOWDP ; Walking One Word
GLOBAL bbu_MTS_WODDP ; Walking One DoubleWord
GLOBAL bbu_MTS_WZBDP ; Walking Zero Byte
GLOBAL bbu_MTS_WZWDP ; Walking Zero Word
GLOBAL bbu_MTS_WZDDP ; Walking Zero DoubleWord
GLOBAL bbu_MTS_ST0000 ; Single Signal Tailgating (0101_0000)
GLOBAL bbu_MTS_ST1111 ; Single Signal Tailgating (0101_1111)
GLOBAL bbu_MTS_ST1010 ; Single Signal Tailgating (0101_1010)
GLOBAL bbu_MTS_MST ; Multiple Signal Tailgating
GLOBAL bbu_MTS_FREQS ; Frequency Sweep test pattern
GLOBAL bbu_MTS_VERTI ; Vertical Increment test pattern
GLOBAL bbu_MTS_HORZI ; Horizontal Increment test pattern
AREA |text|,CODE,READONLY
;
;*********************************************************************************
;
; ***************
; * *
; * bbu_MTS_ADP * Subroutine
; * *
; ***************
;
; This subroutine performs an "Analog Data Pattern" test on the selected memory
;
; PARAMETER PASSING & REGISTER USE:
;
; R0 = used for calls to UART subroutines
; r1 - r8 = available for general use
; r9 = Starting address of memory test (DO NOT MODIFY!)
; r10 = Number of bytes to be tested (DO NOT MODIFY!)
; r11-r12 = available for general use
; r13 = Stack pointer (sp) - DO NOT MODIFY
; r14 = Link register (lr) - DO NOT MODIFY
;
bbu_MTS_ADP FUNCTION
stmfd sp!, {r1-r12, lr} ; Save r1-r12 and link register on the stack
ldr r5, =BBU_SMTD_CLC ; Address of current loop counter
mov r6, #1 ; This is pass #1
str r6, [r5] ; Save this value
5 ldr r0, =MTS_ADP_MSG1 ; Identify test to be run
bl BBU_putstr ; Send string to user
mov r0, r6 ; Get pass number
mov r1, #0 ; Supress leading zeros
bl BBU_UDecToAscii ; Send to user
bl BBU_crlf ; Output a <CR><LF>
mov r4, r9 ; Set up starting address in r4
mov r5, r10 ; Put byte count into r5
bic r5, r5, #7 ; Make sure bits 2:0 are clear (8 byte increments)
;
; See if BBU specified starting pattern is to be used
;
ldr r1, =BBU_SMTD_PAT ; Address of BBU starting pattern
ldr r2, [r1] ; Fetch starting pattern
ldr r1, =BBU_SMTD_STAT ; Address of Memory test status word
ldr r3, [r1] ; Fetch status word
ands r3, r3, #1 ; Bit 0 set = Use BBU supplied starting pattern
movne r6, r2 ; Use BBU starting pattern
ldreq r6, =0x00000000 ; Load r6 with test default starting pattern
mvn r7, r6 ; Flip all the bits
;
; Fetch AND mask and OR data word from BBU code
;
ldr r1, =BBU_SMTD_AND ; Address of AND mask word
ldr r2, [r1] ; Fetch AND mask
ldr r1, =BBU_SMTD_OR ; Address of OR data word
ldr r3, [r1] ; Fetch OR data word
;
; Update the test patterns as required
;
and r6, r6, r2 ; AND the starting pattern
and r7, r7, r2 ; AND the complement patttern
orr r6, r6, r3 ; OR the starting pattern
orr r7, r7, r3 ; OR the complement pattern
;
; Fill memory with the test pattern
;
10 str r6, [r4], #4 ; Store first pattern
str r7, [r4], #4 ; Store second pattern
subs r5, r5, #8 ; Decrement byte count
bne %B10 ; Loop until memory is filled
;
; Read pattern back and check for errors
;
ldr r0, =MTS_ADP_MSG2 ; Let user know data is being read
bl BBU_putstr ; Send string to user
mov r4, r9 ; Set up starting address in r4
mov r5, r10 ; Put byte count into r5
bic r5, r5, #7 ; Make sure bits 2:0 are clear (8 byte increments)
11 ldr r8, [r4], #4 ; Fetch the first value
cmp r8, r6 ; Does the data match?
beq %F12 ; YES - do next test
;
; No match on 1st value - inform user
;
mov r0, r6 ; copy expected data to r0
mov r1, r4 ; Get address of failed location
mov r2, r8 ; Move actual data to r2
bl BBU_MTSP_error ; Print message
12 ldr r8, [r4], #4 ; Fetch the second value
cmp r8, r7 ; Does the data match?
beq %F13 ; YES - continue
;
; No match on 2nd value - inform user
;
mov r0, r7 ; copy expected data to r0
mov r1, r4 ; Get address of failed location
mov r2, r8 ; Move actual data to r2
bl BBU_MTSP_error ; Print message
13 subs r5, r5, #8 ; decrement byte count
bne %B11 ; Loop until done
;
; Increment current loop counter and exit if equal to max loop count
;
ldr r5, =BBU_SMTD_CLC ; Address of current loop counter
ldr r6, [r5] ; Fetch this value
ldr r7, =BBU_SMTD_LOOP ; Address of ending loop count
ldr r8, [r7] ; Fetch this value
cmp r6, r8 ; Are the loop counts equal?
bne %F14 ; No - skip return
ldmfd sp!, {r1-r12, pc} ; restore r1-r12 and pc (return to caller)
14 add r6, r6, #1 ; NO! - Increment current loop count ...
str r6, [r5] ; ... and save this value
b %B5 ; Run test again
;
; Text Messages for ADP memory tests
;
MTS_ADP_MSG1 DCB " 0x00000001 - Writing Analog Data Pattern - Pass ",0
MTS_ADP_MSG2 DCB " 0x00000001 - Reading Analog Data Pattern",0xD,0xA,0
ALIGN 4
ENDFUNC
;
;*********************************************************************************
;
; ***************
; * *
; * bbu_MTS_CDP * Subroutine
; * *
; ***************
;
; This subroutine performs an "Constant Data Pattern" test on the selected memory
;
; PARAMETER PASSING & REGISTER USE:
;
; R0 = used for calls to UART subroutines
; r1 - r8 = available for general use
; r9 = Starting address of memory test (DO NOT MODIFY!)
; r10 = Number of bytes to be tested (DO NOT MODIFY!)
; r11-r12 = available for general use
; r13 = Stack pointer (sp) - DO NOT MODIFY
; r14 = Link register (lr) - DO NOT MODIFY
;
bbu_MTS_CDP FUNCTION
stmfd sp!, {r1-r12, lr} ; Save r1-r12 and link register on the stack
ldr r5, =BBU_SMTD_CLC ; Address of current loop counter
mov r6, #1 ; This is pass #1
str r6, [r5] ; Save this value
5 ldr r0, =MTS_CDP_MSG1 ; Identify test to be run
bl BBU_putstr ; Send string to user
mov r0, r6 ; Get pass number
mov r1, #0 ; Supress leading zeros
bl BBU_UDecToAscii ; Send to user
bl BBU_crlf ; Output a <CR><LF>
mov r4, r9 ; Set up starting address in r4
mov r5, r10 ; Put byte count into r5
bic r5, r5, #3 ; Make sure bits 1:0 are clear (4 byte increments)
;
; See if BBU specified starting pattern is to be used
;
ldr r1, =BBU_SMTD_PAT ; Address of BBU starting pattern
ldr r2, [r1] ; Fetch starting pattern
ldr r1, =BBU_SMTD_STAT ; Address of Memory test status word
ldr r3, [r1] ; Fetch status word
ands r3, r3, #1 ; Bit 0 set = Use BBU supplied starting pattern
movne r6, r2 ; Use BBU starting pattern
ldreq r6, =0x55AA55AA ; Load r6 with test default starting pattern
mvn r7, r6; Flip all the bits
;
; Fetch AND mask and OR data word from BBU code
;
ldr r1, =BBU_SMTD_AND ; Address of AND mask word
ldr r2, [r1] ; Fetch AND mask
ldr r1, =BBU_SMTD_OR ; Address of OR data word
ldr r3, [r1] ; Fetch OR data word
;
; Update the test pattern as required
;
and r6, r6, r2 ; AND the starting pattern
orr r6, r6, r3 ; OR the starting pattern
;
; Fill memory with the test pattern
;
10 str r6, [r4], #4 ; Store the pattern
subs r5, r5, #4 ; Decrement byte count
bne %B10 ; Loop until memory is filled
;
; Read pattern back and check for errors
;
14 ldr r0, =MTS_CDP_MSG2 ; Let user know data is being read
bl BBU_putstr ; Send string to user
mov r4, r9 ; Set up starting address in r4
mov r5, r10 ; Put byte count into r5
bic r5, r5, #3 ; Make sure bits 1:0 are clear (4 byte increments)
11 ldr r8, [r4], #4 ; Fetch the first value
cmp r8, r6 ; Does the data match?
beq %F12 ; YES - do next test
;
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