📄 bbu_codec.s
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;
PK4HZA mov r7, #12 ; Size of the array/4
mov r9, #8 ; Loop count for 1.3 KHz
PK4HZA1 ldr r0, [r8], #16 ; Get data & increment pointer
mov r0, r0, LSR #16 ; move to lower word
str r0, [r6], #4 ; Load data & increment pointer
subs r7, r7, #1 ; Decrement count
bne PK4HZA1 ; Loop until done
ldr r8, =T_DATA ; Pointer to tone data
mov r7, #12 ; Size of the data array/8
subs r9, r9, #1 ; Decrement outer loop count
bne PK4HZA1 ; Keep looping if not zero
b %F397 ; Set up the DMA
;
; Load 2.0 KHz tone into selected channel
;
PK6HZA mov r7, #8 ; Size of the array/6
mov r9, #12 ; Loop count for 2.0 KHz
PK6HZA1 ldr r0, [r8], #24 ; Get data & increment pointer
mov r0, r0, LSR #16 ; move to lower word
str r0, [r6], #4 ; Load data & increment pointer
subs r7, r7, #1 ; Decrement count
bne PK6HZA1 ; Loop until done
ldr r8, =T_DATA ; Pointer to tone data
mov r7, #8 ; Size of the data array/6
subs r9, r9, #1 ; Decrement outer loop count
bne PK6HZA1 ; Keep looping if not zero
;
; Data array is set up - now set up the DMA transfer
;
397 ldr r5, =bbu_DMA_PHYSICAL_BASE ; Get physical base of DMA controller
ldr r2, =TONE_DMA ; Get address of DMA descriptor block
mov r0, r2 ; Copy to r0
bl BBU_GetPhysical ; Get the physical address
str r0, [r5, #bbu_DMA_DDADR6_offset] ; Write descriptor physical address to DDADR6
str r0, [r2] ; Set up next DMA block address - Points back to itself
;
; Set up buffer source and length based on user data
;
ldr r0, =TONE_D ; Get source address of the buffer
bl BBU_GetPhysical ; Get the physical address of the data
str r0, [r2, #4] ; DMA data source address register
;
; Check to see if the user specified the I2S bus (lack of a /P command switch)
; or the PCM bus (/P command switch specified)
;
ldr r3, =(bbu_SSP3_PHYSICAL_BASE + bbu_SSDRx_offset) ; SSP3 target address
cmp r10, #'P' ; PCM requested?
ldreq r3, =(bbu_SSP4_PHYSICAL_BASE + bbu_SSDRx_offset) ; Yes - change to SSP4 target address
str r3, [r2, #8] ; Set up the target address
ldr r1, =(bbu_DCMD_INCSCRADDR | bbu_DCMD_FLOWTRG | bbu_DCMD_SIZE_32 | 0xC180)
str r1, [r2, #0xC] ; Set up the command address register
;
; Set up the DMA Request to Channel Map Register for SSP3 or SSP4 Transmit
;
mov r2, #0 ; Clear out a work register
mov r3, #0x86 ; Magic number to map valid channel to channel 6 (zero)
cmp r10, #'P' ; PCM input?
ldreq r4, =bbu_DMA_DRCMR2_offset ; Yes - Offset to this register (SSP4)
ldreq r1, =bbu_DMA_DRCMR67_offset ; Yes - Offset to this register (SSP4)
ldrne r1, =bbu_DMA_DRCMR2_offset ; No - Offset to this register (SSP4)
ldrne r4, =bbu_DMA_DRCMR67_offset ; No - Offset to this register (SSP3)
str r2, [r5, r1] ; Write the data to this register
str r3, [r5, r4] ; Write the data to this register
;
; This next instruction will start the DMA transfer
;
mov r3, #bbu_DCSR_RUN ; Set the DMA RUN bit
str r3, [r5, #bbu_DMA_DCSR6_offset] ; Control/Status for DMA channel 6
;
; Set the I2C address for the DA9034 audio codec
;
mov r4, #0x68 ; I2C address for PMIC
ldr r0, =bbu_FFUART_PHYSICAL_BASE ; Fetch base address of FFUART
str r4, [r0, #bbu_UASPR_offset] ; Store I2C address in the scratch pad register
;
; Signal routing depends on if the signal input on the I2S or the PCM interface
;
cmp r10, #'P' ; PCM input?
beq %F398 ; Yes - skip to PCM signal routing
;
; Standard setup -- Selects DAC1 & DAC2 to MUX_MONO_OUT & MUX_BEAR_OUT
;
mov r0, #0x84 ; Register 0x84 (PGA_DACS)
mov r1, #0x05 ; Set DAC1 & 2 gains to -3dB)
bl BBU_putI2C ; Write out to I2C bus
mov r0, #0x70 ; Register 0x70 (MUX_MONO_OUT)
mov r1, #0x18 ; Select DAC1 & DAC2
bl BBU_putI2C ; Write out to I2C bus
mov r0, #0x71 ; Register 0x70 (MUX_BEAR_OUT)
mov r1, #0x18 ; Select DAC1 & DAC2
bl BBU_putI2C ; Write out to I2C bus
b %F399 ; ...and exit
;
; PCM setup -- Selects DAC3 to MUX_MONO_OUT & MUX_BEAR_OUT
;
398 mov r0, #0x70 ; Register 0x70 (MUX_MONO_OUT)
mov r1, #0x20 ; Select DAC3
bl BBU_putI2C ; Write out to I2C bus
mov r0, #0x71 ; Register 0x70 (MUX_BEAR_OUT)
mov r1, #0x20 ; Select DAC3
bl BBU_putI2C ; Write out to I2C bus
;
; Enables Voice Codec VDAC
;
mov r0, #0x80 ; Register 0x80 (VOICE_CODEC_VDAC_CONTROL)
mov r1, #0x18 ; Enable VOICE DAC Ch 3
bl BBU_putI2C ; Write out to I2C bus
;
; Exit path
;
399 mov r0, r10 ; Copy r10 (PCM marker) value to r0
ldmfd sp!, {r1-r10,pc} ; Return to caller
;
; TONE COMMAND DATA
;
; The basic SINE wave data is stored below as 48 data points so for a
; 48KHz sample rate it produces a 1KHz tone. This table is used to build
; the tones requested by the user and then sent via DMA to the SSP3 bus.
; Data is 16-bits and saved in the upper word of the 32-bit field.
; Different frequency tones may be generated by picking off different
; data points to be used for the DMA transfer. Data is in 2's comp.
;
T_DATA DCD 0x00000000, 0x10B50000, 0x21200000, 0x30FB0000
DCD 0x3FFF0000, 0x4DEB0000, 0x5A820000, 0x658C0000
DCD 0x6ED90000, 0x76410000, 0x7BA30000, 0x7EE70000
DCD 0x7FFF0000, 0x7EE70000, 0x7BA30000, 0x76410000
DCD 0x6ED90000, 0x658C0000, 0x5A820000, 0x4DEB0000
DCD 0x3FFF0000, 0x30FB0000, 0x21200000, 0x10B50000
DCD 0x00000000, 0xEF4B0000, 0xDEE00000, 0xCF050000
DCD 0xC0000000, 0xB2150000, 0xA57E0000, 0x9A740000
DCD 0x91270000, 0x89BF0000, 0x845D0000, 0x81190000
DCD 0x80000000, 0x81190000, 0x845D0000, 0x89BF0000
DCD 0x91270000, 0x9A740000, 0xA57E0000, 0xB2150000
DCD 0xC0000000, 0xCF050000, 0xDEE00000, 0xEF4B0000
;
ALIGN 32
TONE_DMA DCD 0,0,0,0 ; 4 words for TONE DMA transfer
TONE_D SPACE (4*96) ; 4 bytes * 96 words (max)
ENDFUNC
;
;*********************************************************************************
;
; *****************
; * *
; * BBU_CODEC_MIC * Subroutine
; * *
; *****************
;
; This subroutine routes microphone data to the platform speaker
;
; PARAMETER PASSING:
;
; INPUT:
;
; r0 = 0 To disconnect microphone
; r0 = bit 0 set = Connect microphone
; r0 = bit 1 set = do not close PCM loopback switch (record mode)
;
; OUTPUT:
;
; None
;
BBU_CODEC_MIC FUNCTION
stmfd sp!, {r0-r3,lr} ; Save used registers
mov r3, r0 ; Copy input parameter to r2
mov r0, #0x68 ; I2C address for PMIC
ldr r1, =bbu_FFUART_PHYSICAL_BASE ; Fetch base address of FFUART
str r0, [r1, #bbu_UASPR_offset] ; Store I2C address in the scratch pad register
;
; Selects microphone (or deselects) mic (routed through DAC3) to speaker
;
mov r0, #0x70 ; Register 0x70 (MUX_MONO)
ands r1, r3, #1 ; Bit 0 set (connect mic?)
movne r1, #0x20 ; ON - Select DAC3 (Microphone)
moveq r1, #0 ; OFF - de-select mic (no input)
bl BBU_putI2C ; Write out to I2C bus
;
; Selects microphone to AUDIO LINE OUT
;
mov r0, #0x72 ; Register 0x72 (MUX_LINE_OUT)
mov r1, #0x80 ; Select Microphone
bl BBU_putI2C ; Write out to I2C bus
;
; AUDIO LINE AMP SETUP
;
mov r0, #0x75 ; Register 0x75 (AUDIO_LINE_AMP)
mov r1, #0x13 ; Set to +6dB gain
bl BBU_putI2C ; Write out to I2C bus
;
; Sets gain of TX-Power Gain Amp (PGA)
;
mov r0, #0x7C ; Register 0x7C (TX_PGA)
mov r1, #0x08 ; Gain set to 3 dB
bl BBU_putI2C ; Write out to I2C bus
;
; Selects/deselects microphone #1 input to MUX and sets maximum gain
;
mov r0, #0x7D ; Register 0x7D (MIC_PGA)
ands r1, r3, #1 ; Bit 0 set (connect mic?)
movne r1, #0x2F ; Maximum microphone gain & enable Amp & Bias
moveq r1, #0 ; Disable MIC
bl BBU_putI2C ; Write out to I2C bus
;
; Selects/deselects microphone #1 input to MUX
;
mov r0, #0x7E ; Register 0x7E (TX_PGA_MUX)
ands r1, r3, #1 ; Bit 0 set (connect mic?)
movne r1, #0x0C ; Select Microphone, differential mode
moveq r1, #0 ; Disconnect MIC
bl BBU_putI2C ; Write out to I2C bus
;
; Enables Voice Codec ADC
;
mov r0, #0x7F ; Register 0x7F (VOICE_CODEC_ADC_CONTROL)
mov r1, #0x03 ; Enable ADC - 8Khz
bl BBU_putI2C ; Write out to I2C bus
;
; Enables Voice Codec VDAC
;
mov r0, #0x80 ; Register 0x80 (VOICE_CODEC_VDAC_CONTROL)
ands r1, r3, #2 ; Bit 1 set (Loopback mic?)
moveq r1, #0x98 ; Yes - Enable loopback using VOICE DAC Ch 3
movne r1, #0x18 ; No - Enable VOICE DAC Ch 3 without loopback
bl BBU_putI2C ; Write out to I2C bus
77 ldmfd sp!, {r0-r3,pc} ; Return to caller
;
;*********************************************************************************
;
; ******************
; * *
; * BBU_CODEC_RALS * Subroutine
; * *
; ******************
;
; This subroutine reads/displays data from the ambient light sensor
;
; PARAMETER PASSING:
;
; INPUT:
;
; None
;
; OUTPUT:
;
; None (other than status to the UART)
;
BBU_CODEC_RALS FUNCTION
stmfd sp!, {r0-r2,lr} ; Save used registers
mov r1, #0x68 ; I2C address for DA9034 Pwr Mgr IC
ldr r2, =bbu_FFUART_PHYSICAL_BASE ; Fetch base address of FFUART
str r1, [r2, #bbu_UASPR_offset] ; Store I2C address in the scratch pad register
;
; Set up the A/D converter and have auto conversion run on DAC input #6
;
mov r0, #0x50 ; PMIC register address (Manual Control)
mov r1, #0x10 ; Set the LDO_ADC enable bit
bl BBU_putI2C ; Write to chip
mov r0, #0x52 ; PMIC register address (Auto Control 2)
mov r1, #0x04 ; Set the Auto6 enable bit
bl BBU_putI2C ; Write to chip
mov r0, #0x54 ; PMIC register address (TSI Control 2)
mov r1, #0x80 ; Set the ADCREF bit
bl BBU_putI2C ; Write to chip
;
; Loop to measure the data from the ambient light sensor
; Keep going until the user presses a key
;
352 ldr r0, =BBU_RALS_MSG ; Address of message prefix
bl BBU_putstr ; Output string
mov r0, #0x6B ; Auto-ADC_IN6 register
bl BBU_getI2C ; Read from chip
cmp r2, #0 ; Was there a bus timeout?
beq %F354 ; Yes - take the exit path
mov r0, r1 ; Otherwise copy the value to r0
bl BBU_puthexb ; Send the byte value out to the user
mov r0, #0xD ; <cr> character
bl BBU_putchr ; Return cursor to the start of the line
mov r0, #90 ; set up for r0 millisecond delay
bl BBU_msWait ; Delay
mov r0, #2 ; Do not echo input character
bl BBU_getchr ; Check the keyboard for input
beq %B352 ; Nothing - do another loop
bl BBU_crlf ; New line
b %F359 ; Exit path
;
; Read Error Exit
;
354 ldr r0, =BBU_RALS_RERR ; Error message
bl BBU_putstr ; Output string
;
; Exit path
;
359 ldmfd sp!, {r0-r2,pc} ; Return to caller
;
; RALS Messages
;
BBU_RALS_INS DCB "rals--> Press any key to stop the readings.",0xD,0xA,0
BBU_RALS_MSG DCB "Measured ambient light value = ",0
BBU_RALS_RERR DCB "rals--> Read error - command terminated.",0xD,0xA,0xA,0
ALIGN 4
ENDFUNC
;
;*******************************************************************************
;
; ******************
; * *
; * BBU_CODEC_TBOX * Subroutine
; * *
; ******************
;
; This subroutine deturmines which touch box was hit by the user (if any)
;
; PARAMETER PASSING:
;
; INPUT:
;
; None
;
; OUTPUT:
;
; r0 = touch box number as assigned by the BBU_LCD_TBOX subroutine
; = 0xFF if the user touched the screen but not within the boundries
; of a box.
;
BBU_CODEC_TBOX FUNCTION
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