📄 bbu_cam.s
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; * Each QVGA LCD line is 240 pixels wide (480 for VGA)
; * Move down 90 lines for QVGA (240 for VGA)
; * Move window to right by 40 pixels
; * Multiply by 2 to get the number of bytes into the frame buffer
;
ands r7, r7, #0x01 ; VGA size display?
ldrne r5, =(240 * 80 + 40) * 2 ; Offset to aprox middle of LCD (QVGA)
ldreq r5, =(480 * 240 + 80) * 2 ; Offset to aprox middle of LCD (VGA)
add r6, r6, r5 ; Add offset to LCD buffer base address
;
; Generate the DMA descriptors (one descriptor per line of camera data)
;
310 add r0, r3, #16 ; Generate Virtural address of next descriptor
bl BBU_GetPhysical ; Get the physical address of this location
str r0, [r3], #4 ; Store pointer to next DMA descriptor & inc pointer
ldr r1, =(bbu_CAPTURE_PHYSICAL_BASE + bbu_CIBR0_offset)
str r1, [r3], #4 ; Store DMA data Source address register & inc pointer
str r6, [r3], #4 ; Store DMA destination address & inc pointer
ands r7, r7, #0x01 ; VGA size display?
ldrne r1, =0x40000140 ; No - Magic number for DMA command register (QQVGA)
ldreq r1, =0x40000280 ; Yes - Magic number for DMA command register (QVGA)
str r1, [r3], #4 ; Store DMA command register data
;
; A single DMA descriptor has been generated - set up for next DMA descriptor
;
ands r7, r7, #0x01 ; VGA display?
addne r6, r6, #0x1E0 ; Point to next LCD line for QVGA display
addeq r6, r6, #0x3C0 ; Point to next LCD line for VGA display
subs r2, r2, #1 ; Decrement line count
bne %B310 ; Loop until the count is zero
;
; All the DMA descriptors have been built - the last descriptor needs to
; point back to the first one in order to get the next frame of data
;
sub r3, r3, #16 ; r3 points to descriptor to be modified
ldr r0, =CAM_DMAD0 ; Get start address of DMA descriptors
bl BBU_GetPhysical ; Get the physical address of this location
str r0, [r3] ; Update descriptor pointer
;
; Update the CIFR0 register to enable the Channel 0 FIFO
;
ldr r1, =bbu_CAPTURE_PHYSICAL_BASE ; Reload camera interface base address
mov r2, #0x01 ; 32 byes in Ch 0 causes DMA request
str r2, [r1, #bbu_CIFR0_offset] ; Write the data
;
; Set the camera interface enable bit
;
ldr r2, [r1, #bbu_CICR0_offset] ; Get CICR0 control register value
orr r2, r2, #0x10000000 ; Set the enable bit
str r2, [r1, #bbu_CICR0_offset] ; Load value into control register
;
; Provide some useful information below the camera image for the user.
; BBU is going to assume the welcome screen is up (may not always be the case)
; and set the screen colors according to that.
;
mov r0, #0x7E0 ; Set background color to Green
ldr r1, =BBU_BG_COLOR ; Address of LCD background color
strh r0, [r1] ; Update background color
ldr r0, =0x0000 ; Change text color to Black
ldr r1, =BBU_TX_COLOR ; Address of character color
strh r0, [r1] ; Store text color
ands r7, r7, #0x01 ; Is this a VGA size LCD?
beq %F360 ; Yes - branch to the VGA code
mov r0, #17 ; Row 15 (QVGA screen)
mov r1, #0 ; Column 0
ldr r2, =BBU_CAMV_QQ ; Message address
bl BBU_LCD_put7x11str ; Send it out
b %F390 ; Exit path
360 mov r0, #27 ; Row 27 (VGA screen)
mov r1, #7 ; Column 7
ldr r2, =BBU_CAMV_QV ; Message address
bl BBU_LCD_put11x16str ; Send it out
;
; Return to caller
;
390 ldmfd sp!, {r1-r7, pc} ; Restore r1 - r7 and return to caller
ENDFUNC
;
; Place literal pool here
;
LTORG
;
; Messages
;
BBU_CAMV_QQ DCB " QQVGA size image (160 x 120) ",0
BBU_CAMV_QV DCB "QVGA size image (320 x 240)",0
;
; Allocate space for DMA descriptors for transfer of camera data
;
ALIGN 16
CAM_DMAD0 SPACE (4*4*250) ; 4 bytes * 4 words * 250 lines (max)
;
; OV7670 camera setup for QVGA RGB output
; Upper byte is register address, lower byte is data to be sent to the register.
;
CAM_70Q DCW 0x1280, 0x1103, 0x3A04, 0x1204
DCW 0x40D0, 0x3280, 0x1716, 0x1804
DCW 0x1902, 0x1A7A, 0x030A, 0x0C04
DCW 0x3E19, 0x703A, 0x7135, 0x7211
DCW 0x73F1, 0xA202, 0x7A20, 0x7B10
DCW 0x7C1E, 0x7D35, 0x7E5A, 0x7F69
DCW 0x8076, 0x8180, 0x8288, 0x838F
DCW 0x8496, 0x85A3, 0x86AF, 0x87C4
DCW 0x88D7, 0x89E8, 0x13E0, 0x0000
DCW 0x1000, 0x0D40, 0x1438, 0xA505
DCW 0xAB07, 0x2495, 0x2533, 0x26E3
DCW 0x9F78, 0xA068, 0xA103, 0xA6D8
DCW 0xA7D8, 0xA8F0, 0xA990, 0xAA94
DCW 0x13E5, 0x0E61, 0x0F4B, 0x1602
DCW 0x1E37, 0x2102, 0x2291, 0x2907
DCW 0x330B, 0x350B, 0X371D, 0X3871
DCW 0x392A, 0x3C78, 0x4D40, 0x4E20
DCW 0x6900, 0x6B4A, 0x7410, 0x8D4F
DCW 0x8E00, 0x8F00, 0x9000, 0x9100
DCW 0x9600, 0x9A80, 0xB084, 0xB10C
DCW 0xB20E, 0xB382, 0xB80A, 0x430A
DCW 0x44F0, 0x4534, 0x4658, 0x4728
DCW 0x483A, 0x5988, 0x5A88, 0x5B44
DCW 0x5C67, 0x5D49, 0x5E0E, 0x6C0A
DCW 0x6D55, 0x6E11, 0x6F9F, 0x6A40
DCW 0x0140, 0x0240, 0x13E7, 0x4FB3
DCW 0x50B3, 0x5100, 0x523D, 0x53A7
DCW 0x54E4, 0x589E, 0x4108, 0x3F00
DCW 0x7505, 0x76E1, 0x4C00, 0x7701
DCW 0x3DC0, 0x4B09, 0xC960, 0x4138
DCW 0x5640, 0x3411, 0x3B02, 0xA488
DCW 0x9600, 0x9730, 0x9820, 0x9930
DCW 0x9A84, 0x9B29, 0x9C03, 0x9D4C
DCW 0x9E3F, 0x7804, 0x7901, 0xC8F0
DCW 0x790F, 0xC800, 0x7910, 0xC87E
DCW 0x790A, 0xC880, 0x790B, 0xC801
DCW 0x790C, 0xC80F, 0x790D, 0xC820
DCW 0x7909, 0xC880, 0x7902, 0xC8C0
DCW 0x7903, 0xC840, 0x7905, 0xC830
DCW 0x7926, 0xF110, 0x0F1D, 0x0F1F
DCW 0xFFFF ; End of file marker (0xFFFF)
;
; OV7670 camera setup for QQVGA RGB output
; Upper byte is register address, lower byte is data to be sent to the register.
;
CAM_70QQ
DCW 0x1280, 0x1103, 0x3A04, 0x1204
DCW 0x40D0, 0x3224, 0x1716, 0x1804
DCW 0x1902, 0x1A7A, 0x030A, 0x0C04
DCW 0x3E1A, 0x703A, 0x7135, 0x7222
DCW 0x73F2, 0xA202, 0x7A20, 0x7B10
DCW 0x7C1E, 0x7D35, 0x7E5A, 0x7F69
DCW 0x8076, 0x8180, 0x8288, 0x838F
DCW 0x8496, 0x85A3, 0x86AF, 0x87C4
DCW 0x88D7, 0x89E8, 0x13E0, 0x0000
DCW 0x1000, 0x0D40, 0x1438, 0xA505
DCW 0xAB07, 0x2495, 0x2533, 0x26E3
DCW 0x9F78, 0xA068, 0xA103, 0xA6D8
DCW 0xA7D8, 0xA8F0, 0xA990, 0xAA94
DCW 0x13E5, 0x0E61, 0x0F4B, 0x1602
DCW 0x1E37, 0x2102, 0x2291, 0x2907
DCW 0x330B, 0x350B, 0X371D, 0X3871
DCW 0x392A, 0x3C78, 0x4D40, 0x4E20
DCW 0x6900, 0x6B4A, 0x7410, 0x8D4F
DCW 0x8E00, 0x8F00, 0x9000, 0x9100
DCW 0x9600, 0x9A80, 0xB084, 0xB10C
DCW 0xB20E, 0xB382, 0xB80A, 0x430A
DCW 0x44F0, 0x4534, 0x4658, 0x4728
DCW 0x483A, 0x5988, 0x5A88, 0x5B44
DCW 0x5C67, 0x5D49, 0x5E0E, 0x6C0A
DCW 0x6D55, 0x6E11, 0x6F9F, 0x6A40
DCW 0x0140, 0x0240, 0x13E7, 0x4FB3
DCW 0x50B3, 0x5100, 0x523D, 0x53A7
DCW 0x54E4, 0x589E, 0x4108, 0x3F00
DCW 0x7505, 0x76E1, 0x4C00, 0x7701
DCW 0x3DC1, 0x4B09, 0xC960, 0x4138
DCW 0x5640, 0x3411, 0x3B02, 0xA488
DCW 0x9600, 0x9730, 0x9820, 0x9930
DCW 0x9A84, 0x9B29, 0x9C03, 0x9D4C
DCW 0x9E3F, 0x7804, 0x7901, 0xC8F0
DCW 0x790F, 0xC800, 0x7910, 0xC87E
DCW 0x790A, 0xC880, 0x790B, 0xC801
DCW 0x790C, 0xC80F, 0x790D, 0xC820
DCW 0x7909, 0xC880, 0x7902, 0xC8C0
DCW 0x7903, 0xC840, 0x7905, 0xC830
DCW 0x7926, 0xF110, 0x0F1D, 0x0F1F
DCW 0xFFFF ; End of file marker (0xFFFF)
;
; OV3623 camera setup for QVGA RGB output
; Upper byte is register address, lower byte is data to be sent to the register.
;
CAM_20Q
DCW 0x1280, 0x1142, 0x1240
DCW 0xFFFF ; End of setup marker
;
; OV3623 camera setup for QQVGA RGB output
; Upper byte is register address, lower byte is data to be sent to the register.
;
CAM_20QQ
DCW 0x1280
DCW 0xFFFF ; End of setup marker
ALIGN 4
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