📄 bbu_cam.s
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mov r0, #0x0D ; Register address
mov r1, #0 ; Data
bl BBU_putI2C ; Set camera to tri-state ouputs on shutdown
;
; Power up the selected camera (by writing to the GPIO expander)
;
; Note: The GPIO expander is a write only device and takes whatever data
; is sent to it and ouputs it on its output port. For now BBU uses the
; BBU_putI2C routine wich will write the data to the port twice. Time
; permitting, this may be cleaned up at a later date.
;
; SET UP POWER SHUTDOWN PIN TO BASEBOARD AND HI-RES CAMERA
;
10 ldr r1, =bbu_FFUART_PHYSICAL_BASE ; Fetch base address of FFUART
mov r2, #0xA0 ; Slave address (baseboard camera)
str r2, [r1, #bbu_UASPR_offset] ; Put I2C address in the scratch pad register
;
; Power up (or power down) the baseboard camera depending on user's input
;
mov r0, #0x200 ; Special read address
bl BBU_getI2C ; Fetch the current GPIO expander settings
cmp r7, #1 ; Hi-Res camera selected?
bicne r1, r1, #0x20 ; No - disable Hi_Res camera power
orreq r1, r1, #0x20 ; Yes - enable Hi_res camera power
mov r0, r1 ; Copy data into r0 as well
bl BBU_putI2C ; Send the data out - Yes this uses the getI2C command
;
; Power is set up - Allow time for camera to power up
;
mov r0, #100 ; Set up for 100 mS delay...
bl BBU_msWait ; ...to allow camera to power up
;
; Set the camera I2C address into the FFUART scratch pad register
;
ldr r1, =bbu_FFUART_PHYSICAL_BASE ; Fetch base address of FFUART
mov r2, #0x42 ; Camera address (baseboard)
cmp r7, #1 ; Are we initing a Hi-Res camera?
moveq r2, #0x60 ; Yes - change the slave address to 0x60
str r2, [r1, #bbu_UASPR_offset] ; Put I2C address in the scratch pad register
mov r0, #0xB ; For now reading register 0xB is enough
bl BBU_getI2C ; Fetch data
mov r10, r1 ; Save camera type in R10 for now
cmp r2, #0 ; Did the I2C interface time out?
bne %F15 ; No - camera was found - configure it for use
mov r10, #0 ; Indicate that no camera was found...
b %F40 ; ... and exit
;
; Camera found - update the BBU configuration word with the camera type.
;
15 ldr r4, =bbu_stat_data ; Get address where system status data stored
ldr r2, [r4] ; Get system status word
mov r0, r1, LSL #24 ; Move camera ID to uppermost byte
bic r2, r2, #0xFF000000 ; Clear the uppermost byte
orr r2, r2, r0 ; Update the status word
str r2, [r4] ; Save the updated status word
;
; Fetch the LCD type
;
ldr r0, =BBU_LCD_TYPE ; Address where LCD type is saved
ldrb r7, [r0] ; Fetch LCD type
and r7, r7, #0x01 ; Only save the QVGA/VGA bit
;
; Branch to code to configure the specific camera type
;
cmp r1, #0x73 ; Camera type OV7670?
beq %F20 ; Yes
cmp r1, #0x20 ; Camera type OV5623?
beq %F22 ; Yes
cmp r1, #0x21 ; Camera type OV5623?
beq %F22 ; Yes
b %F40 ; Camera not in list - just return
;
; ***** THIS SECTION IS FOR SETUP OF OV7670 VGA CAMERA *****
; Now set up internal registers in the camera - Default is RGB setup
; Get LCD setup so code can configure the DMA descriptors for the
; current LCD setup.
;
20 ands r7, r7, #0x01 ; VGA size display?
ldrne r6, =CAM_70QQ ; No - Location of QQVGA setup code
ldreq r6, =CAM_70Q ; Yes - Location of QVGA setup code
b %F26 ; Skip to setup code
;
; ***** THIS SECTION IS FOR SETUP OF OV3623 5.17 Mpixel CAMERA *****
; Now set up internal registers in the camera - Default is RGB setup
; Get LCD setup so code can configure the DMA descriptors for the
; current LCD setup.
;
22 ands r7, r7, #0x01 ; VGA size display?
ldrne r6, =CAM_20QQ ; No - Location of QQVGA setup code
ldreq r6, =CAM_20Q ; Yes - Location of QVGA setup code
;
; Send selected camera set up data to camera
;
26 ldrh r4, [r6], #2 ; Fetch camera data & increment pointer
mov r5, r4 ; Copy to r5
mov r4, r4, LSR #8 ; Right justify the camera register address
and r0, r4, #0xFF ; Flush out the upper 24 bits (Register address)
and r1, r5, #0xFF ; Flush out the upper 24 bits (Register data)
cmp r4, #0xFF ; End of address/data?
beq %F28 ; Yes - exit out of this loop
bl BBU_putI2C ; Send the data out
mov r4, #0x8000 ; Set up counter
27 subs r4, r4, #1 ; Decrement count
bne %B27 ; Loop until done
cmp r2, #0 ; Is R = 0?
beq %F40 ; YES - Return to caller - device not responding
bne %B26 ; Get next address/data information.
;
; Set up quick capture interface in the PXA3xx processor
;
28 ldr r1, =bbu_CAPTURE_PHYSICAL_BASE ; Load camera interface base address
ldr r2, =bbu_CICR0_20_value ; Get control register 0 value
str r2, [r1, #bbu_CICR0_offset] ; Load value into control register
ands r7, r7, #0x01 ; Test for VGA mode
ldreq r2, =bbu_CICR1_20_valueV ; Get control register 1 value (VGA)
ldrne r2, =bbu_CICR1_20_valueQ ; Get control register 1 value (QVGA)
str r2, [r1, #bbu_CICR1_offset] ; Load value into control register
ldr r2, =bbu_CICR2_20_value ; Get control register 2 value
str r2, [r1, #bbu_CICR2_offset] ; Load value into control register
ldreq r2, =bbu_CICR3_20_valueV ; Get control register 3 value (VGA)
ldrne r2, =bbu_CICR3_20_valueQ ; Get control register 3 value (QVGA)
str r2, [r1, #bbu_CICR3_offset] ; Load value into control register
;
; Exit path
;
40 mov r0, r10 ; Return camera type in R0
41 mov r1, r2 ; Copy time out value to r1
42 ldmfd sp!, {r2-r10, pc} ; restore registers, & return to caller
;
; MFPR setup table for the camera interface
; Format is MFPR offset, Alternate function value
; Entries of 0xFF mark the end of the table
;
BBU_MFPR_CAMERA
DCW MFPR_CIF_DD0, MFPR_AF1, MFPR_1X
DCW MFPR_CIF_DD1, MFPR_AF1, MFPR_1X
DCW MFPR_CIF_DD2, MFPR_AF1, MFPR_1X
DCW MFPR_CIF_DD3, MFPR_AF1, MFPR_1X
DCW MFPR_CIF_DD4, MFPR_AF1, MFPR_1X
DCW MFPR_CIF_DD5, MFPR_AF1, MFPR_1X
DCW MFPR_CIF_DD6, MFPR_AF1, MFPR_1X
DCW MFPR_CIF_DD7, MFPR_AF0, MFPR_1X
DCW MFPR_CIF_DD8, MFPR_AF1, MFPR_1X
DCW MFPR_CIF_DD9, MFPR_AF1, MFPR_1X
DCW MFPR_CIF_MCLK, MFPR_AF0, MFPR_3X
DCW MFPR_CIF_PCLK, MFPR_AF0, MFPR_1X
DCW MFPR_CIF_LV, MFPR_AF0, MFPR_1X
DCW MFPR_CIF_FV, MFPR_AF0, MFPR_1X
DCW 0xFF, 0xFF ; End of list
ALIGN 4
ENDFUNC
;*********************************************************************************
;
; ***************
; * *
; * BBU_CAM_DMA * Subroutine
; * *
; ***************
;
; This subroutine is used to start/stop DMA transfer of data from the capture
; interface to the LCD frame buffer
;
; PARAMETER PASSING:
;
; R0 = 0 - To stop the DMA transfer.
; R0 = any other value - Sets up DMA transfer RGB DMA transfer.
;
BBU_CAM_DMA FUNCTION
stmfd sp!, {r1-r7, lr} ; Save r1 - r7 and link register on the stack
;
; Clear the camera interface enable bit (disable the camera interface)
;
ldr r1, =bbu_CAPTURE_PHYSICAL_BASE ; Load camera interface base address
ldr r2, [r1, #bbu_CICR0_offset] ; Get CICR0 control register value
bic r2, r2, #0x10000000 ; Clear the enable bit
str r2, [r1, #bbu_CICR0_offset] ; Write the value back
;
; Exit if input parameter was zero
;
cmp r0, #0 ; Exit at this time?
beq %F390 ; YES! - take exit path
;
; Get LCD setup so code can configure the DMA descriptors for the LCD type
;
ldr r2, =BBU_LCD_TYPE ; Address where LCD type is saved
ldrb r7, [r2] ; Fetch LCD type
;
; Set up for generating RGB DMA desriptor fetch blocks
;
ldr r3, =CAM_DMAD0 ; Get start address of DMA descriptors
mov r0, r3 ; Copy to r0
bl BBU_GetPhysical ; Get the physical address of this location
ands r7, r7, #0x01 ; VGA size display?
ldrne r2, =120 ; No - Number of DMA descriptors to generate
ldreq r2, =240 ; Yes - Number of DMA descriptors to generate
mov r6, #BBU_FDADR0_offset ; Offset to FDADR0 register
str r0, [r1, r6] ; Store physical address in FDADR0 register
ldr r4, =BBU_LCD_BUF ; Get address where LCD frame buffer address is saved
ldr r6, [r4] ; Get LCD frame physical address
;
; Offset video window to middle of screen depending on LCD setup
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