bbu_cam.s

关于PXA310的最小系统的程序,初级学习阶段会有所帮助,汇编语言编写的

;*********************************************************************************
;
;     COPYRIGHT (C) 2006 Marvell International Ltd. All Rights Reserved.
;
;   The information in this file is furnished for informational use only,
;   is subject to change without notice, and should not be construed as
;   a commitment by Marvell. Marvell assumes no responsibility or liability
;   for any errors or inaccuracies that may appear in this software or any
;   documenation that may be provided in association with this software.
;
;*********************************************************************************
;
; Module Name:  bbu_CAM.s
;
; Abstract:  
;
;    This module provides the code required to use the Monahans/Littleton
;    camera interface.
;
;*********************************************************************************

        INCLUDE xlli_PXA3xx_defs.inc    ; Monahans specific definitions (xlli)
        INCLUDE xlli_Platform_defs.inc  ; Littleton specific definitions (xlli)
        INCLUDE bbu_Monahans_defs.inc   ; Monahans specific definitions (bbu)
        INCLUDE bbu_Littleton_defs.inc  ; Littleton specific platform definitons (bbu)

        GLOBAL  BBU_CAM_Init
        GLOBAL  BBU_CAM_DMA

        EXTERN  BBU_msWait              ; Milisecond delay routine
        EXTERN  BBU_putI2C              ; Writes to the (regular) I2C bus
        EXTERN  BBU_getI2C              ; Read from the (regular) I2C bus
        EXTERN  BBU_GetPhysical         ; Virtual to Physical address translation routine

        EXTERN  xlli_MFPR_offset_table  ; MFPR register offset table
        EXTERN  BBU_LCD_BUF             ; LCD frame buffer base address saved here
        EXTERN  BBU_LCD_TYPE            ; LCD type information saved here
        EXTERN  BBU_BG_COLOR            ; Stores LCD BackGround color
        EXTERN  BBU_TX_COLOR            ; Stores LCD text color
        EXTERN  BBU_LCD_put7x11str      ; 7x11 ASCII strings for LCD
        EXTERN  BBU_LCD_put11x16str     ; 11x16 ASCII strings for LCD

        EXTERN  bbu_stat_data           ; Location of BBU status word
;
; CAMERA CAPTURE INTERFACE
;
bbu_CAPTURE_PHYSICAL_BASE   EQU   (0X50000000)

bbu_CICR0_offset        EQU     0x00    ; Capture Interface Control Register 0
bbu_CICR1_offset        EQU     0x04    ; Capture Interface Control Register 1
bbu_CICR2_offset        EQU     0x08    ; Capture Interface Control Register 2
bbu_CICR3_offset        EQU     0x0C    ; Capture Interface Control Register 3
bbu_CICR4_offset        EQU     0x10    ; Capture Interface Control Register 4
bbu_CISR_offset         EQU     0x14    ; Capture Interface Status Register
bbu_CIFR_offset         EQU     0x18    ; Capture Interface FIFO Control Register
bbu_CITOR_offset        EQU     0x1C    ; Capture Interface Time Out Register
bbu_CIBR0_offset        EQU     0x28    ; Capture Interface Receive Buffer Register 0
bbu_CIBR1_offset        EQU     0x30    ; Capture Interface Receive Buffer Register 1
bbu_CIBR2_offset        EQU     0x38    ; Capture Interface Receive Buffer Register 2
bbu_CIFR0_offset        EQU     0xB0    ; Capture Interface FIFO control register

;
;   *****************************
;   **                         **
;   **  DATA FOR CAMERA SETUP  **
;   **                         **
;   *****************************
;
bbu_CICR4_48_value      EQU     0x00880000      ; Camera Inferface Control Register 4
;
;       Data for OV7670 camera (type 0x73)
;
bbu_CICR0_20_value      EQU     0x00001FFF      ; Camera Inferface Control Register 0
bbu_CICR1_20_valueQ     EQU     0x004F811A      ; 8 bits per pixel data (QVGA)
bbu_CICR1_20_valueV     EQU     0x009F811A      ; 8 bits per pixel data (VGA)
bbu_CICR2_20_value      EQU     0x00000000      ; Camera Inferface Control Register 2
bbu_CICR3_20_valueQ     EQU     0x00000077      ; Camera Inferface Control Register 3 (QVGA)
bbu_CICR3_20_valueV     EQU     0x000000EF      ; Camera Inferface Control Register 3 (QVGA)

BBU_FDADR0_offset       EQU     0x00000240      ; Offset to FDADR0 register

;
;       MFPR Setup for camera
;

MFPR_CIF_DD0    EQU     39<<1   ; MFPR_39
MFPR_CIF_DD1    EQU     40<<1   ; MFPR_40
MFPR_CIF_DD2    EQU     41<<1   ; MFPR_41
MFPR_CIF_DD3    EQU     42<<1   ; MFPR_42
MFPR_CIF_DD4    EQU     43<<1   ; MFPR_43
MFPR_CIF_DD5    EQU     44<<1   ; MFPR_44
MFPR_CIF_DD6    EQU     45<<1   ; MFPR_45
MFPR_CIF_DD7    EQU     46<<1   ; MFPR_46
MFPR_CIF_DD8    EQU     47<<1   ; MFPR_47
MFPR_CIF_DD9    EQU     48<<1   ; MFPR_48
MFPR_CIF_MCLK   EQU     49<<1   ; MFPR_49
MFPR_CIF_PCLK   EQU     50<<1   ; MFPR_50
MFPR_CIF_LV     EQU     51<<1   ; MFPR_51
MFPR_CIF_FV     EQU     52<<1   ; MFPR_52


        AREA  |text|,CODE,READONLY,ALIGN = 5 
;
;
;*********************************************************************************
;
;       ****************
;       *              * 
;       * BBU_CAM_Init * Subroutine
;       *              *
;       ****************
;
;       This function initalizes the platform camera for use. BBU will
;       attempt to figure out which of the supported cameras is attached to the
;       platform, save the result in the BBU status word, and then init the
;       camera according to how BBU uses it. 
;
; PARAMETERS REQUIRED:
;
;   INPUT:
;
;       r0 = 0 to init the camera on the Littleton Main board (Address = 0x41)
;       r0 = 1 to init the camera on the Hi-Res camera board (Address = 0x60)
;
;   RETURNED DATA:
;
;       r0 = 0x00 = No Camera found
;       r0 = 0x73 = OmniVision OV7670 camera (Littleton Main Board)
;       r0 = 0x30 = OmniVision OV3630 camera (Hi-Res Board) 3.2 Mpixel 2048 x 1536
;       r0 = 0x20 = OmniVision OV5623 camera (Hi-Res Board) 5.17 Mpixel 2592 x 1944
;       r0 = 0x21 = OmniVision OV5623 camera (Hi-Res Board) 5.17 Mpixel 2592 x 1944
;       r0 = any value not listed above = unsupported camera
;
;       r1 = 0 if I2C bus timed out
;       r1 = non zero value if there was no I2C timeout
;
BBU_CAM_Init    FUNCTION

        stmfd   sp!,    {r2-r10, lr}    ; Save registers & link on stack
;
;       Enable Camera Controller Clock
;
        mov     r7,     r0                              ; Copy user parameter
        ldr     r3,     =xlli_CLKREGS_PHYSICAL_BASE     ; Base address of clock unit
        ldr     r2,     [r3, #xlli_D0CKEN_A_offset]     ; Get current setting of clock enable register
        orr     r2,     r2,     #0x8                    ; Set bit 3 (Camera Inferface Clock Enable)
        str     r2,     [r3, #xlli_D0CKEN_A_offset]     ; Write the register back
;
;       Set up MFP registers to set up camera interface GPIOs
;
        ldr     r1,     =xlli_MFPR_PHYSICAL_BASE; MFPR base address
        ldr     r2,     =xlli_MFPR_offset_table ; MFPR offset lookup table
        ldr     r3,     =BBU_MFPR_CAMERA        ; Entry point into camera setup table

5       ldrh    r4,     [r3],   #2              ; Fetch MFPR offset value
        cmp     r4,     #0xFF                   ; Is this the end of the table?
        beq     %F6                             ; Yes - done with MFPR setup
        ldrh    r4,     [r2, r4]                ; Fetch MFPR register offset from table
        ldrh    r5,     [r3],   #2              ; Fetch alternate function value
        ldrh    r6,     [r3],   #2              ; Fetch this MFPR drive strength
        orr     r5,     r5,     #0x40           ; Set bit 6 in all cases
        orr     r5,     r5,     r6              ; Update drive strength from table
        str     r5,     [r1, r4]                ; Write to MFPR register
        b       %B5                             ; Get next entry from setup table      
;
;       Load the camera control register CICR4 - The controller needs to provide a clock to
;       the camera for the I2C bus to work. The rest of the registers will be set up after
;       the code figures out what camera is installed.
;
6       ldr     r1,     =bbu_CAPTURE_PHYSICAL_BASE      ; Load camera interface base address
        ldr     r2,     =bbu_CICR4_48_value             ; Get control register 4 value

          IF    :DEF:   xlli_PXA310     ; For PXA310 we need to change the divider
        orr     r2,     r2,     #1      ; Slow trhe clock down to 26 MHz
          ENDIF

        str     r2,     [r1, #bbu_CICR4_offset]         ; Load value into control register
;
;       At this point BBU need to find out if a Hi-Res camera is attached to the
;       platform. If it is, there is some set up work to do regardless of which
;       camera the user wants to use. If only the VGA camera on the main board
;       is connected, setup of the Hi-Res camera can be skipped (obviously).
;
        ldr     r1,     =bbu_FFUART_PHYSICAL_BASE       ; Fetch base address of FFUART
        mov     r2,     #0xCC                           ; 8686 board I2C address
        str     r2,     [r1, #bbu_UASPR_offset] ; Put I2C address in the scratch pad register
        mov     r0,     #0x200                  ; Read command for GPIO expander
        bl      BBU_getI2C      ; Fetch the current GPIO expander settings
        cmp     r2,     #0      ; Was there any response (board present?)
        beq     %F10            ; Board not present - We can skip the following!
;
;       The 8686 Hi-Res camera board was detected - The following code sets up
;       the camera so when it is in a powered down state, the camera's ouputs
;       are tri-stated. Ths is done by writing the value 0x00 to register 0x0D.
;
        bic     r1,     r1,     #4      ; Clear ths bit to turn the 8686 board camera on
        mov     r0,     r1              ; Copy into r0
        bl      BBU_putI2C              ; Power up the camera
        mov    r0,      #100    ; Set up for 100 mS delay...
        bl     BBU_msWait       ; ...to allow camera to power up

        ldr     r1,     =bbu_FFUART_PHYSICAL_BASE       ; Fetch base address of FFUART
        mov     r2,     #0x60                           ; Hi-Res Camera address
        str     r2,     [r1, #bbu_UASPR_offset] ; Put I2C address in the scratch pad register