📄 80x86-code.htm
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Base+Index (BP+SI,BX+DI) 8
Base+Index+Displacement (BP+DI,BX+SI) 11
Base+Index+Displacement (BP+SI+disp,BX+DI+disp) 12
</font></pre>
<pre><font color="#008080"> - add 4 cycles for word operands at odd addresses
- add 2 cycles for segment override
- 80188/80186 timings differ from those of the 8088/8086/80286
Task State Calculation</font></pre>
<pre><font color="#008080"> "TS" is defined as switching from VM/486 or 80286 TSS to one of
the following:</font></pre>
<pre><font color="#008080"> ? New Task ?
</font></pre>
<pre><font color="#008080"> ?86 TSS?86 TSS?86 TSS?86 TSS?86 TSS?
? Old Task ?(VM=0)?(VM=1)?(VM=0)?(VM=1)? ?
386 TSS (VM=0) ? ? ? 309 ? 226 ? 282 ?
386 TSS (VM=1) ? ? ? 314 ? 231 ? 287 ?
386 CPU/286 TSS ? ? ? 307 ? 224 ? 280 ?
486 CPU/286 TSS ? 199 ? 177 ? ? ? 180 ?
</font></pre>
<pre><font color="#008080">
Miscellaneous</font></pre>
<pre><font color="#008080"> - all timings are for best case and do not take into account wait
states, instruction alignment, the state of the prefetch queue,
DMA refresh cycles, cache hits/misses or exception processing.
- to convert clocks to nanoseconds divide one microsecond by the
processor speed in MegaHertz:
</font></pre>
<pre><font color="#008080"> (1000MHz/(n MHz)) = X nanoseconds</font></pre>
<pre><font color="#008080"> - see 8086 Architecture
</font></pre>
<pre><font color="#008080">FLAGS - Intel 8086 Family Flags Register</font></pre>
<pre><font color="#008080"> 0 CF Carry Flag
1 1
2 PF Parity Flag
3 0
4 AF Auxiliary Flag
5 0
6 ZF Zero Flag
7 SF Sign Flag
8 TF Trap Flag (Single Step)
9 IF Interrupt Flag
a DF Direction Flag
b OF Overflow flag
c IOPL I/O Privilege Level (286+ only)
e d NT Nested Task Flag (286+ only)
f 0
10 RF Resume Flag (386+ only)
11 VM Virtual Mode Flag (386+ only)</font></pre>
<pre><font color="#008080"> - see PUSHF POPF STI CLI STD CLD
MSW - Machine Status Word (286+ only)
</font></pre>
<pre><font color="#008080"> Machine Status Word
0 Protection Enable (PE)
1 Math Present (MP)
2 Emulation (EM)
3 Task Switched (TS)
4 Extension Type (ET)
5-30 Reserved
31 Paging (PG)
</font></pre>
<pre><font color="#008080"> Bit 0 PE Protection Enable, switches processor between
protected and real mode
Bit 1 MP Math Present, controls function of the WAIT
instruction
Bit 2 EM Emulation, indicates whether coprocessor functions
are to be emulated
Bit 3 TS Task Switched, set and interrogated by coprocessor
on task switches and when interpretting coprocessor
instructions
Bit 4 ET Extension Type, indicates type of coprocessor in
system
Bits 5-30 Reserved
bit 31 PG Paging, indicates whether the processor uses page
tables to translate linear addresses to physical
addresses</font></pre>
<pre><font color="#008080"> - see SMSW LMSW
8086/80186/80286/80386/80486 Instruction Set</font></pre>
<pre><font color="#008080">AAA - Ascii Adjust for Addition</font></pre>
<pre><font color="#008080"> Usage: AAA
Modifies flags: AF CF (OF,PF,SF,ZF undefined)</font></pre>
<pre><font color="#008080"> Changes contents of AL to valid unpacked decimal. The high order
nibble is zeroed.</font></pre>
<pre><font color="#008080"> Clocks Size
Operands 808x 286 386 486 Bytes</font></pre>
<pre><font color="#008080"> none 8 3 4 3 1
</font></pre>
<pre><font color="#008080">AAD - Ascii Adjust for Division</font></pre>
<pre><font color="#008080"> Usage: AAD
Modifies flags: SF ZF PF (AF,CF,OF undefined)</font></pre>
<pre><font color="#008080"> Used before dividing unpacked decimal numbers. Multiplies AH by
10 and the adds result into AL. Sets AH to zero. This instruction
is also known to have an undocumented behavior.</font></pre>
<pre><font color="#008080"> AL := 10*AH+AL
AH := 0</font></pre>
<pre><font color="#008080"> Clocks Size
Operands 808x 286 386 486 Bytes</font></pre>
<pre><font color="#008080"> none 60 14 19 14 2
</font></pre>
<pre><font color="#008080">AAM - Ascii Adjust for Multiplication
</font></pre>
<pre><font color="#008080"> Usage: AAM
Modifies flags: PF SF ZF (AF,CF,OF undefined)</font></pre>
<pre><font color="#008080"> AH := AL / 10
AL := AL mod 10</font></pre>
<pre><font color="#008080"> Used after multiplication of two unpacked decimal numbers, this
instruction adjusts an unpacked decimal number. The high order
nibble of each byte must be zeroed before using this instruction.
This instruction is also known to have an undocumented behavior.</font></pre>
<pre><font color="#008080"> Clocks Size
Operands 808x 286 386 486 Bytes</font></pre>
<pre><font color="#008080"> none 83 16 17 15 2
</font></pre>
<pre><font color="#008080">AAS - Ascii Adjust for Subtraction</font></pre>
<pre><font color="#008080"> Usage: AAS
Modifies flags: AF CF (OF,PF,SF,ZF undefined)</font></pre>
<pre><font color="#008080"> Corrects result of a previous unpacked decimal subtraction in AL.
High order nibble is zeroed.</font></pre>
<pre><font color="#008080"> Clocks Size
Operands 808x 286 386 486 Bytes</font></pre>
<pre><font color="#008080"> none 8 3 4 3 1
ADC - Add With Carry</font></pre>
<pre><font color="#008080"> Usage: ADC dest,src
Modifies flags: AF CF OF SF PF ZF</font></pre>
<pre><font color="#008080"> Sums two binary operands placing the result in the destination.
If CF is set, a 1 is added to the destination.</font></pre>
<pre><font color="#008080"> Clocks Size
Operands 808x 286 386 486 Bytes</font></pre>
<pre><font color="#008080"> reg,reg 3 2 2 1 2
mem,reg 16+EA 7 7 3 2-4 (W88=24+EA)
reg,mem 9+EA 7 6 2 2-4 (W88=13+EA)
reg,immed 4 3 2 1 3-4
mem,immed 17+EA 7 7 3 3-6 (W88=23+EA)
accum,immed 4 3 2 1 2-3
</font></pre>
<pre><font color="#008080">ADD - Arithmetic Addition</font></pre>
<pre><font color="#008080"> Usage: ADD dest,src
Modifies flags: AF CF OF PF SF ZF</font></pre>
<pre><font color="#008080"> Adds "src" to "dest" and replacing the original contents of "dest".
Both operands are binary.</font></pre>
<pre><font color="#008080"> Clocks Size
Operands 808x 286 386 486 Bytes</font></pre>
<pre><font color="#008080"> reg,reg 3 2 2 1 2
mem,reg 16+EA 7 7 3 2-4 (W88=24+EA)
reg,mem 9+EA 7 6 2 2-4 (W88=13+EA)
reg,immed 4 3 2 1 3-4
mem,immed 17+EA 7 7 3 3-6 (W88=23+EA)
accum,immed 4 3 2 1 2-3
</font></pre>
<pre><font color="#008080">AND - Logical And</font></pre>
<pre><font color="#008080"> Usage: AND dest,src
Modifies flags: CF OF PF SF ZF (AF undefined)</font></pre>
<pre><font color="#008080"> Performs a logical AND of the two operands replacing the destination
with the result.</font></pre>
<pre><font color="#008080"> Clocks Size
Operands 808x 286 386 486 Bytes</font></pre>
<pre><font color="#008080"> reg,reg 3 2 2 1 2
mem,reg 16+EA 7 7 3 2-4 (W88=24+EA)
reg,mem 9+EA 7 6 1 2-4 (W88=13+EA)
reg,immed 4 3 2 1 3-4
mem,immed 17+EA 7 7 3 3-6 (W88=23+EA)
accum,immed 4 3 2 1 2-3
</font></pre>
<pre><font color="#008080">ARPL - Adjusted Requested Privilege Level of Selector (286+ PM)</font></pre>
<pre><font color="#008080"> Usage: ARPL dest,src
(286+ protected mode)
Modifies flags: ZF</font></pre>
<pre><font color="#008080"> Compares the RPL bits of "dest" against "src". If the RPL bits
of "dest" are less than "src", the destination RPL bits are set
equal to the source RPL bits and the Zero Flag is set. Otherwise
the Zero Flag is cleared.</font></pre>
<pre><font color="#008080"> Clocks Size
Operands 808x 286 386 486 Bytes</font></pre>
<pre><font color="#008080"> reg,reg - 10 20 9 2
mem,reg - 11 21 9 4
BOUND - Array Index Bound Check (80188+)</font></pre>
<pre><font color="#008080"> Usage: BOUND src,limit
Modifies flags: None</font></pre>
<pre><font color="#008080"> Array index in source register is checked against upper and lower
bounds in memory source. The first word located at "limit" is
the lower boundary and the word at "limit+2" is the upper array bound.
Interrupt 5 occurs if the source value is less than or higher than
the source.</font></pre>
<pre><font color="#008080"> Clocks Size
Operands 808x 286 386 486 Bytes</font></pre>
<pre><font color="#008080"> reg16,mem32 - nj=13 nj=10 7 2
reg32,mem64 - nj=13 nj=10 7 2</font></pre>
<pre><font color="#008080"> - nj = no jump taken
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