psocconfigtbl.lis

Cypress公司开发的2.4G无线键盘鼠标及其Bridge源代码

 0001           DAC_CR_ENABLE:        equ 01h    ; MASK: enable/disable AMux Bus
 0000           
 0000           
 0000           ;;=============================================================================
 0000           ;;      M8C System Macros
 0000           ;;  These macros should be used when their functions are needed.
 0000           ;;=============================================================================
 0000           
 0000           ;----------------------------------------------------
 0000           ;  Swapping Register Banks
 0000           ;----------------------------------------------------
 0000               macro M8C_SetBank0
 0000               and   F, ~FLAG_XIO_MASK
 0000               macro M8C_SetBank1
 0000               or    F, FLAG_XIO_MASK
 0000               macro M8C_EnableGInt
 0000               or    F, FLAG_GLOBAL_IE
 0000               macro M8C_DisableGInt
 0000               and   F, ~FLAG_GLOBAL_IE
 0000               macro M8C_DisableIntMask
 0000               and   reg[@0], ~@1              ; disable specified interrupt enable bit
 0000               macro M8C_EnableIntMask
 0000               or    reg[@0], @1               ; enable specified interrupt enable bit
 0000               macro M8C_ClearIntFlag
 0000               mov   reg[@0], ~@1              ; clear specified interrupt enable bit
 0000               macro M8C_EnableWatchDog
 0000               and   reg[CPU_SCR0], ~CPU_SCR0_PORS_MASK
 0000               macro M8C_ClearWDT
 0000               mov   reg[RES_WDT], 00h
 0000               macro M8C_ClearWDTAndSleep
 0000               mov   reg[RES_WDT], 38h
 0000               macro M8C_Stall
 0000               or    reg[ASY_CR], ASY_CR_SYNCEN
 0000               macro M8C_Unstall
 0000               and   reg[ASY_CR], ~ASY_CR_SYNCEN
 0000               macro M8C_Sleep
 0000               or    reg[CPU_SCR0], CPU_SCR0_SLEEP_MASK
 0000               ; The next instruction to be executed depends on the state of the
 0000               ; various interrupt enable bits. If some interrupts are enabled
 0000               ; and the global interrupts are disabled, the next instruction will
 0000               ; be the one that follows the invocation of this macro. If global
 0000               ; interrupts are also enabled then the next instruction will be
 0000               ; from the interrupt vector table. If no interrupts are enabled
 0000               ; then the CPU sleeps forever.
 0000               macro M8C_Stop
 0000               ; In general, you probably don't want to do this, but here's how:
 0000               or    reg[CPU_SCR0], CPU_SCR0_STOP_MASK
 0000               ; Next instruction to be executed is located in the interrupt
 0000               ; vector table entry for Power-On Reset.
 0000               macro M8C_Reset
 0000               ; Restore CPU to the power-on reset state.
 0000               mov A, 0
 0000               SSC
 0000               ; Next non-supervisor instruction will be at interrupt vector 0.
 0000               macro Suspend_CodeCompressor
 0000               or   F, 0
 0000               macro Resume_CodeCompressor
 0000               add  SP, 0
                export LoadConfigTBL_dongle_Bank1
                export LoadConfigTBL_dongle_Bank0
                export LoadConfigTBL_dongle_Ordered
                AREA lit(rom, rel)
 0000           LoadConfigTBL_dongle_Ordered:
 0000           ;  Ordered Global Register values
 0000 7110          or    F, FLAG_XIO_MASK
 0002 620000            mov     reg[00h], 00h           ; Port_0_DriveMode_0 register (PRT0DM0)
 0005 6201FF            mov     reg[01h], ffh           ; Port_0_DriveMode_1 register (PRT0DM1)
 0008 70EF          and   F, ~FLAG_XIO_MASK
 000A 6203FF            mov     reg[03h], ffh           ; Port_0_DriveMode_2 register (PRT0DM2)
 000D 620200            mov     reg[02h], 00h           ; Port_0_GlobalSelect register (PRT0GS)
 0010 7110          or    F, FLAG_XIO_MASK
 0012 620200            mov     reg[02h], 00h           ; Port_0_IntCtrl_0 register (PRT0IC0)
 0015 620300            mov     reg[03h], 00h           ; Port_0_IntCtrl_1 register (PRT0IC1)
 0018 70EF          and   F, ~FLAG_XIO_MASK
 001A 620100            mov     reg[01h], 00h           ; Port_0_IntEn register (PRT0IE)
 001D 7110          or    F, FLAG_XIO_MASK
 001F 620490            mov     reg[04h], 90h           ; Port_1_DriveMode_0 register (PRT1DM0)
 0022 62056F            mov     reg[05h], 6fh           ; Port_1_DriveMode_1 register (PRT1DM1)
 0025 70EF          and   F, ~FLAG_XIO_MASK
 0027 62074F            mov     reg[07h], 4fh           ; Port_1_DriveMode_2 register (PRT1DM2)
 002A 6206B0            mov     reg[06h], b0h           ; Port_1_GlobalSelect register (PRT1GS)
 002D 7110          or    F, FLAG_XIO_MASK
 002F 620600            mov     reg[06h], 00h           ; Port_1_IntCtrl_0 register (PRT1IC0)
 0032 620700            mov     reg[07h], 00h           ; Port_1_IntCtrl_1 register (PRT1IC1)
 0035 70EF          and   F, ~FLAG_XIO_MASK
 0037 620500            mov     reg[05h], 00h           ; Port_1_IntEn register (PRT1IE)
 003A 7110          or    F, FLAG_XIO_MASK
 003C 620800            mov     reg[08h], 00h           ; Port_2_DriveMode_0 register (PRT2DM0)
 003F 62093F            mov     reg[09h], 3fh           ; Port_2_DriveMode_1 register (PRT2DM1)
 0042 70EF          and   F, ~FLAG_XIO_MASK
 0044 620B3F            mov     reg[0bh], 3fh           ; Port_2_DriveMode_2 register (PRT2DM2)
 0047 620A00            mov     reg[0ah], 00h           ; Port_2_GlobalSelect register (PRT2GS)
 004A 7110          or    F, FLAG_XIO_MASK
 004C 620A00            mov     reg[0ah], 00h           ; Port_2_IntCtrl_0 register (PRT2IC0)
 004F 620B00            mov     reg[0bh], 00h           ; Port_2_IntCtrl_1 register (PRT2IC1)
 0052 70EF          and   F, ~FLAG_XIO_MASK
 0054 620900            mov     reg[09h], 00h           ; Port_2_IntEn register (PRT2IE)
 0057 7110          or    F, FLAG_XIO_MASK
 0059 620C00            mov     reg[0ch], 00h           ; Port_3_DriveMode_0 register (PRT3DM0)
 005C 620D00            mov     reg[0dh], 00h           ; Port_3_DriveMode_1 register (PRT3DM1)
 005F 70EF          and   F, ~FLAG_XIO_MASK
 0061 620F00            mov     reg[0fh], 00h           ; Port_3_DriveMode_2 register (PRT3DM2)
 0064 620E00            mov     reg[0eh], 00h           ; Port_3_GlobalSelect register (PRT3GS)
 0067 7110          or    F, FLAG_XIO_MASK
 0069 620E00            mov     reg[0eh], 00h           ; Port_3_IntCtrl_0 register (PRT3IC0)
 006C 620F00            mov     reg[0fh], 00h           ; Port_3_IntCtrl_1 register (PRT3IC1)
 006F 70EF          and   F, ~FLAG_XIO_MASK
 0071 620D00            mov     reg[0dh], 00h           ; Port_3_IntEn register (PRT3IE)
 0074 7110          or    F, FLAG_XIO_MASK
 0076 621000            mov     reg[10h], 00h           ; Port_4_DriveMode_0 register (PRT4DM0)
 0079 621100            mov     reg[11h], 00h           ; Port_4_DriveMode_1 register (PRT4DM1)
 007C 70EF          and   F, ~FLAG_XIO_MASK
 007E 621300            mov     reg[13h], 00h           ; Port_4_DriveMode_2 register (PRT4DM2)
 0081 621200            mov     reg[12h], 00h           ; Port_4_GlobalSelect register (PRT4GS)
 0084 7110          or    F, FLAG_XIO_MASK
 0086 621200            mov     reg[12h], 00h           ; Port_4_IntCtrl_0 register (PRT4IC0)
 0089 621300            mov     reg[13h], 00h           ; Port_4_IntCtrl_1 register (PRT4IC1)
 008C 70EF          and   F, ~FLAG_XIO_MASK
 008E 621100            mov     reg[11h], 00h           ; Port_4_IntEn register (PRT4IE)
 0091 7110          or    F, FLAG_XIO_MASK
 0093 621400            mov     reg[14h], 00h           ; Port_5_DriveMode_0 register (PRT5DM0)
 0096 621500            mov     reg[15h], 00h           ; Port_5_DriveMode_1 register (PRT5DM1)
 0099 70EF          and   F, ~FLAG_XIO_MASK
 009B 621700            mov     reg[17h], 00h           ; Port_5_DriveMode_2 register (PRT5DM2)
 009E 621600            mov     reg[16h], 00h           ; Port_5_GlobalSelect register (PRT5GS)
 00A1 7110          or    F, FLAG_XIO_MASK
 00A3 621600            mov     reg[16h], 00h           ; Port_5_IntCtrl_0 register (PRT5IC0)
 00A6 621700            mov     reg[17h], 00h           ; Port_5_IntCtrl_1 register (PRT5IC1)
 00A9 70EF          and   F, ~FLAG_XIO_MASK
 00AB 621500            mov     reg[15h], 00h           ; Port_5_IntEn register (PRT5IE)
 00AE 7110          or    F, FLAG_XIO_MASK
 00B0 621C00            mov     reg[1ch], 00h           ; Port_7_DriveMode_0 register (PRT7DM0)
 00B3 621D00            mov     reg[1dh], 00h           ; Port_7_DriveMode_1 register (PRT7DM1)
 00B6 70EF          and   F, ~FLAG_XIO_MASK
 00B8 621F00            mov     reg[1fh], 00h           ; Port_7_DriveMode_2 register (PRT7DM2)
 00BB 621E00            mov     reg[1eh], 00h           ; Port_7_GlobalSelect register (PRT7GS)
 00BE 7110          or    F, FLAG_XIO_MASK
 00C0 621E00            mov     reg[1eh], 00h           ; Port_7_IntCtrl_0 register (PRT7IC0)
 00C3 621F00            mov     reg[1fh], 00h           ; Port_7_IntCtrl_1 register (PRT7IC1)
 00C6 70EF          and   F, ~FLAG_XIO_MASK
 00C8 621D00            mov     reg[1dh], 00h           ; Port_7_IntEn register (PRT7IE)
 00CB 7F                ret
 00CC           LoadConfigTBL_dongle_Bank0:
 00CC           ;  Global Register values
 00CC 6009              db              60h, 09h                ; AnalogColumnInputSelect register (AMX_IN)
 00CE 6600              db              66h, 00h                ; AnalogComparatorControl1 register (CMP_CR1)
 00D0 6100              db              61h, 00h                ; AnalogMuxBusConfig register (AMUXCFG)
 00D2 6305              db              63h, 05h                ; AnalogReferenceControl register (ARF_CR)
 00D4 6500              db              65h, 00h                ; AnalogSyncControl register (ASY_CR)
 00D6 E600              db              e6h, 00h                ; DecimatorControl_0 register (DEC_CR0)
 00D8 E700              db              e7h, 00h                ; DecimatorControl_1 register (DEC_CR1)
 00DA 5600              db              56h, 00h                ; Endpoint0Control register (EP0_CR)
 00DC 5700              db              57h, 00h                ; Endpoint0Count register (EP0_CNT)
 00DE 5800              db              58h, 00h                ; Endpoint0Data0 register (EP0_DR0)
 00E0 5900              db              59h, 00h                ; Endpoint0Data1 register (EP0_DR1)
 00E2 5A00              db              5ah, 00h                ; Endpoint0Data2 register (EP0_DR2)
 00E4 5B00              db              5bh, 00h                ; Endpoint0Data3 register (EP0_DR3)
 00E6 5C00              db              5ch, 00h                ; Endpoint0Data4 register (EP0_DR4)
 00E8 5D00              db              5dh, 00h                ; Endpoint0Data5 register (EP0_DR5)
 00EA 5E00              db              5eh, 00h                ; Endpoint0Data6 register (EP0_DR6)
 00EC 5F00              db              5fh, 00h                ; Endpoint0Data7 register (EP0_DR7)
 00EE 4F00              db              4fh, 00h                ; Endpoint1Count0 register (EP1_CNT)
 00F0 4E00              db              4eh, 00h                ; Endpoint1Count1 register (EP1_CNT1)
 00F2 5100              db              51h, 00h                ; Endpoint2Count0 register (EP2_CNT)
 00F4 5000              db              50h, 00h                ; Endpoint2Count1 register (EP2_CNT1)
 00F6 5300              db              53h, 00h                ; Endpoint3Count0 register (EP3_CNT)
 00F8 5200              db              52h, 00h                ; Endpoint3Count1 register (EP3_CNT1)
 00FA 5500              db              55h, 00h                ; Endpoint4Count0 register (EP4_CNT)
 00FC 5400              db              54h, 00h                ; Endpoint4Count1 register (EP4_CNT1)
 00FE D600              db              d6h, 00h                ; I2CConfig register (I2CCFG)
 0100 B00C              db              b0h, 0ch                ; Row_0_InputMux register (RDI0RI)
 0102 B100              db              b1h, 00h                ; Row_0_InputSync register (RDI0SYN)
 0104 B200              db              b2h, 00h                ; Row_0_LogicInputAMux register (RDI0IS)
 0106 B333