📄 wcdmaspreadandmod.mdl
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Block {
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Block {
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Block {
BlockType Inport
Name "In1"
Position [25, 43, 55, 57]
Port "1"
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Block {
BlockType Reference
Name "Bipolar to\nUnipolar\nConverter"
Ports [1, 1]
Position [135, 26, 215, 74]
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SourceBlock "commutil2/Bipolar to\nUnipolar\nConverter"
SourceType "Bipolar to Unipolar Converter"
M "2"
polarity "Negative"
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Block {
BlockType Outport
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Port "1"
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Line {
SrcBlock "Sign"
SrcPort 1
DstBlock "Bipolar to\nUnipolar\nConverter"
DstPort 1
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Line {
SrcBlock "In1"
SrcPort 1
DstBlock "Sign"
DstPort 1
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Line {
SrcBlock "Bipolar to\nUnipolar\nConverter"
SrcPort 1
DstBlock "Out1"
DstPort 1
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Block {
BlockType Reference
Name "I&Q Demapping"
Ports [1, 1]
Position [580, 330, 645, 370]
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SourceBlock "wcdmalib/Wcdma UE Receiver/I&Q Demapping"
SourceType "I&Q Demapping"
Port {
PortNumber 1
Name "dpch\nbits"
TestPoint off
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LinearAnalysisInput off
RTWStorageClass "Auto"
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Annotation {
Position [291, 140]
BackgroundColor "cyan"
Text "INFO - Demo :\n\nThis demo presents the sim"
"ulation of spreading and modulation \nfor FDD DownLink DPCH channel as specif"
"ied by 3GPP (Rel 99).\n\nThe simulation generates random unipolar bits that a"
"re first\nspread and later scrambled by the appropriate codes before being\n "
"sent over a noisy channel. At the receiver end, a RAKE receiver, \n assigning"
" a different finger for each path, despreads and descrambles to \nextract inf"
"ormation bits and pilot bits which are later used for channel \nestimation. T"
"his simulation assumes perfect timing and carrier recovery.\n"
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Block {
BlockType Reference
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Ports [1, 1]
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SourceBlock "dspbuff3/Buffer"
SourceType "Buffer"
N "2*(numChipsOut/sprdFactor)"
V "0"
ic "0"
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BlockType Inport
Name "In1"
Position [125, 123, 155, 137]
Port "1"
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Interpolate on
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Block {
BlockType Inport
Name "In3"
Position [130, 183, 160, 197]
Port "2"
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}
Block {
BlockType Inport
Name "In4"
Position [125, 243, 155, 257]
Port "3"
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Block {
BlockType Inport
Name "In6"
Position [125, 303, 155, 317]
Port "4"
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Block {
BlockType SubSystem
Name "Collect Data"
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Position [210, 104, 310, 336]
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Block {
BlockType Inport
Name "Bef Spread"
Position [30, 108, 60, 122]
Port "1"
LatchInput off
Interpolate on
}
Block {
BlockType Inport
Name "Before Pulse"
Position [40, 188, 70, 202]
Port "2"
LatchInput off
Interpolate on
}
Block {
BlockType Inport
Name "Channel"
Position [40, 258, 70, 272]
Port "3"
LatchInput off
Interpolate on
}
Block {
BlockType Inport
Name "Rx"
Position [40, 328, 70, 342]
Port "4"
LatchInput off
Interpolate on
}
Block {
BlockType EnablePort
Name "Enable"
Ports []
Position [145, 25, 165, 45]
StatesWhenEnabling "held"
ShowOutputPort off
}
Block {
BlockType Reference
Name "Before Pulse Shaping"
Ports [1]
Position [230, 170, 265, 220]
SourceBlock "dspsnks3/Spectrum\nScope"
SourceType "Spectrum Scope"
ScopeProperties "on"
Domain "Frequency"
HorizSpan "1"
UseBuffer "on"
BufferSize "256"
Overlap "0"
inpFftLenInherit "off"
FFTlength "128"
numAvg "20"
DisplayProperties "off"
AxisGrid "on"
Memory "off"
FrameNumber "off"
AxisLegend "off"
AxisZoom "off"
OpenScopeAtSimStart "on"
OpenScopeImmediately "off"
FigPos "[194 213 592 257]"
AxisProperties "off"
XUnits "Hertz"
XRange "[-Fs/2...Fs/2]"
InheritXIncr "on"
XIncr "1.0"
XLabel "Samples"
YUnits "dB"
YMin "-20"
YMax "20"
YLabel "Magnitude, dB"
LineProperties "off"
LineColors "[1 0 0]"
}
Block {
BlockType Reference
Name "Before Spreading \nSpectrum"
Ports [1]
Position [230, 90, 265, 140]
SourceBlock "dspsnks3/Spectrum\nScope"
SourceType "Spectrum Scope"
ScopeProperties "on"
Domain "Frequency"
HorizSpan "1"
UseBuffer "on"
BufferSize "64"
Overlap "0"
inpFftLenInherit "off"
FFTlength "128"
numAvg "2"
DisplayProperties "off"
AxisGrid "on"
Memory "off"
FrameNumber "off"
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