📄 wcdmamuxandcoding.mdl
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Name "dcch"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
System {
Name "Bernoulli Random\nBinary Generator1"
Location [146, 261, 605, 450]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
Block {
BlockType Reference
Name "DSP Constant"
Ports [0, 1]
Position [65, 105, 100, 135]
SourceBlock "dspsrcs3/DSP\nConstant"
SourceType "DSP Constant"
Value "ones(sampPerFrame,1)*(P(:)'.*ones(1,max(len"
"gth(P),length(seed))))"
InterpretAs1D "off"
SampleMode "Discrete"
Ts "Ts*sampPerFrame"
FramebasedOutput "on"
}
Block {
BlockType Reference
Name "Frame Status Conversion"
Ports [1, 1]
Position [230, 61, 295, 99]
ShowName off
SourceBlock "dspsigattribs/Frame Status\nConversion"
SourceType "Frame Status Conversion"
growRefPort "off"
outframe "Frame-based"
}
Block {
BlockType Reference
Name "Random Source"
Ports [0, 1]
Position [65, 26, 100, 64]
Diagnostics "AllowInheritedTsInSrc"
SourceBlock "dspsrcs3/Random\nSource"
SourceType "Random Source"
SrcType "Uniform"
Min "0"
Max "1"
Mean "0"
Var "1"
RepMode "Specify seed"
Seed "seed(:)'.*ones(1,max(length(P),length(seed)"
"))"
Inherit "off"
SampMode "Discrete"
SampTime "Ts"
SampFrame "dsp_sampFrame"
OutComplex "Real"
}
Block {
BlockType RelationalOperator
Name "Relational Operator"
Position [160, 62, 190, 93]
ShowName off
Operator ">"
}
Block {
BlockType Reference
Name "Reshape"
Ports [1, 1]
Position [340, 68, 370, 92]
ShowName off
SourceBlock "simulink3/Signals\n& Systems/Reshape"
SourceType "Reshape"
OutputDimensionality "Customize"
OutputDimensions "[sampPerFrame,max(length(P),length(seed))]"
}
Block {
BlockType Outport
Name "Out"
Position [405, 73, 435, 87]
Port "1"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Line {
SrcBlock "Random Source"
SrcPort 1
Points [40, 0]
DstBlock "Relational Operator"
DstPort 1
}
Line {
SrcBlock "DSP Constant"
SrcPort 1
Points [40, 0]
DstBlock "Relational Operator"
DstPort 2
}
Line {
SrcBlock "Relational Operator"
SrcPort 1
DstBlock "Frame Status Conversion"
DstPort 1
}
Line {
SrcBlock "Reshape"
SrcPort 1
DstBlock "Out"
DstPort 1
}
Line {
SrcBlock "Frame Status Conversion"
SrcPort 1
DstBlock "Reshape"
DstPort 1
}
}
}
Block {
BlockType Reference
Name "CRC Calculation"
Ports [2, 2]
Position [175, 115, 235, 195]
ShowName off
SourceBlock "wcdmalib/Wcdma Multiplexing\nand Channel Coding"
"/CRC Calculation"
SourceType "CRC Calculation"
Port {
PortNumber 1
Name "dtch"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
Port {
PortNumber 2
Name "dcch"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
}
Block {
BlockType Reference
Name "Channel\nDecoding"
Ports [2, 2]
Position [355, 280, 415, 360]
Orientation "left"
NamePlacement "alternate"
ShowName off
SourceBlock "wcdmalib/Wcdma Multiplexing\nand Channel Coding"
"/Channel\nDecoding"
SourceType "Channel Decoding"
Port {
PortNumber 1
Name "dtch"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
Port {
PortNumber 2
Name "dcch"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
}
Block {
BlockType Reference
Name "Channel\nEncoding"
Ports [2, 2]
Position [360, 115, 420, 195]
ShowName off
SourceBlock "wcdmalib/Wcdma Multiplexing\nand Channel Coding"
"/Channel\nEncoding"
SourceType "Channel Encoding"
Port {
PortNumber 1
Name "dtch"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
Port {
PortNumber 2
Name "dcch"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
}
Block {
BlockType Reference
Name "Code Blk Concatenat\nTrBlk Segment"
Ports [2, 2]
Position [265, 280, 325, 360]
Orientation "left"
NamePlacement "alternate"
ShowName off
SourceBlock "wcdmalib/Wcdma Multiplexing\nand Channel Coding"
"/Code Blk Concatenat\nTrBlk Segment"
SourceType "Code BlK Concatenation and TrBlk Segmentation"
trBlkSetSize "trBlkSetSize"
trBlkSize "trBlkSize"
crcSize "crcSize"
Port {
PortNumber 1
Name "dtch"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
Port {
PortNumber 2
Name "dcch"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
}
Block {
BlockType DigitalClock
Name "Digital Clock"
Position [810, 528, 875, 552]
ShowName off
FontSize 9
SampleTime "0.01"
}
Block {
BlockType Display
Name "Display"
Ports [1]
Position [20, 298, 100, 322]
Orientation "left"
NamePlacement "alternate"
ShowName off
Format "short"
Decimation "1"
Floating off
SampleTime "-1"
}
Block {
BlockType Display
Name "Display1"
Ports [1]
Position [20, 348, 100, 372]
Orientation "left"
NamePlacement "alternate"
ShowName off
Format "short"
Decimation "1"
Floating off
SampleTime "-1"
}
Block {
BlockType Reference
Name "Error Rate Calculation"
Ports [2, 1]
Position [435, 485, 515, 525]
ShowName off
SourceBlock "commsink2/Error Rate Calculation"
SourceType "Error Rate Calculation"
N "totalBitsDelay(1)"
st_delay "0"
cp_mode "Entire frame"
subframe "[]"
PMode "Port"
WsName "ErrorVec"
RsMode2 off
stop off
numErr "100"
maxBits "1e6"
}
Block {
BlockType Reference
Name "Error Rate Calculation1"
Ports [2, 1]
Position [435, 555, 515, 595]
ShowName off
SourceBlock "commsink2/Error Rate Calculation"
SourceType "Error Rate Calculation"
N "totalBitsDelay(2)"
st_delay "0"
cp_mode "Entire frame"
subframe "[]"
PMode "Port"
WsName "ErrorVec"
RsMode2 off
stop off
numErr "100"
maxBits "1e6"
}
Block {
BlockType From
Name "From3"
Position [315, 487, 395, 503]
ShowName off
CloseFcn "tagdialog Close"
GotoTag "dtch_Tx"
}
Block {
BlockType From
Name "From4"
Position [315, 557, 395, 573]
ShowName off
CloseFcn "tagdialog Close"
GotoTag "dcch_Tx"
}
Block {
BlockType From
Name "From5"
Position [315, 507, 395, 523]
ShowName off
CloseFcn "tagdialog Close"
GotoTag "dtch_Rx"
}
Block {
BlockType From
Name "From6"
Position [315, 577, 395, 593]
ShowName off
CloseFcn "tagdialog Close"
GotoTag "dcch_Rx"
}
Block {
BlockType Goto
Name "Goto1"
Position [200, 87, 280, 103]
ShowName off
GotoTag "dtch_Tx"
TagVisibility "global"
}
Block {
BlockType Goto
Name "Goto2"
Position [60, 277, 140, 293]
Orientation "left"
NamePlacement "alternate"
ShowName off
GotoTag "dtch_Rx"
TagVisibility "global"
}
Block {
BlockType Goto
Name "Goto3"
Position [195, 207, 275, 223]
ShowName off
GotoTag "dcch_Tx"
TagVisibility "global"
}
Block {
BlockType Goto
Name "Goto4"
Position [60, 327, 140, 343]
Orientation "left"
NamePlacement "alternate"
ShowName off
GotoTag "dcch_Rx"
TagVisibility "global"
}
Block {
BlockType SubSystem
Name "Info"
Ports []
Position [90, 520, 154, 570]
BackgroundColor "cyan"
DropShadow on
ShowName off
FontSize 12
ShowPortLabels on
TreatAsAtomicUnit off
RTWSystemCode "Auto"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
MaskDisplay "disp('Info');"
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate "none"
MaskIconUnits "autoscale"
System {
Name "Info"
Location [209, 325, 772, 594]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
Annotation {
Position [281, 135]
BackgroundColor "cyan"
Text "INFO - Demo:\n\nThis demo presents the simu"
"lation of the Multiplexing and Channel \nDecoding structure for FDD downlink "
"as specified by 3GPP (Rel 99).\n\nData arriving from higher layers in form of"
" Transport blocks and \nTransport block sets every Transmission Time Interval"
" (TTI) is \nencoded and multiplexed with other Transport channels before bein"
"g\nsent to the spreading and modulation block.\n\nTransport channel coding an"
"d multiplexing is a combination of error\ndetection, error correction, rate m"
"atching, interleaving and \nmapping onto different Physical channels."
DropShadow on
FontName "Arial"
}
}
}
Block {
BlockType Reference
Name "Mean"
Ports [1, 1]
Position [115, 347, 150, 373]
Orientation "left"
NamePlacement "alternate"
ShowName off
SourceBlock "dspstat3/Mean"
SourceType "Mean"
run on
reset_popup "None"
}
Block {
BlockType Reference
Name "Mean1"
Ports [1, 1]
Position [115, 297, 150, 323]
Orientation "left"
NamePlacement "alternate"
ShowName off
SourceBlock "dspstat3/Mean"
SourceType "Mean"
run on
reset_popup "None"
}
Block {
BlockType Reference
Name "PhCh\nConcatenation"
Ports [1, 1]
Position [740, 280, 800, 360]
Orientation "left"
NamePlacement "alternate"
ShowName off
SourceBlock "wcdmalib/Wcdma Multiplexing\nand Channel Coding"
"/PhCh\nConcatenation"
SourceType "PhCh Concatenation"
Port {
PortNumber 1
Name "cctrch"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
}
Block {
BlockType Reference
Name "PhCh\nSegmentation"
Ports [1, 1]
Position [745, 115, 805, 195]
ShowName off
SourceBlock "wcdmalib/Wcdma Multiplexing\nand Channel Coding"
"/PhCh\nSegmentation"
SourceType "PhCh Segmentation"
Port {
PortNumber 1
Name "cctrch"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
}
Block {
BlockType Reference
Name "Radio Frame \nConcatenation"
Ports [1, 2]
Position [645, 280, 705, 360]
Orientation "left"
NamePlacement "alternate"
ShowName off
SourceBlock "wcdmalib/Wcdma Multiplexing\nand Channel Coding"
"/Radio Frame \nConcatenation"
SourceType "Radio Frame Concatenation"
numBits "numBitsFirstInt"
tti "tti"
checkDelay off
Port {
PortNumber 1
Name "dtch"
TestPoint off
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