📄 usbd_otghs.lst
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673 sizeEpt | AT91C_OTGHS_EPT_DIR_OUT | AT91C_OTGHS_EPT_TYPE_BUL_EPT | AT91C_OTGHS_BK_NUMBER_2;
674 #else
675 pInterface->OTGHS_DEVEPTCFG[bEndpoint] = AT91C_OTGHS_ALLOC | AT91C_OTGHS_AUTOSW |
676 sizeEpt | AT91C_OTGHS_EPT_DIR_OUT | AT91C_OTGHS_EPT_TYPE_BUL_EPT | AT91C_OTGHS_BK_NUMBER_2;
677 #endif
678 }
679 break;
680
681 //---------------------------
682 case ENDPOINT_TYPE_INTERRUPT:
683 //---------------------------
684 if (endpointDir) {
685 TRACE_INFO("Interrupt In[%d]\n\r",bEndpoint);
686 //! Configure endpoint
687 #ifndef DMA
688 pInterface->OTGHS_DEVEPTCFG[bEndpoint] = AT91C_OTGHS_ALLOC |
689 sizeEpt | AT91C_OTGHS_EPT_DIR_IN | AT91C_OTGHS_EPT_TYPE_INT_EPT | AT91C_OTGHS_BK_NUMBER_2;
690 #else
691 pInterface->OTGHS_DEVEPTCFG[bEndpoint] = AT91C_OTGHS_ALLOC | AT91C_OTGHS_AUTOSW |
692 sizeEpt | AT91C_OTGHS_EPT_DIR_IN | AT91C_OTGHS_EPT_TYPE_INT_EPT | AT91C_OTGHS_BK_NUMBER_2;
693 #endif
694
695 }
696 else {
697 TRACE_INFO("Interrupt Out[%d]\n\r",bEndpoint);
698 //! Configure endpoint
699 #ifndef DMA
700 pInterface->OTGHS_DEVEPTCFG[bEndpoint] = AT91C_OTGHS_ALLOC |
701 sizeEpt | AT91C_OTGHS_EPT_DIR_OUT | AT91C_OTGHS_EPT_TYPE_INT_EPT | AT91C_OTGHS_BK_NUMBER_2;
702 #else
703 pInterface->OTGHS_DEVEPTCFG[bEndpoint] = AT91C_OTGHS_ALLOC | AT91C_OTGHS_AUTOSW |
704 sizeEpt | AT91C_OTGHS_EPT_DIR_OUT | AT91C_OTGHS_EPT_TYPE_INT_EPT | AT91C_OTGHS_BK_NUMBER_2;
705 #endif
706
707 }
708 break;
709
710 //------
711 default:
712 //------
713 TRACE_ERROR(" unknown endpoint type\n\r");
714 return false;
715 }
716
717 // Check if the configuration is ok
718 if (ISCLEARED(pInterface->OTGHS_DEVEPTCSR[bEndpoint], AT91C_OTGHS_CFGOK)) {
719
720 TRACE_FATAL("OTGHS_ConfigureEndpoint: Cannot configure endpoint\n\r");
721 return false;
722 }
723
724 return true;
725 }
726
727
728 //------------------------------------------------------------------------------
729 // Interrupt service routine
730 //------------------------------------------------------------------------------
731 #ifdef DMA
732 //----------------------------------------------------------------------------
733 //! \fn OTGHS_DmaHandler
734 //! \brief This function (ISR) handles DMA interrupts
735 //----------------------------------------------------------------------------
736 static void OTGHS_DmaHandler(const S_usb *pUsb, unsigned char endpoint)
737 {
738 AT91PS_OTGHS pInterface = OTGHS_GetDriverInterface(pUsb);
739 S_usb_endpoint *pEndpoint = USB_GetEndpoint(pUsb, endpoint);
740 unsigned int csr;
741
742 csr = pInterface->OTGHS_DEVDMA[endpoint].OTGHS_DEVDMASTATUS;
743 pInterface->OTGHS_DEVIDR = (1<<SHIFT_DMA<<endpoint);
744
745 if((csr & AT91C_OTGHS_END_BF_ST) || (csr & AT91C_OTGHS_END_TR_ST)) {
746 // READ
747 TRACE_DEBUG_M("END_BF_ST\n\r");
748 pEndpoint->dBytesTransferred = pEndpoint->dBytesBuffered;
749 pEndpoint->dBytesBuffered = 0;
750
751 TRACE_DEBUG_M("dBytesBuffered: 0x%x\n\r",pEndpoint->dBytesBuffered);
752 TRACE_DEBUG_M("dBytesRemaining: 0x%x\n\r",pEndpoint->dBytesRemaining);
753 TRACE_DEBUG_M("dBytesTransferred: 0x%x\n\r",pEndpoint->dBytesTransferred);
754
755 OTGHS_EndOfTransfer(pEndpoint, USB_STATUS_SUCCESS);
756 pEndpoint->dState = endpointStateIdle;
757 }
758 else {
759 TRACE_FATAL("Probleme IT DMA\n\r");
760 }
761 }
762 #endif
763
764
765 //------------------------------------------------------------------------------
766 // \brief OTGHS interrupt handler
767 //
768 // Manages device resume, suspend, end of bus reset. Forwards endpoint
769 // interrupts to the appropriate handler.
770 // \param pUsb Pointer to a S_usb instance
771 //------------------------------------------------------------------------------
772 static void OTGHS_Handler(const S_usb *pUsb)
773 {
774 AT91PS_OTGHS pInterface = OTGHS_GetDriverInterface(pUsb);
775 unsigned int dStatus;
776 unsigned char numIT;
777
778 if ( (!ISSET(USB_GetState(pUsb), USB_STATE_SUSPENDED))
779 && (ISSET(USB_GetState(pUsb), USB_STATE_POWERED))){
780
781 LED_TOGGLE(LED_USB);
782 }
783
784 TRACE_DEBUG_H("Hlr ");
785
786 // Get General interrupts status
787 dStatus = pInterface->OTGHS_SR & pInterface->OTGHS_CTRL & 0xFF;
788 while (dStatus != 0) {
789
790 if(ISSET(dStatus, AT91C_OTGHS_VBUSTI))
791 {
792 TRACE_DEBUG_M("__VBus\n\r");
793
794 USB_Attach(pUsb);
795
796 // Acknowledge the interrupt
797 pInterface->OTGHS_SCR = AT91C_OTGHS_VBUSTI;
798 }
799
800 // Don't treat others interrupt for this time
801 pInterface->OTGHS_SCR = AT91C_OTGHS_IDT | AT91C_OTGHS_SRP
802 | AT91C_OTGHS_VBERR | AT91C_OTGHS_BCERR
803 | AT91C_OTGHS_ROLEEX | AT91C_OTGHS_HNPERR
804 | AT91C_OTGHS_STO;
805
806 dStatus = pInterface->OTGHS_SR & pInterface->OTGHS_CTRL & 0xFF;
807 }
808
809
810 // Get OTG Device interrupts status
811 dStatus = pInterface->OTGHS_DEVISR & pInterface->OTGHS_DEVIMR;
812 TRACE_DEBUG_H("OTGHS_DEVISR:0x%X\n\r", pInterface->OTGHS_DEVISR);
813 while (dStatus != 0) {
814
815 // Start Of Frame (SOF)
816 if (ISSET(dStatus, AT91C_OTGHS_SOF)) {
817 TRACE_DEBUG_WP("SOF ");
818
819 // Invoke the SOF callback
820 USB_StartOfFrameCallback(pUsb);
821
822 // Acknowledge interrupt
823 SET(pInterface->OTGHS_DEVICR, AT91C_OTGHS_SOF);
824 CLEAR(dStatus, AT91C_OTGHS_SOF);
825 }
826
827 // Suspend
828 else if (dStatus & AT91C_OTGHS_SUSP) {
829
830 TRACE_DEBUG_M("S ");
831
832 if (!ISSET(USB_GetState(pUsb), USB_STATE_SUSPENDED)) {
833
834 // The device enters the Suspended state
835 // MCK + UDPCK must be off
836 // Pull-Up must be connected
837 // Transceiver must be disabled
838
839 // Enable wakeup
840 SET(pInterface->OTGHS_DEVIER, AT91C_OTGHS_EORST | AT91C_OTGHS_WAKEUP | AT91C_OTGHS_EORSM);
841
842 // Acknowledge interrupt
843 pInterface->OTGHS_DEVICR = AT91C_OTGHS_SUSP;
844 SET(*(pUsb->pState), USB_STATE_SUSPENDED);
845 OTGHS_DisableTransceiver(pUsb);
846 OTGHS_DisableMCK(pUsb);
847 OTGHS_DisableOTGHSCK(pUsb);
848
849 // Invoke the Suspend callback
850
851 USB_SuspendCallback(pUsb);
852 }
853 }
854
855 // Resume
856 else if (ISSET(dStatus, AT91C_OTGHS_WAKEUP)
857 || ISSET(dStatus, AT91C_OTGHS_EORSM)) {
858
859 // Invoke the Resume callback
860 USB_ResumeCallback(pUsb);
861
862 TRACE_DEBUG_M("R ");
863
864 // The device enters Configured state
865 // MCK + UDPCK must be on
866 // Pull-Up must be connected
867 // Transceiver must be enabled
868
869 if (ISSET(USB_GetState(pUsb), USB_STATE_SUSPENDED)) {
870
871 // Powered state
872 OTGHS_EnableMCK(pUsb);
873 OTGHS_EnableOTGHSCK(pUsb);
874
875 // Default state
876 if (ISSET(USB_GetState(pUsb), USB_STATE_DEFAULT)) {
877
878 OTGHS_EnableTransceiver(pUsb);
879 }
880
881 CLEAR(*(pUsb->pState), USB_STATE_SUSPENDED);
882 }
883 pInterface->OTGHS_DEVICR =
884 (AT91C_OTGHS_WAKEUP | AT91C_OTGHS_EORSM | AT91C_OTGHS_SUSP);
885
886 pInterface->OTGHS_DEVIER = (AT91C_OTGHS_EORST | AT91C_OTGHS_SUSP);
887 pInterface->OTGHS_DEVICR = (AT91C_OTGHS_WAKEUP | AT91C_OTGHS_EORSM);
888 pInterface->OTGHS_DEVIDR = AT91C_OTGHS_WAKEUP;
889
890 }
891
892 // End of bus reset
893 else if (dStatus & AT91C_OTGHS_EORST) {
894
895 TRACE_DEBUG_M("EoB ");
896 // The device enters the Default state
897 // MCK + UDPCK are already enabled
898 // Pull-Up is already connected
899 // Transceiver must be enabled
900 // Endpoint 0 must be enabled
901 SET(*(pUsb->pState), USB_STATE_DEFAULT);
902
903 OTGHS_EnableTransceiver(pUsb);
904
905 // The device leaves the Address & Configured states
906 CLEAR(*(pUsb->pState), USB_STATE_ADDRESS | USB_STATE_CONFIGURED);
907 OTGHS_ResetEndpoints(pUsb);
908 OTGHS_DisableEndpoints(pUsb);
909 OTGHS_ConfigureEndpoint(pUsb, 0);
910
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