📄 routine2.lst
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ASEM-51 V1.3 Copyright (c) 2002 by W.W. Heinz PAGE 1
MCS-51 Family Macro Assembler A S E M - 5 1 V 1.3
=====================================================
Source File: E:\MiCrOConTroller\Coba_M-IDE\I2CROUTINE\ROUTINE2.asm
Object File: E:\MiCrOConTroller\Coba_M-IDE\I2CROUTINE\ROUTINE2.hex
List File: E:\MiCrOConTroller\Coba_M-IDE\I2CROUTINE\ROUTINE2.lst
Line I Addr Code Source
1: ;***I2C Routines for 8051***
2:
3: ; I2C connections
4:
5: B 80 SCL BIT P0.0 ;I2C serial clock line
6: B 81 SDA BIT P0.1 ;I2C serial data line
7: ;----------------------------------------------------------------
8:
9: N 00D0 SAW EQU 0D0H ;Slave address for write (DS1307)
10: N 00D1 SAR EQU 0D1H ;Slave address for read (DS1307)
11:
12: ;----------------------------------------------------------------
13:
14: ; Data storage locations
15:
16: N 20 BitCnt DATA 20H ;Bit counter for I2C routines
17:
18: ;----------------------------------------------------------------
19:
20: ; Delay - insures minimum high and low clock times on I2C bus.
21: ; This routine must be tuned for the actual oscilator frequency used, shown
22: ; here tuned for a 12MHz clock. Note that the CALL instruction that invokes
23: ; Delay already uses 2 machine cycles.
24:
25: 0000 DELAY:
26: 0000 00 NOP ;NOPs to delay 5 microseconds (minus 4
27: ;machine cycles for CALL and RET)
28: 0001 22 RET
29:
30: ;---------------------------------------------------------------
31:
32: ; start I2C communication
33:
34: 0002 I2C_Start:
35: 0002 D2 80 SETB SCL
36: 0004 D2 81 SETB SDA
37: 0006 11 00 ACALL DELAY
38: 0008 C2 81 CLR SDA
39: 000A 11 00 ACALL DELAY
40: 000C C2 80 CLR SCL
41: 000E 22 RET
42:
43: ;---------------------------------------------------------------
ASEM-51 V1.3 Copyright (c) 2002 by W.W. Heinz PAGE 2
Line I Addr Code Source
44:
45: ; stop I2C communication
46:
47: 000F I2C_Stop:
48: 000F C2 81 CLR SDA
49: 0011 D2 80 SETB SCL
50: 0013 11 00 ACALL DELAY
51: 0015 D2 81 SETB SDA
52: 0017 22 RET
53:
54: ;---------------------------------------------------------------
55:
56: ; write data to I2C devices
57:
58: 0018 I2C_Write:
59: 0018 F9 MOV R1,A
60: 0019 75 20 08 MOV BitCnt,#08H
61: 001C I2C_Write_Loop:
62: 001C 33 RLC A
63: 001D 92 81 MOV SDA,C
64: 001F 00 NOP
65: 0020 D2 80 SETB SCL
66: 0022 11 00 ACALL DELAY
67: 0024 I2C_Write_Loop_Wait:
68: 0024 30 80 FD JNB SCL,$
69: 0027 C2 80 CLR SCL
70: 0029 D5 20 F0 DJNZ BitCnt,I2C_Write_Loop
71: 002C 00 NOP
72: 002D 11 5F ACALL I2C_Ack_Read
73: 002F 50 07 JNC label
74: 0031 E9 MOV A,R1
75: 0032 11 0F ACALL I2C_Stop
76: 0034 11 02 ACALL I2C_Start
77: 0036 80 E0 SJMP I2C_Write
78: 0038 label:
79: 0038 22 RET
80:
81: ;---------------------------------------------------------------
82:
83: ;
84:
85: 0039 I2C_Read_Dummy:
86: 0039 D2 81 SETB SDA
87: 003B E4 CLR A
88: 003C 75 20 08 MOV BitCnt,#08H
89: 003F I2C_Read_Loop:
90: 003F C2 80 CLR SCL
91: 0041 11 00 ACALL DELAY
92: 0043 D2 80 SETB SCL
93: 0045 I2C_Read_Check:
94: 0045 30 80 FD JNB SCL,$
95: 0048 A2 81 MOV C,SDA
96: 004A 33 RLC A
97: 004B D5 20 F1 DJNZ BitCnt,I2C_Read_Loop
98: 004E C2 80 CLR SCL
99: 0050 22 RET
ASEM-51 V1.3 Copyright (c) 2002 by W.W. Heinz PAGE 3
Line I Addr Code Source
100:
101: ;---------------------------------------------------------------
102:
103: ;
104:
105: 0051 I2C_Ack_Write:
106: 0051 C2 81 CLR SDA
107: 0053 00 NOP
108: 0054 D2 80 SETB SCL
109: 0056 11 00 ACALL DELAY
110: 0058 C2 80 CLR SCL
111: 005A D2 81 SETB SDA
112: 005C 11 00 ACALL DELAY
113: 005E 22 RET
114:
115: ;---------------------------------------------------------------
116:
117: ;
118:
119: 005F I2C_Ack_Read:
120: 005F D2 81 SETB SDA
121: 0061 00 NOP
122: 0062 D2 80 SETB SCL
123: 0064 11 00 ACALL DELAY
124: 0066 A2 81 MOV C,SDA
125: 0068 C2 80 CLR SCL
126: 006A 00 NOP
127: 006B 22 RET
128:
129: ;---------------------------------------------------------------
130:
131: ;
132:
133: 006C I2C_Nack_Write:
134: 006C D2 81 SETB SDA
135: 006E 00 NOP
136: 006F D2 80 SETB SCL
137: 0071 11 00 ACALL DELAY
138: 0073 C2 80 CLR SCL
139: 0075 11 00 ACALL DELAY
140: 0077 22 RET
141:
142: ;---------------------------------------------------------------
143:
144: ;
145:
146: 0078 I2C_Read:
147: 0078 11 39 ACALL I2C_Read_Dummy
148: 007A 11 51 ACALL I2C_Ack_Write
149: 007C 22 RET
150:
151: ;---------------------------------------------------------------
152:
153: ;
154:
155: 007D I2C_Read_Last:
ASEM-51 V1.3 Copyright (c) 2002 by W.W. Heinz PAGE 4
Line I Addr Code Source
156: 007D 11 39 ACALL I2C_Read_Dummy
157: 007F 11 6C ACALL I2C_Nack_Write
158: 0081 22 RET
159:
160: ;---------------------------------------------------------------
161: END
register banks used: ---
no errors
ASEM-51 V1.3 Copyright (c) 2002 by W.W. Heinz PAGE 5
L I S T O F S Y M B O L S
=============================
SYMBOL TYPE VALUE LINE
------------------------------------------------------------
??ASEM_51 NUMBER 8051
??VERSION NUMBER 0130
AC BIT D6
ACC DATA E0
B DATA F0
BITCNT DATA 20 16
CY BIT D7
DELAY CODE 0000 25
DPH DATA 83
DPL DATA 82
EA BIT AF
ES BIT AC
ET0 BIT A9
ET1 BIT AB
EX0 BIT A8
EX1 BIT AA
EXTI0 CODE 0003
EXTI1 CODE 0013
F0 BIT D5
I2C_ACK_READ CODE 005F 119
I2C_ACK_WRITE CODE 0051 105
I2C_NACK_WRITE CODE 006C 133
I2C_READ CODE 0078 146
I2C_READ_CHECK CODE 0045 93
I2C_READ_DUMMY CODE 0039 85
I2C_READ_LAST CODE 007D 155
I2C_READ_LOOP CODE 003F 89
I2C_START CODE 0002 34
I2C_STOP CODE 000F 47
I2C_WRITE CODE 0018 58
I2C_WRITE_LOOP CODE 001C 61
I2C_WRITE_LOOP_WAIT CODE 0024 67
IE DATA A8
IE0 BIT 89
IE1 BIT 8B
INT0 BIT B2
INT1 BIT B3
IP DATA B8
IT0 BIT 88
IT1 BIT 8A
LABEL CODE 0038 78
OV BIT D2
P BIT D0
P0 DATA 80
P1 DATA 90
P2 DATA A0
P3 DATA B0
PCON DATA 87
PS BIT BC
PSW DATA D0
ASEM-51 V1.3 Copyright (c) 2002 by W.W. Heinz PAGE 6
SYMBOL TYPE VALUE LINE
------------------------------------------------------------
PT0 BIT B9
PT1 BIT BB
PX0 BIT B8
PX1 BIT BA
RB8 BIT 9A
RD BIT B7
REN BIT 9C
RESET CODE 0000
RI BIT 98
RS0 BIT D3
RS1 BIT D4
RXD BIT B0
SAR NUMBER 00D1 10
SAW NUMBER 00D0 9
SBUF DATA 99
SCL BIT 80 5
SCON DATA 98
SDA BIT 81 6
SINT CODE 0023
SM0 BIT 9F
SM1 BIT 9E
SM2 BIT 9D
SP DATA 81
T0 BIT B4
T1 BIT B5
TB8 BIT 9B
TCON DATA 88
TF0 BIT 8D
TF1 BIT 8F
TH0 DATA 8C
TH1 DATA 8D
TI BIT 99
TIMER0 CODE 000B
TIMER1 CODE 001B
TL0 DATA 8A
TL1 DATA 8B
TMOD DATA 89
TR0 BIT 8C
TR1 BIT 8E
TXD BIT B1
WR BIT B6
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