⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 math.lst

📁 Library for the 8051 microcontroller. such as math routine, hexBCD, LCD, Keyboard, I2C, Remote, Ke
💻 LST
📖 第 1 页 / 共 4 页
字号:
  593:	  0191	28		               add    A, r0
  594:	  0192	FC		               mov    r4, A
  595:	  0193	ED		               mov    A, r5
  596:	  0194	39		               addc   A, r1
  597:	  0195	FD		               mov    r5, A
  598:	  0196	EE		               mov    A, r6
  599:	  0197	3A		               addc   A, r2
  600:	  0198	FE		               mov    r6, A
  601:	  0199	EF		               mov    A, r7
  602:	  019A	3B		               addc   A, r3
  603:	  019B	FF		               mov    r7, A

ASEM-51 V1.3                                        Copyright (c) 2002 by W.W. Heinz                                         PAGE 12



 Line  I  Addr  Code            Source

  604:	  019C	A2 D2		               mov    C, OV
  605:	  019E	22		               ret
  606:
  607:
  608:				;===============================================================
  609:				; subroutine DIV8
  610:				; 8-Bit / 8-Bit to 8-Bit Quotient & Remainder signed Divide
  611:				; 2's Complement Format
  612:				;
  613:				; input:    r0 = Dividend X
  614:				;           r1 = Divisor Y
  615:				;
  616:				; output:   r0 = quotient Q of division Q = X / Y
  617:				;           r1 = remainder
  618:				;
  619:				; calls:    Cr0, Cr1, Mr0
  620:				;
  621:				; alters:   acc, C, Bits 21H & 22H
  622:				;===============================================================
  623:
  624:	  019F	53 D0 E7	DIV8:          anl     PSW, #0E7H      ; Register Bank 0
  625:	  01A2	11 00		               acall   Cr0             ; 2's comp -> Mag/Sign
  626:	  01A4	11 0D		               acall   Cr1             ; 2's comp -> Mag/Sign
  627:	  01A6	31 AB		               acall   UDIV8
  628:	  01A8	11 74		               acall   Mr0             ; Mag/Sign -> 2's Comp
  629:	  01AA	22		               ret
  630:
  631:
  632:				;===============================================================
  633:				; subroutine UDIV8
  634:				; 8-Bit / 8-Bit to 8-Bit Quotient & Remainder Unsigned Divide
  635:				;
  636:				; input:    r0 = Dividend X
  637:				;           r1 = Divisor Y
  638:				;
  639:				; output:   r0 = quotient Q of division Q = X / Y
  640:				;           r1 = remainder
  641:				;           ;
  642:				; alters:   acc, C
  643:				;===============================================================
  644:
  645:	  01AB	C0 F0		UDIV8:         push    b
  646:	  01AD	E8		               mov     a, r0           ; read X and ...
  647:	  01AE	89 F0		               mov     b, r1           ; ... Y
  648:	  01B0	84		               div     ab              ; divide X and Y
  649:	  01B1	F8		               mov     r0, a           ; save result quotient
  650:	  01B2	A9 F0		               mov     r1, b           ; save remainder
  651:	  01B4	D0 F0		               pop     b
  652:	  01B6	22		               ret
  653:
  654:
  655:				;====================================================================
  656:				; subroutine DIV16
  657:				; 16-Bit / 16-Bit to 16-Bit Quotient & remainder signed Divide
  658:				; 2's Complement Format
  659:				;

ASEM-51 V1.3                                        Copyright (c) 2002 by W.W. Heinz                                         PAGE 13



 Line  I  Addr  Code            Source

  660:				; input:    r1, r0 = Dividend X
  661:				;           r3, r2 = Divisor Y
  662:				;
  663:				; output:   r1, r0 = quotient Q of division Q = X / Y
  664:				;           r3, r2 = remainder
  665:				;           Carry C is set if Y = 0, i.e. divide by 0 attempted
  666:				;
  667:				; calls:    UDIV16, Cr0r1, Cr2r3, Mr0r1
  668:				;
  669:				; alters:   acc, r4, r5, r6, r7, flags, Bits 21H & 22H
  670:				;====================================================================
  671:
  672:	  01B7	53 D0 E7	DIV16:         anl     PSW, #0E7H      ; Register Bank 0
  673:	  01BA	EB		               mov     a, r3           ; get divisor high byte
  674:	  01BB	4A		               orl     a, r2           ; OR with low byte
  675:	  01BC	70 02		               jnz     div_OK          ; divisor OK if not 0
  676:	  01BE	D3		               setb    C               ; else, overflow
  677:	  01BF	22		               ret
  678:
  679:	  01C0	C0 82		div_OK:        push    dpl
  680:	  01C2	C0 83		               push    dph
  681:	  01C4	C0 F0		               push    b
  682:	  01C6	11 1A		               acall   Cr0r1           ; 2's comp -> Mag/Sign
  683:	  01C8	11 2E		               acall   Cr2r3           ; 2's comp -> Mag/Sign
  684:	  01CA	31 D6		               acall   UDIV16
  685:	  01CC	11 84		               acall   Mr0r1           ; Mag/Sign -> 2's Comp
  686:	  01CE	C3		               clr     C
  687:	  01CF	D0 F0		               pop     b
  688:	  01D1	D0 83		               pop     dph
  689:	  01D3	D0 82		               pop     dpl
  690:	  01D5	22		               ret                     ; done
  691:
  692:
  693:				;====================================================================
  694:				; subroutine UDIV16
  695:				; 16-Bit / 16-Bit to 16-Bit Quotient & Remainder Unsigned Divide
  696:				;
  697:				; input:    r1, r0 = Dividend X
  698:				;           r3, r2 = Divisor Y
  699:				;
  700:				; output:   r1, r0 = quotient Q of division Q = X / Y
  701:				;           r3, r2 = remainder
  702:				;
  703:				; alters:   acc, B, dpl, dph, r4, r5, r6, r7, flags
  704:				;====================================================================
  705:
  706:	  01D6	7F 00		UDIV16:        mov     r7, #0          ; clear partial remainder
  707:	  01D8	7E 00		               mov     r6, #0
  708:	  01DA	75 F0 10	               mov     B, #16          ; set loop count
  709:
  710:	  01DD	C3		div_loop:      clr     C               ; clear carry flag
  711:	  01DE	E8		               mov     a, r0           ; shift the highest bit of
  712:	  01DF	33		               rlc     a               ; the dividend into...
  713:	  01E0	F8		               mov     r0, a
  714:	  01E1	E9		               mov     a, r1
  715:	  01E2	33		               rlc     a

ASEM-51 V1.3                                        Copyright (c) 2002 by W.W. Heinz                                         PAGE 14



 Line  I  Addr  Code            Source

  716:	  01E3	F9		               mov     r1, a
  717:	  01E4	EE		               mov     a, r6           ; ... the lowest bit of the
  718:	  01E5	33		               rlc     a               ; partial remainder
  719:	  01E6	FE		               mov     r6, a
  720:	  01E7	EF		               mov     a, r7
  721:	  01E8	33		               rlc     a
  722:	  01E9	FF		               mov     r7, a
  723:	  01EA	EE		               mov     a, r6           ; trial subtract divisor
  724:	  01EB	C3		               clr     C               ; from partial remainder
  725:	  01EC	9A		               subb    a, r2
  726:	  01ED	F5 82		               mov     dpl, a
  727:	  01EF	EF		               mov     a, r7
  728:	  01F0	9B		               subb    a, r3
  729:	  01F1	F5 83		               mov     dph, a
  730:	  01F3	B3		               cpl     C               ; complement external borrow
  731:	  01F4	50 04		               jnc     div_1           ; update partial remainder if
  732:				                                       ; borrow
  733:	  01F6	AF 83		               mov     r7, dph         ; update partial remainder
  734:	  01F8	AE 82		               mov     r6, dpl
  735:	  01FA	EC		div_1:         mov     a, r4           ; shift result bit into partial
  736:	  01FB	33		               rlc     a               ; quotient
  737:	  01FC	FC		               mov     r4, a
  738:	  01FD	ED		               mov     a, r5
  739:	  01FE	33		               rlc     a
  740:	  01FF	FD		               mov     r5, a
  741:	  0200	D5 F0 DA	               djnz    B, div_loop
  742:	  0203	ED		               mov     a, r5           ; put quotient in r0, and r1
  743:	  0204	F9		               mov     r1, a
  744:	  0205	EC		               mov     a, r4
  745:	  0206	F8		               mov     r0, a
  746:	  0207	EF		               mov     a, r7           ; get remainder, saved before the
  747:	  0208	FB		               mov     r3, a           ; last subtraction
  748:	  0209	EE		               mov     a, r6
  749:	  020A	FA		               mov     r2, a
  750:	  020B	22		               ret
  751:
  752:
  753:				;====================================================================
  754:				; subroutine DIV32
  755:				; 32-Bit / 16-Bit to 32-Bit Quotient & remainder signed Divide
  756:				; 2's Complement Format
  757:				;
  758:				; input:    r3, r2, r1, r0 = Dividend X
  759:				;           r5, r4 = Divisor Y
  760:				;
  761:				; output:   r3, r2, r1, r0 = quotient Q of division Q = X / Y
  762:				;           r7, r6, r5, r4 = remainder
  763:				;           Carry C is set if Y = 0, i.e. divide by 0 attempted
  764:				;
  765:				; calls:    UDIV32, Cr0r3, Cr4r5, Mr0r3
  766:				;
  767:				; alters:   acc, flags, Bits 21H & 22H
  768:				;====================================================================
  769:
  770:	  020C	53 D0 E7	DIV32:         anl     PSW, #0E7H      ; Register Bank 0
  771:	  020F	EC		               mov     a, r4           ; get divisor high byte

ASEM-51 V1.3                                        Copyright (c) 2002 by W.W. Heinz                                         PAGE 15



 Line  I  Addr  Code            Source

  772:	  0210	4D		               orl     a, r5           ; OR with low byte
  773:	  0211	70 02		               jnz     div32_OK        ; divisor OK if not 0
  774:	  0213	D3		               setb    C               ; else, overflow
  775:	  0214	22		               ret
  776:
  777:	  0215	11 56		div32_OK:      acall   Cr0r3           ; 2's comp -> Mag/Sign
  778:	  0217	11 42		               acall   Cr4r5           ; 2's comp -> Mag/Sign
  779:	  0219	51 1F		               acall   UDIV32
  780:	  021B	11 9A		               acall   Mr0r3           ; Mag/Sign -> 2's Comp
  781:	  021D	C3		               clr     C               ; divisor is not 0
  782:	  021E	22		               ret                     ; done
  783:
  784:
  785:				;====================================================================
  786:				; subroutine UDIV32
  787:				; 32-Bit / 16-Bit to 32-Bit Quotient & Remainder Unsigned Divide
  788:				;
  789:				; input:    r3, r2, r1, r0 = Dividend X
  790:				;           r5, r4 = Divisor Y
  791:				;
  792:				; output:   r3, r2, r1, r0 = quotient Q of division Q = X / Y
  793:				;           r7, r6, r5, r4 = remainder
  794:				;;
  795:				; alters:   acc, flags
  796:				;====================================================================
  797:
  798:	  021F	C0 08		UDIV32:        push    08              ; Save Register Bank 1
  799:	  0221	C0 09		               push    09
  800:	  0223	C0 0A		               push    0AH
  801:	  0225	C0 0B		               push    0BH
  802:	  0227	C0 0C		               push    0CH
  803:	  0229	C0 0D		               push    0DH
  804:	  022B	C0 0E		               push    0EH
  805:	  022D	C0 0F		               push    0FH
  806:	  022F	C0 82		               push    dpl
  807:	  0231	C0 83		               push    dph
  808:	  0233	C0 F0		               push    B
  809:	  0235	D2 D3		               setb    RS0             ; Select Register Bank 1
  810:	  0237	7F 00		               mov     r7, #0          ; clear partial remainder
  811:	  0239	7E 00		               mov     r6, #0
  812:	  023B	7D 00		               mov     r5, #0
  813:	  023D	7C 00		               mov     r4, #0
  814:	  023F	75 F0 20	               mov     B, #32          ; set loop count
  815:
  816:	  0242	C2 D3		div_lp32:      clr     RS0             ; Select Register Bank 0
  817:	  0244	C3		               clr     C               ; clear carry flag
  818:	  0245	E8		               mov     a, r0           ; shift the highest bit of the
  819:	  0246	33		               rlc     a               ; dividend into...
  820:	  0247	F8		               mov     r0, a
  821:	  0248	E9		               mov     a, r1
  822:	  0249	33		               rlc     a
  823:	  024A	F9		               mov     r1, a
  824:	  024B	EA		               mov     a, r2
  825:	  024C	33		               rlc     a
  826:	  024D	FA		               mov     r2, a
  827:	  024E	EB		               mov     a, r3

ASEM-51 V1.3                                        Copyright (c) 2002 by W.W. Heinz                                         PAGE 16



 Line  I  Addr  Code            Source

  828:	  024F	33		               rlc     a
  829:	  0250	FB		               mov     r3, a
  830:	  0251	D2 D3		               setb    RS0             ; Select Register Bank 1
  831:	  0253	EC		               mov     a, r4           ; ... the lowest bit of the
  832:	  0254	33		               rlc     a               ; partial remainder
  833:	  0255	FC		               mov     r4, a
  834:	  0256	ED		               mov     a, r5
  835:	  0257	33		               rlc     a
  836:	  0258	FD		               mov     r5, a
  837:	  0259	EE		               mov     a, r6
  838:	  025A	33		               rlc     a
  839:	  025B	FE		               mov     r6, a
  840:	  025C	EF		               mov     a, r7
  841:	  025D	33		               rlc     a
  842:	  025E	FF		               mov     r7, a
  843:	  025F	EC		               mov     a, r4           ; trial subtract divisor from
  844:	  0260	C3		               clr     C               ; partial remainder
  845:	  0261	95 04		               subb    a, 04
  846:	  0263	F5 82		               mov     dpl, a
  847:	  0265	ED		               mov     a, r5
  848:	  0266	95 05		               subb    a, 05
  849:	  0268	F5 83		               mov     dph, a
  850:	  026A	EE		               mov     a, r6
  851:	  026B	94 00		               subb    a, #0
  852:	  026D	F5 06		               mov     06, a
  853:	  026F	EF		               mov     a, r7
  854:	  0270	94 00		               subb    a, #0
  855:	  0272	F5 07		               mov     07, a
  856:	  0274	B3		               cpl     C               ; complement external borrow
  857:	  0275	50 08		               jnc     div_321         ; update partial remainder if
  858:				                                       ; borrow
  859:	  0277	AF 07		               mov     r7, 07          ; update partial remainder
  860:	  0279	AE 06		               mov     r6, 06
  861:	  027B	AD 83		               mov     r5, dph
  862:	  027D	AC 82		               mov     r4, dpl
  863:	  027F	E8		div_321:       mov     a, r0           ; shift result bit into partial
  864:	  0280	33		               rlc     a               ; quotient
  865:	  0281	F8		               mov     r0, a
  866:	  0282	E9		               mov     a, r1
  867:	  0283	33		               rlc     a
  868:	  0284	F9		               mov     r1, a
  869:	  0285	EA		               mov     a, r2
  870:	  0286	33		               rlc     a
  871:	  0287	FA		               mov     r2, a
  872:	  0288	EB		               mov     a, r3
  873:	  0289	33		               rlc     a
  874:	  028A	FB		               mov     r3, a
  875:	  028B	D5 F0 B4	               djnz    B, div_lp32
  876:
  877:	  028E	8F 07		               mov     07, r7          ; put remainder, saved before the
  878:	  0290	8E 06		               mov     06, r6          ; last subtraction, in bank 0
  879:	  0292	8D 05		               mov     05, r5
  880:	  0294	8C 04		               mov     04, r4
  881:	  0296	8B 03		               mov     03, r3          ; put quotient in bank 0
  882:	  0298	8A 02		               mov     02, r2
  883:	  029A	89 01		               mov     01, r1

ASEM-51 V1.3                                        Copyright (c) 2002 by W.W. Heinz                                         PAGE 17



 Line  I  Addr  Code            Source

  884:	  029C	88 00		               mov     00, r0
  885:	  029E	C2 D3		               clr     RS0
  886:	  02A0	D0 F0		               pop     B
  887:	  02A2	D0 83		               pop     dph
  888:	  02A4	D0 82		               pop     dpl
  889:	  02A6	D0 0F		               pop     0FH             ; Retrieve Register Bank 1
  890:	  02A8	D0 0E		               pop     0EH
  891:	  02AA	D0 0D		               pop     0DH

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -