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📄 serial-eeprom-driver.lst

📁 Library for the 8051 microcontroller. such as math routine, hexBCD, LCD, Keyboard, I2C, Remote, Ke
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字号:

ASEM-51 V1.3                                         Copyright (c) 2002 by W.W. Heinz                                         PAGE 1





       MCS-51 Family Macro Assembler   A S E M - 5 1   V 1.3
       =====================================================



	Source File:	E:\Electronics\MiCrOConTroller\Micro Programming\M-IDE\serial-eeprom\serial-eeprom-driver.asm
	Object File:	E:\Electronics\MiCrOConTroller\Micro Programming\M-IDE\serial-eeprom\serial-eeprom-driver.hex
	List File:	E:\Electronics\MiCrOConTroller\Micro Programming\M-IDE\serial-eeprom\serial-eeprom-driver.lst



 Line  I  Addr  Code            Source

    1:
    2:				;a 93CS46 serial EEPROM connected to port 1
    3:
    4:				;when done accessing, cs and di should be left low
    5:				;and sk should be left high.  pe and pre should be
    6:				;left low, but that really isn't as important
    7:				;when data is output on the do pin, di must be low
    8:
    9:				.equ    cs, 0x90    ; p1.0 - CS - Chip Select
				^
			  @@@@@ illegal statement syntax @@@@@

   10:				.equ    sk, 0x91    ; p1.1 - SK - Clock
				^
			  @@@@@ illegal statement syntax @@@@@

   11:				.equ    di, 0x92    ; p1.2 - DI - Data Input
				^
			  @@@@@ illegal statement syntax @@@@@

   12:				.equ    do, 0x93    ; p1.3 - DO - Data Output
				^
			  @@@@@ illegal statement syntax @@@@@

   13:				.equ    pe, 0x94    ; p1.4 - PE - Program Enable
				^
			  @@@@@ illegal statement syntax @@@@@

   14:				.equ    pre, 0x95   ; p1.5 - PRE - Protect Reg. En.
				^
			  @@@@@ illegal statement syntax @@@@@

   15:
   16:				;********************************************************
   17:				;                 some initial setup
   18:				;********************************************************
   19:
   20:	  0000	D2 00		        setb    pe
						^
			  @@@@@ symbol not defined @@@@@

   21:	  0002	D2 00		        setb    pre
						^

ASEM-51 V1.3                                         Copyright (c) 2002 by W.W. Heinz                                         PAGE 2



 Line  I  Addr  Code            Source

			  @@@@@ symbol not defined @@@@@

   22:	  0004	C2 00		        clr     di
						^
			  @@@@@ symbol not defined @@@@@

   23:	  0006	D2 00		        setb    do
						^
			  @@@@@ symbol not defined @@@@@

   24:	  0008	C2 00		        clr     cs
						^
			  @@@@@ symbol not defined @@@@@

   25:	  000A	D2 00		        setb    sk
						^
			  @@@@@ symbol not defined @@@@@

   26:
   27:				;********************************************************
   28:
   29:	  000C			read:   ;r0 is word address to read, data is returned in
   30:				        ;r2 (lsb) and r3 (msb)
   31:
   32:	  000C	C2 00		        clr     pre
						^
			  @@@@@ symbol not defined @@@@@

   33:	  000E	D2 00		        setb    cs
						^
			  @@@@@ symbol not defined @@@@@

   34:	  0010	00		        nop
   35:
   36:	  0011	C2 00		        clr     sk
						^
			  @@@@@ symbol not defined @@@@@

   37:	  0013	D2 00		        setb    di      ;the start bit
						^
			  @@@@@ symbol not defined @@@@@

   38:	  0015	D2 00		        setb    sk
						^
			  @@@@@ symbol not defined @@@@@

   39:	  0017	C2 00		        clr     sk
						^
			  @@@@@ symbol not defined @@@@@

   40:	  0019	00		        nop
   41:	  001A	D2 00		        setb    sk      ;another '1'
						^
			  @@@@@ symbol not defined @@@@@

   42:	  001C	C2 00		        clr     sk

ASEM-51 V1.3                                         Copyright (c) 2002 by W.W. Heinz                                         PAGE 3



 Line  I  Addr  Code            Source

						^
			  @@@@@ symbol not defined @@@@@

   43:	  001E	C2 00		        clr     di      ;and a '0'
						^
			  @@@@@ symbol not defined @@@@@

   44:	  0020	D2 00		        setb    sk
						^
			  @@@@@ symbol not defined @@@@@

   45:
   46:	  0022	7C 06		        mov     r4, #6
   47:	  0024	E8		        mov     a, r0
   48:	  0025	23		        rl      a
   49:	  0026	23		        rl      a
   50:	  0027	33		read2:  rlc     a
   51:	  0028	C2 00		        clr     sk
						^
			  @@@@@ symbol not defined @@@@@

   52:	  002A	92 00		        mov     di, c   ;and do each address bit
						^
			  @@@@@ symbol not defined @@@@@

   53:	  002C	D2 00		        setb    sk
						^
			  @@@@@ symbol not defined @@@@@

   54:	  002E	DC F7		        djnz    r4, read2
   55:	  0030	C2 00		        clr     di
						^
			  @@@@@ symbol not defined @@@@@

   56:
   57:	  0032	7C 08		        mov     r4, #8
   58:	  0034	E4		        clr     a
   59:	  0035	C2 00		read3:  clr     sk
						^
			  @@@@@ symbol not defined @@@@@

   60:	  0037	00		        nop
   61:	  0038	D2 00		        setb    sk
						^
			  @@@@@ symbol not defined @@@@@

   62:	  003A	A2 00		        mov     c, do
						   ^
			  @@@@@ symbol not defined @@@@@

   63:	  003C	33		        rlc     a
   64:	  003D	DC F6		        djnz    r4, read3
   65:	  003F	FB		        mov     r3, a
   66:	  0040	7C 08		        mov     r4, #8
   67:	  0042	E4		        clr     a
   68:	  0043	C2 00		read4:  clr     sk

ASEM-51 V1.3                                         Copyright (c) 2002 by W.W. Heinz                                         PAGE 4



 Line  I  Addr  Code            Source

						^
			  @@@@@ symbol not defined @@@@@

   69:	  0045	D2 00		        setb    sk
						^
			  @@@@@ symbol not defined @@@@@

   70:	  0047	A2 00		        mov     c, do
						   ^
			  @@@@@ symbol not defined @@@@@

   71:	  0049	33		        rlc     a
   72:	  004A	DC F7		        djnz    r4, read4
   73:	  004C	FA		        mov     r2, a
   74:	  004D	C2 00		        clr     cs
						^
			  @@@@@ symbol not defined @@@@@

   75:	  004F	C2 00		        clr     di
						^
			  @@@@@ symbol not defined @@@@@

   76:	  0051	22		        ret
   77:
   78:				;********************************************************
   79:
   80:	  0052			write:  ;r0 is word address to write, r2 (lsb) and r3 (msb)
   81:	  0052	C2 00		        clr     pre
						^
			  @@@@@ symbol not defined @@@@@

   82:	  0054	D2 00		        setb    pe
						^
			  @@@@@ symbol not defined @@@@@

   83:	  0056	D2 00		        setb    cs
						^
			  @@@@@ symbol not defined @@@@@

   84:	  0058	00		        nop
   85:	  0059	C2 00		        clr     sk
						^
			  @@@@@ symbol not defined @@@@@

   86:	  005B	D2 00		        setb    di      ;the start bit
						^
			  @@@@@ symbol not defined @@@@@

   87:	  005D	D2 00		        setb    sk
						^
			  @@@@@ symbol not defined @@@@@

   88:	  005F	C2 00		        clr     sk
						^
			  @@@@@ symbol not defined @@@@@


ASEM-51 V1.3                                         Copyright (c) 2002 by W.W. Heinz                                         PAGE 5



 Line  I  Addr  Code            Source

   89:	  0061	C2 00		        clr     di      ;a '0'
						^
			  @@@@@ symbol not defined @@@@@

   90:	  0063	D2 00		        setb    sk
						^
			  @@@@@ symbol not defined @@@@@

   91:	  0065	C2 00		        clr     sk
						^
			  @@@@@ symbol not defined @@@@@

   92:	  0067	D2 00		        setb    di      ;a '1'
						^
			  @@@@@ symbol not defined @@@@@

   93:	  0069	D2 00		        setb    sk
						^
			  @@@@@ symbol not defined @@@@@

   94:
   95:	  006B	7C 06		        mov     r4, #6
   96:	  006D	E8		        mov     a, r0
   97:	  006E	23		        rl      a
   98:	  006F	23		        rl      a
   99:	  0070	33		write2: rlc     a
  100:	  0071	C2 00		        clr     sk
						^
			  @@@@@ symbol not defined @@@@@

  101:	  0073	92 00		        mov     di, c   ;and do each address bit
						^
			  @@@@@ symbol not defined @@@@@

  102:	  0075	D2 00		        setb    sk
						^
			  @@@@@ symbol not defined @@@@@

  103:	  0077	DC F7		        djnz    r4, write2
  104:
  105:	  0079	EB		        mov     a, r3
  106:	  007A	7C 08		        mov     r4, #8
  107:	  007C	C2 00		write3: clr     sk
						^
			  @@@@@ symbol not defined @@@@@

  108:	  007E	33		        rlc     a
  109:	  007F	92 00		        mov     di, c
						^
			  @@@@@ symbol not defined @@@@@

  110:	  0081	D2 00		        setb    sk
						^
			  @@@@@ symbol not defined @@@@@

  111:	  0083	DC F7		        djnz    r4, write3

ASEM-51 V1.3                                         Copyright (c) 2002 by W.W. Heinz                                         PAGE 6



 Line  I  Addr  Code            Source

  112:	  0085	EA		        mov     a, r2
  113:	  0086	7C 08		        mov     r4, #8
  114:	  0088	C2 00		write4: clr     sk
						^
			  @@@@@ symbol not defined @@@@@

  115:	  008A	33		        rlc     a
  116:	  008B	92 00		        mov     di, c
						^
			  @@@@@ symbol not defined @@@@@

  117:	  008D	D2 00		        setb    sk
						^
			  @@@@@ symbol not defined @@@@@

  118:	  008F	DC F7		        djnz    r4, write4
  119:	  0091	C2 00		        clr     di
						^
			  @@@@@ symbol not defined @@@@@

  120:	  0093	C2 00		        clr     cs
						^
			  @@@@@ symbol not defined @@@@@

  121:	  0095	00		        nop
  122:	  0096	D2 00		        setb    cs
						^
			  @@@@@ symbol not defined @@@@@

  123:	  0098	00		        nop
  124:	  0099	00		        nop
  125:	  009A	A2 00		write5: mov     c, do
						   ^
			  @@@@@ symbol not defined @@@@@

  126:	  009C	50 FC		        jnc     write5
  127:	  009E	00		        nop
  128:	  009F	C2 00		        clr     cs
						^
			  @@@@@ symbol not defined @@@@@

  129:	  00A1	22		        ret
  130:
  131:				;********************************************************
  132:
  133:	  00A2			pren:   ;enable the protection register (for next cycle)
  134:	  00A2	D2 00		        setb    pre
						^
			  @@@@@ symbol not defined @@@@@

  135:	  00A4	D2 00		        setb    pe
						^
			  @@@@@ symbol not defined @@@@@

  136:	  00A6	D2 00		        setb    cs
						^

ASEM-51 V1.3                                         Copyright (c) 2002 by W.W. Heinz                                         PAGE 7



 Line  I  Addr  Code            Source

			  @@@@@ symbol not defined @@@@@

  137:	  00A8	00		        nop
  138:	  00A9	C2 00		        clr     sk
						^
			  @@@@@ symbol not defined @@@@@

  139:	  00AB	D2 00		        setb    di      ;the start bit
						^
			  @@@@@ symbol not defined @@@@@

  140:	  00AD	D2 00		        setb    sk
						^
			  @@@@@ symbol not defined @@@@@

  141:	  00AF	C2 00		        clr     sk
						^
			  @@@@@ symbol not defined @@@@@

  142:	  00B1	C2 00		        clr     di      ;a '0'
						^
			  @@@@@ symbol not defined @@@@@

  143:	  00B3	D2 00		        setb    sk
						^
			  @@@@@ symbol not defined @@@@@

  144:	  00B5	C2 00		        clr     sk
						^
			  @@@@@ symbol not defined @@@@@

  145:	  00B7	C2 00		        clr     di      ;a '0'
						^
			  @@@@@ symbol not defined @@@@@

  146:	  00B9	D2 00		        setb    sk
						^
			  @@@@@ symbol not defined @@@@@

  147:	  00BB	C2 00		        clr     sk
						^
			  @@@@@ symbol not defined @@@@@

  148:	  00BD	D2 00		        setb    di      ;a '1'
						^
			  @@@@@ symbol not defined @@@@@

  149:	  00BF	D2 00		        setb    sk
						^
			  @@@@@ symbol not defined @@@@@

  150:	  00C1	C2 00		        clr     sk
						^
			  @@@@@ symbol not defined @@@@@

  151:	  00C3	D2 00		        setb    di      ;a '1'

ASEM-51 V1.3                                         Copyright (c) 2002 by W.W. Heinz                                         PAGE 8



 Line  I  Addr  Code            Source

						^
			  @@@@@ symbol not defined @@@@@

  152:	  00C5	D2 00		        setb    sk
						^
			  @@@@@ symbol not defined @@@@@

  153:	  00C7	C2 00		        clr     sk
						^
			  @@@@@ symbol not defined @@@@@

  154:	  00C9	C2 00		        clr     di      ;a '0'
						^
			  @@@@@ symbol not defined @@@@@

  155:	  00CB	D2 00		        setb    sk
						^
			  @@@@@ symbol not defined @@@@@

  156:	  00CD	C2 00		        clr     sk
						^

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