serial-eeprom-driver.asm

Library for the 8051 microcontroller. such as math routine, hexBCD, LCD, Keyboard, I2C, Remote, Ke

;a 93CS46 serial EEPROM connected to port 1

;when done accessing, cs and di should be left low
;and sk should be left high.  pe and pre should be
;left low, but that really isn't as important
;when data is output on the do pin, di must be low

.equ    cs, 0x90    ; p1.0 - CS - Chip Select
.equ    sk, 0x91    ; p1.1 - SK - Clock
.equ    di, 0x92    ; p1.2 - DI - Data Input
.equ    do, 0x93    ; p1.3 - DO - Data Output
.equ    pe, 0x94    ; p1.4 - PE - Program Enable
.equ    pre, 0x95   ; p1.5 - PRE - Protect Reg. En.

;********************************************************
;                 some initial setup
;********************************************************

        setb    pe
        setb    pre
        clr     di
        setb    do
        clr     cs
        setb    sk

;********************************************************

read:   ;r0 is word address to read, data is returned in
        ;r2 (lsb) and r3 (msb)

        clr     pre
        setb    cs
        nop

        clr     sk
        setb    di      ;the start bit
        setb    sk
        clr     sk
        nop
        setb    sk      ;another '1'
        clr     sk
        clr     di      ;and a '0'
        setb    sk

        mov     r4, #6
        mov     a, r0
        rl      a
        rl      a
read2:  rlc     a
        clr     sk
        mov     di, c   ;and do each address bit
        setb    sk
        djnz    r4, read2
        clr     di
  
        mov     r4, #8
        clr     a
read3:  clr     sk
        nop
        setb    sk
        mov     c, do
        rlc     a
        djnz    r4, read3
        mov     r3, a
        mov     r4, #8
        clr     a
read4:  clr     sk
        setb    sk
        mov     c, do
        rlc     a
        djnz    r4, read4
        mov     r2, a
        clr     cs
        clr     di
        ret

;********************************************************

write:  ;r0 is word address to write, r2 (lsb) and r3 (msb)
        clr     pre
        setb    pe
        setb    cs
        nop
        clr     sk
        setb    di      ;the start bit
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        setb    di      ;a '1'
        setb    sk

        mov     r4, #6
        mov     a, r0
        rl      a
        rl      a
write2: rlc     a
        clr     sk
        mov     di, c   ;and do each address bit
        setb    sk
        djnz    r4, write2

        mov     a, r3
        mov     r4, #8
write3: clr     sk
        rlc     a
        mov     di, c
        setb    sk
        djnz    r4, write3
        mov     a, r2
        mov     r4, #8
write4: clr     sk
        rlc     a
        mov     di, c
        setb    sk
        djnz    r4, write4
        clr     di
        clr     cs
        nop
        setb    cs
        nop
        nop
write5: mov     c, do
        jnc     write5
        nop
        clr     cs
        ret

;********************************************************

pren:   ;enable the protection register (for next cycle)
        setb    pre
        setb    pe
        setb    cs
        nop
        clr     sk
        setb    di      ;the start bit
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        setb    di      ;a '1'
        setb    sk
        clr     sk
        setb    di      ;a '1'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     cs
        clr     pre
        ret

;********************************************************

prclear:
        setb    pre
        setb    pe
        setb    cs
        nop
        clr     sk
        setb    di      ;the start bit
        setb    sk
        clr     sk
        setb    di      ;a '1'
        setb    sk
        clr     sk
        setb    di      ;a '1'
        setb    sk
        clr     sk
        setb    di      ;a '1'
        setb    sk
        clr     sk
        setb    di      ;a '1'
        setb    sk
        clr     sk
        setb    di      ;a '1'
        setb    sk
        clr     sk
        setb    di      ;a '1'
        setb    sk
        clr     sk
        setb    di      ;a '1'
        setb    sk
        clr     sk
        setb    di      ;a '1'
        setb    sk
        clr     di
        clr     cs
        clr     pre
        nop
        setb    cs
        nop
        nop
prclr5: mov     c, do
        jnc     prclr5
        nop
        clr     cs
        ret

;********************************************************

prds:   ;permantly fix protect register!!!
        setb    pre
        setb    pe
        setb    cs
        nop
        clr     sk
        setb    di      ;the start bit
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     cs
        clr     pre
        nop
        setb    cs
        nop
        nop
prds5:  mov     c, do
        jnc     prds5
        nop
        clr     cs
        ret

;********************************************************

prwrite: ;r0 is address to write into protect register
        setb    pre
        setb    pe
        setb    cs
        nop
        clr     sk
        setb    di      ;the start bit
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        setb    di      ;a '1'
        setb    sk

        mov     r4, #6
        mov     a, r0
        rl      a
        rl      a
prwrt2: rlc     a
        clr     sk
        mov     di, c   ;and do each address bit
        setb    sk
        djnz    r4, prwrt2
        clr     di
        clr     cs
        clr     pre
        nop
        setb    cs
        nop
        nop
prwrt5: mov     c, do
        jnc     prwrt5
        nop
        clr     cs
        ret

;********************************************************

wen:    ;enable writing
        clr     pre
        setb    pe
        setb    cs
        nop
        clr     sk
        setb    di      ;the start bit
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        setb    di      ;a '1'
        setb    sk
        clr     sk
        setb    di      ;a '1'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     cs
        clr     pre
        ret

;********************************************************

wds:    ;disable writing
        clr     pre
        setb    pe
        setb    cs
        nop
        clr     sk
        setb    di      ;the start bit
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        setb    di      ;a '1'
        setb    sk
        clr     sk
        setb    di      ;a '1'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     sk
        clr     di      ;a '0'
        setb    sk
        clr     cs
        clr     pre
        ret