wave_generator.fit.eqn

用LPM_ROM设计存放一个周期的256×8大小的rom,构建简易频率可控的正弦波发生器。

--L1_q[7] is lpm_rom0:inst3|lpm_rom:lpm_rom_component|altrom:srom|q[7] at EC5_B
L1_q[7]_write_address = WR_ADDR(B1_data1[0], J1_q[0], J1_q[1], J1_q[2], J1_q[3], J1_q[4], J1_q[5], J1_q[6]);
L1_q[7]_read_address = RD_ADDR(B1_data1[0], J1_q[0], J1_q[1], J1_q[2], J1_q[3], J1_q[4], J1_q[5], J1_q[6]);
L1_q[7] = MEMORY_SEGMENT(, , , , , , , , L1_q[7]_write_address, L1_q[7]_read_address);


--L1_q[6] is lpm_rom0:inst3|lpm_rom:lpm_rom_component|altrom:srom|q[6] at EC3_B
L1_q[6]_write_address = WR_ADDR(B1_data1[0], J1_q[0], J1_q[1], J1_q[2], J1_q[3], J1_q[4], J1_q[5], J1_q[6]);
L1_q[6]_read_address = RD_ADDR(B1_data1[0], J1_q[0], J1_q[1], J1_q[2], J1_q[3], J1_q[4], J1_q[5], J1_q[6]);
L1_q[6] = MEMORY_SEGMENT(, , , , , , , , L1_q[6]_write_address, L1_q[6]_read_address);


--L1_q[5] is lpm_rom0:inst3|lpm_rom:lpm_rom_component|altrom:srom|q[5] at EC2_B
L1_q[5]_write_address = WR_ADDR(B1_data1[0], J1_q[0], J1_q[1], J1_q[2], J1_q[3], J1_q[4], J1_q[5], J1_q[6]);
L1_q[5]_read_address = RD_ADDR(B1_data1[0], J1_q[0], J1_q[1], J1_q[2], J1_q[3], J1_q[4], J1_q[5], J1_q[6]);
L1_q[5] = MEMORY_SEGMENT(, , , , , , , , L1_q[5]_write_address, L1_q[5]_read_address);


--L1_q[4] is lpm_rom0:inst3|lpm_rom:lpm_rom_component|altrom:srom|q[4] at EC1_B
L1_q[4]_write_address = WR_ADDR(B1_data1[0], J1_q[0], J1_q[1], J1_q[2], J1_q[3], J1_q[4], J1_q[5], J1_q[6]);
L1_q[4]_read_address = RD_ADDR(B1_data1[0], J1_q[0], J1_q[1], J1_q[2], J1_q[3], J1_q[4], J1_q[5], J1_q[6]);
L1_q[4] = MEMORY_SEGMENT(, , , , , , , , L1_q[4]_write_address, L1_q[4]_read_address);


--L1_q[3] is lpm_rom0:inst3|lpm_rom:lpm_rom_component|altrom:srom|q[3] at EC4_B
L1_q[3]_write_address = WR_ADDR(B1_data1[0], J1_q[0], J1_q[1], J1_q[2], J1_q[3], J1_q[4], J1_q[5], J1_q[6]);
L1_q[3]_read_address = RD_ADDR(B1_data1[0], J1_q[0], J1_q[1], J1_q[2], J1_q[3], J1_q[4], J1_q[5], J1_q[6]);
L1_q[3] = MEMORY_SEGMENT(, , , , , , , , L1_q[3]_write_address, L1_q[3]_read_address);


--L1_q[2] is lpm_rom0:inst3|lpm_rom:lpm_rom_component|altrom:srom|q[2] at EC8_B
L1_q[2]_write_address = WR_ADDR(B1_data1[0], J1_q[0], J1_q[1], J1_q[2], J1_q[3], J1_q[4], J1_q[5], J1_q[6]);
L1_q[2]_read_address = RD_ADDR(B1_data1[0], J1_q[0], J1_q[1], J1_q[2], J1_q[3], J1_q[4], J1_q[5], J1_q[6]);
L1_q[2] = MEMORY_SEGMENT(, , , , , , , , L1_q[2]_write_address, L1_q[2]_read_address);


--L1_q[1] is lpm_rom0:inst3|lpm_rom:lpm_rom_component|altrom:srom|q[1] at EC7_B
L1_q[1]_write_address = WR_ADDR(B1_data1[0], J1_q[0], J1_q[1], J1_q[2], J1_q[3], J1_q[4], J1_q[5], J1_q[6]);
L1_q[1]_read_address = RD_ADDR(B1_data1[0], J1_q[0], J1_q[1], J1_q[2], J1_q[3], J1_q[4], J1_q[5], J1_q[6]);
L1_q[1] = MEMORY_SEGMENT(, , , , , , , , L1_q[1]_write_address, L1_q[1]_read_address);


--L1_q[0] is lpm_rom0:inst3|lpm_rom:lpm_rom_component|altrom:srom|q[0] at EC6_B
L1_q[0]_write_address = WR_ADDR(B1_data1[0], J1_q[0], J1_q[1], J1_q[2], J1_q[3], J1_q[4], J1_q[5], J1_q[6]);
L1_q[0]_read_address = RD_ADDR(B1_data1[0], J1_q[0], J1_q[1], J1_q[2], J1_q[3], J1_q[4], J1_q[5], J1_q[6]);
L1_q[0] = MEMORY_SEGMENT(, , , , , , , , L1_q[0]_write_address, L1_q[0]_read_address);


--B1_data1[0] is address:inst1|data1[0] at LC1_B3
--operation mode is arithmetic

B1_data1[0]_lut_out = !B1_data1[0];
B1_data1[0] = DFFEA(B1_data1[0]_lut_out, clk, , , B1L3, , );

--H3_cout[0] is address:inst1|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[0] at LC1_B3
--operation mode is arithmetic

H3_cout[0] = CARRY(B1_data1[0]);


--J1_q[0] is address:inst1|lpm_counter:data1_rtl_0|alt_counter_f10ke:wysi_counter|q[0] at LC1_B2
--operation mode is up_dn_cntr

J1_q[0]_lut_out = (!J1_q[0] & var) # (H3_cs_buffer[1] & !var);
J1_q[0] = DFFEA(J1_q[0]_lut_out, clk, , , , , );

--J1L3 is address:inst1|lpm_counter:data1_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT at LC1_B2
--operation mode is up_dn_cntr

J1L3 = CARRY(J1_q[0]);


--J1_q[1] is address:inst1|lpm_counter:data1_rtl_0|alt_counter_f10ke:wysi_counter|q[1] at LC2_B2
--operation mode is up_dn_cntr

J1_q[1]_lut_out = (J1_q[1] $ J1L3 & var) # (H3_cs_buffer[2] & !var);
J1_q[1] = DFFEA(J1_q[1]_lut_out, clk, , , , , );

--J1L5 is address:inst1|lpm_counter:data1_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT at LC2_B2
--operation mode is up_dn_cntr

J1L5 = CARRY(J1_q[1] & J1L3);


--J1_q[2] is address:inst1|lpm_counter:data1_rtl_0|alt_counter_f10ke:wysi_counter|q[2] at LC3_B2
--operation mode is up_dn_cntr

J1_q[2]_lut_out = (J1_q[2] $ J1L5 & var) # (H3_cs_buffer[3] & !var);
J1_q[2] = DFFEA(J1_q[2]_lut_out, clk, , , , , );

--J1L7 is address:inst1|lpm_counter:data1_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT at LC3_B2
--operation mode is up_dn_cntr

J1L7 = CARRY(J1_q[2] & J1L5);


--J1_q[3] is address:inst1|lpm_counter:data1_rtl_0|alt_counter_f10ke:wysi_counter|q[3] at LC4_B2
--operation mode is up_dn_cntr

J1_q[3]_lut_out = (J1_q[3] $ J1L7 & var) # (H3_cs_buffer[4] & !var);
J1_q[3] = DFFEA(J1_q[3]_lut_out, clk, , , , , );

--J1L9 is address:inst1|lpm_counter:data1_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT at LC4_B2
--operation mode is up_dn_cntr

J1L9 = CARRY(J1_q[3] & J1L7);


--J1_q[4] is address:inst1|lpm_counter:data1_rtl_0|alt_counter_f10ke:wysi_counter|q[4] at LC5_B2
--operation mode is up_dn_cntr

J1_q[4]_lut_out = (J1_q[4] $ J1L9 & var) # (H3_cs_buffer[5] & !var);
J1_q[4] = DFFEA(J1_q[4]_lut_out, clk, , , , , );

--J1L11 is address:inst1|lpm_counter:data1_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT at LC5_B2
--operation mode is up_dn_cntr

J1L11 = CARRY(J1_q[4] & J1L9);


--J1_q[5] is address:inst1|lpm_counter:data1_rtl_0|alt_counter_f10ke:wysi_counter|q[5] at LC6_B2
--operation mode is up_dn_cntr

J1_q[5]_lut_out = (J1_q[5] $ J1L11 & var) # (H3_cs_buffer[6] & !var);
J1_q[5] = DFFEA(J1_q[5]_lut_out, clk, , , , , );

--J1L31 is address:inst1|lpm_counter:data1_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT at LC6_B2
--operation mode is up_dn_cntr

J1L31 = CARRY(J1_q[5] & J1L11);


--J1_q[6] is address:inst1|lpm_counter:data1_rtl_0|alt_counter_f10ke:wysi_counter|q[6] at LC7_B2
--operation mode is up_dn_cntr

J1_q[6]_lut_out = (J1_q[6] $ J1L31 & var) # (F1_unreg_res_node[7] & !var);
J1_q[6] = DFFEA(J1_q[6]_lut_out, clk, , , , , );


--H3_cs_buffer[1] is address:inst1|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] at LC2_B3
--operation mode is arithmetic

H3_cs_buffer[1] = J1_q[0] $ H3_cout[0];

--H3_cout[1] is address:inst1|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[1] at LC2_B3
--operation mode is arithmetic

H3_cout[1] = CARRY(J1_q[0] & H3_cout[0]);


--H3_cs_buffer[2] is address:inst1|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] at LC3_B3
--operation mode is arithmetic

H3_cs_buffer[2] = J1_q[1] $ H3_cout[1];

--H3_cout[2] is address:inst1|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[2] at LC3_B3
--operation mode is arithmetic

H3_cout[2] = CARRY(J1_q[1] & H3_cout[1]);


--H3_cs_buffer[3] is address:inst1|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] at LC4_B3
--operation mode is arithmetic

H3_cs_buffer[3] = J1_q[2] $ H3_cout[2];

--H3_cout[3] is address:inst1|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[3] at LC4_B3
--operation mode is arithmetic

H3_cout[3] = CARRY(J1_q[2] & H3_cout[2]);


--H3_cs_buffer[4] is address:inst1|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] at LC5_B3
--operation mode is arithmetic

H3_cs_buffer[4] = J1_q[3] $ H3_cout[3];

--H3_cout[4] is address:inst1|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[4] at LC5_B3
--operation mode is arithmetic

H3_cout[4] = CARRY(J1_q[3] & H3_cout[3]);


--H3_cs_buffer[5] is address:inst1|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] at LC6_B3
--operation mode is arithmetic

H3_cs_buffer[5] = J1_q[4] $ H3_cout[4];

--H3_cout[5] is address:inst1|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[5] at LC6_B3
--operation mode is arithmetic

H3_cout[5] = CARRY(J1_q[4] & H3_cout[4]);


--H3_cs_buffer[6] is address:inst1|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] at LC7_B3
--operation mode is arithmetic

H3_cs_buffer[6] = J1_q[5] $ H3_cout[5];

--H3_cout[6] is address:inst1|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[6] at LC7_B3
--operation mode is arithmetic

H3_cout[6] = CARRY(J1_q[5] & H3_cout[5]);


--F1_unreg_res_node[7] is address:inst1|lpm_add_sub:add_rtl_1|addcore:adder|unreg_res_node[7] at LC8_B3
--operation mode is normal

F1_unreg_res_node[7] = H3_cout[6] $ J1_q[6];


--B1L3 is address:inst1|data1[0]~12 at LC8_B2
--operation mode is normal

B1L3 = !var;


--var is var at PIN_29
--operation mode is input

var = INPUT();


--clk is clk at PIN_16
--operation mode is input

clk = INPUT();


--data[7] is data[7] at PIN_58
--operation mode is output

data[7] = OUTPUT(A1L81);


--data[6] is data[6] at PIN_59
--operation mode is output

data[6] = OUTPUT(A1L61);


--data[5] is data[5] at PIN_60
--operation mode is output

data[5] = OUTPUT(A1L41);


--data[4] is data[4] at PIN_61
--operation mode is output

data[4] = OUTPUT(A1L21);


--data[3] is data[3] at PIN_62
--operation mode is output

data[3] = OUTPUT(A1L01);


--data[2] is data[2] at PIN_64
--operation mode is output

data[2] = OUTPUT(A1L8);


--data[1] is data[1] at PIN_65
--operation mode is output

data[1] = OUTPUT(A1L6);


--data[0] is data[0] at PIN_66
--operation mode is output

data[0] = OUTPUT(A1L4);


--A1L81 is data[7]~0 at LC7_B18
--operation mode is normal

A1L81 = L1_q[7];


--A1L61 is data[6]~1 at LC5_C21
--operation mode is normal

A1L61 = L1_q[6];


--A1L41 is data[5]~2 at LC4_B22
--operation mode is normal

A1L41 = L1_q[5];


--A1L21 is data[4]~3 at LC3_B24
--operation mode is normal

A1L21 = L1_q[4];


--A1L01 is data[3]~4 at LC1_C23
--operation mode is normal

A1L01 = L1_q[3];


--A1L8 is data[2]~5 at LC7_B17
--operation mode is normal

A1L8 = L1_q[2];


--A1L6 is data[1]~6 at LC5_B20
--operation mode is normal

A1L6 = L1_q[1];


--A1L4 is data[0]~7 at LC3_B16
--operation mode is normal

A1L4 = L1_q[0];