wave_generator.sim.rpt
来自「用LPM_ROM设计存放一个周期的256×8大小的rom,构建简易频率可控的正弦」· RPT 代码 · 共 394 行 · 第 1/4 页
RPT
394 行
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~7 ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~7 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~8 ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~8 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~9 ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~9 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[0]~0 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[0]~0 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[0] ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[0] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~1 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~1 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~2 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~2 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[7]~1 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[7]~1 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[7] ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[7] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[6] ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[6] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[5] ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[5] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[4] ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[4] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[3] ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[3] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[2] ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[2] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[1] ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[1] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~4 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~4 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~5 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~5 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~6 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~6 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~7 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~7 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~8 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~8 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~9 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~9 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~10 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~10 ; out0 ;
+------------------------------------------------------------------------------+------------------------------------------------------------------------------+------------------+
The following table displays output ports that do not toggle to 0 during simulation.
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 0-Value Coverage ;
+------------------------------------------------------------------------------+------------------------------------------------------------------------------+------------------+
; Node Name ; Output Port Name ; Output Port Type ;
+------------------------------------------------------------------------------+------------------------------------------------------------------------------+------------------+
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|datab_node[0]~0 ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|datab_node[0]~0 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|datab_node[0] ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|datab_node[0] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~1 ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~1 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~2 ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~2 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|datab_node[6]~1 ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|datab_node[6]~1 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|datab_node[6] ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|datab_node[6] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|datab_node[5] ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|datab_node[5] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|datab_node[4] ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|datab_node[4] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|datab_node[3] ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|datab_node[3] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|datab_node[2] ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|datab_node[2] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|datab_node[1] ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|datab_node[1] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~4 ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~4 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~5 ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~5 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~6 ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~6 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~7 ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~7 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~8 ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~8 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~9 ; |wave_generator|address:inst1|lpm_add_sub:Add1|addcore:adder|_~9 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[0]~0 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[0]~0 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[0] ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[0] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~1 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~1 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~2 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~2 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[7]~1 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[7]~1 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[7] ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[7] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[6] ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[6] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[5] ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[5] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[4] ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[4] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[3] ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[3] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[2] ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[2] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[1] ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|datab_node[1] ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~4 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~4 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~5 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~5 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~6 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~6 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~7 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~7 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~8 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~8 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~9 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~9 ; out0 ;
; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~10 ; |wave_generator|address:inst1|lpm_add_sub:Add0|addcore:adder|_~10 ; out0 ;
+------------------------------------------------------------------------------+------------------------------------------------------------------------------+------------------+
+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage ;
+--------+------------+
+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
Info: Processing started: Thu Apr 02 15:34:24 2009
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off wave_generator -c wave_generator
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is 81.35 %
Info: Number of transitions in simulation is 18655
Info: Vector file wave_generator.sim.vwf is saved in VWF text format. You can compress it into CVWF format in order to reduce file size. For more details please refer to the Quartus II Help.
Info: Quartus II Simulator was successful. 0 errors, 0 warnings
Info: Processing ended: Thu Apr 02 15:34:24 2009
Info: Elapsed time: 00:00:01
⌨️ 快捷键说明
复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?