simd.cpp

检查当前处理器可用的SIMD指令的类型

/*
SIMD class to detect presence of SIMD version 1.2.0

Copyright (c) 2008 Wong Shao Voon
1.1.0 - Contains the 3DNow, 3DNow+ and MMX+ detection bug fix by Leonardo Tazzini
1.2.0 - Added AMD's SSE4a and SSE5

The Code Project Open License (CPOL)
http://www.codeproject.com/info/cpol10.aspx
*/

#include "stdafx.h"
#include "SIMD.h"

#include <intrin.h>

#define EDX_MMX_bit      0x800000   // 23 bit
#define EDX_SSE_bit      0x2000000  // 25 bit
#define EDX_SSE2_bit     0x4000000  // 26 bit
#define EDX_3DnowExt_bit 0x40000000 // 30 bit
#define EDX_3Dnow_bit 0x80000000 // 31 bit
#define EDX_MMXplus_bit 0x400000 // 22 bit

#define ECX_SSE3_bit     0x1        // 0 bit
#define ECX_SSSE3_bit    0x200      // 9 bit
#define ECX_SSE41_bit    0x80000    // 19 bit
#define ECX_SSE42_bit    0x100000   // 20 bit

#define ECX_SSE4A_bit    0x40    // 6 bit
#define ECX_SSE5_bit    0x800    // 11 bit

SIMD::SIMD()
:
m_bMMX  (false),
m_bMMXplus(false),
m_bSSE  (false),
m_bSSE2 (false),
m_bSSE3 (false),
m_bSSSE3(false),
m_bSSE41(false),
m_bSSE42(false),
m_bSSE4a(false),
m_bSSE5(false),
m_b3Dnow(false),
m_b3DnowExt(false)
{
	InitParams();
}

void SIMD::InitParams()
{
	int CPUInfo[4];
	int CPUInfoExt[4];
	DWORD dwECX=0;
	DWORD dwEDX=0;

	__cpuid(CPUInfo, 0);

	if( CPUInfo[0] >= 1 )
	{
		__cpuid(CPUInfo, 1);
		dwECX = CPUInfo[2];
		dwEDX = CPUInfo[3];
	}

	__cpuid(CPUInfo, 0x80000000);

	if( CPUInfo[0] >= 0x80000001 )
		__cpuid(CPUInfoExt, 0x80000001);

	if( EDX_MMX_bit & dwEDX )
		m_bMMX = true;

	if( EDX_SSE_bit & dwEDX )
		m_bSSE = true;

	if( EDX_SSE2_bit & dwEDX )
		m_bSSE2 = true;

	if( ECX_SSE3_bit & dwECX )
		m_bSSE3 = true;

	if( ECX_SSSE3_bit & dwECX )
		m_bSSSE3 = true;

	if( ECX_SSE41_bit & dwECX )
		m_bSSE41 = true;

	if( ECX_SSE42_bit & dwECX )
		m_bSSE42 = true;

	if( EDX_3DnowExt_bit & CPUInfoExt[3] )
		m_b3DnowExt = true;

	if( EDX_3Dnow_bit & CPUInfoExt[3] )
		m_b3Dnow = true;

	if( EDX_MMXplus_bit & CPUInfoExt[3] )
		m_bMMXplus = true;

	if( ECX_SSE4A_bit & CPUInfoExt[2] )
		m_bSSE4a = true;

	if( ECX_SSE5_bit & CPUInfoExt[2] )
		m_bSSE5 = true;
}