csl_mcbsp.h

来自「dsp在音频处理中的运用」· C头文件 代码 · 共 1,398 行 · 第 1/3 页

/*****************************************************\
 *  Copyright 2003, Texas Instruments Incorporated.  *
 *  All rights reserved.                             *
 *  Restricted rights to use, duplicate or disclose  *
 *  this   code   are  granted   through  contract.  *
 \*****************************************************/

/*  @(#) PSP/CSL 3.00.01.00[5912PG1_0] (2003-11-12)  */

/** @file csl_mcbsp.h
 *
 *  @brief Header file for functional layer of McBSP CSL
 *
 *  Description
 *  - The different symbolic constants, enumerations, structure definitions
 *    and function prototype declarations
 *
 *  @date
 *  @author
 */

/**
 * @defgroup CSL_MCBSP_API MCBSP
 */

/**
 * @defgroup CSL_MCBSP_DATASTRUCT MCBSP Data Structures
 * @ingroup CSL_MCBSP_API
 */
/**
 * @defgroup CSL_MCBSP_SYMBOL  Symbols
 * @ingroup CSL_MCBSP_API
 */
/**
 * @defgroup CSL_MCBSP_ENUM  Enumerated Data Types
 * @ingroup CSL_MCBSP_API
 */
/**
 * @defgroup CSL_MCBSP_FUNCTION  Functions
 * @ingroup CSL_MCBSP_API
 */

#ifndef _CSL_MCBSP_H_
#define _CSL_MCBSP_H_

#ifdef __cplusplus
extern "C" {
#endif

#include <csl.h>
#include <cslr_mcbsp.h>

/**************************************************************************\
* MCBSP global macro declarations
\**************************************************************************/

/** @defgroup CSL_MCBSP_IO_SYMBOL General purpose IO pin selection
 * @ingroup CSL_MCBSP_SYMBOL
 *
 * Use this symbol as pin mask for @a CSL_mcbspIoRead() and
 * @a CSL_mcbspIoWrite() functions
 *
 * @{ */
/** I/O Pin Input/Output configuration for CLKX Pin       */
#define CSL_MCBSP_IO_CLKX                             (1)

/** I/O Pin Input/Output configuration for FSX  Pin       */
#define CSL_MCBSP_IO_FSX                              (2)

/** Not Configurable. Always Output.                      */
#define CSL_MCBSP_IO_DX                               (4)

/** I/O Pin Input/Output configuration for CLKR Pin       */
#define CSL_MCBSP_IO_CLKR                             (8)

/** I/O Pin Input/Output configuration for FSR Pin        */
#define CSL_MCBSP_IO_FSR                              (16)

/** Not Configurable. Always Input.                        */
#define CSL_MCBSP_IO_DR                               (32)

/** Not Configurable. Always Input.                        */
#define CSL_MCBSP_IO_CLKS                             (64)
/**
@} */

/** @defgroup CSL_MCBSP_CTRL_SYMBOL Enable/Disable Controls
 * @ingroup CSL_MCBSP_SYMBOL
 *
 * Use this symbol as enable/disable control bitmask for
 * @a CSL_mcbspHwControl() function
 *
 * @{ */
/** To enable Receiver in resetControl Function             */
#define CSL_MCBSP_CTRL_RX_ENABLE                      (1)

/** To enable Transmitter in resetControl Function          */
#define CSL_MCBSP_CTRL_TX_ENABLE                      (2)

/** To disable Receiver in resetControl Function            */
#define CSL_MCBSP_CTRL_RX_DISABLE                     (4)

/** To disable Transmitter in resetControl Function         */
#define CSL_MCBSP_CTRL_TX_DISABLE                     (8)

/** To enable Frame Sync Generation in resetControl Function */
#define CSL_MCBSP_CTRL_FSYNC_ENABLE                   (16)

/** To enable Sample Rate Generator in resetControl Function */
#define CSL_MCBSP_CTRL_SRG_ENABLE                     (32)

/** To disable Frame Sync Generation in resetControl Function */
#define CSL_MCBSP_CTRL_FSYNC_DISABLE                  (64)

/** To disable Sample Rate Generator in resetControl Function */
#define CSL_MCBSP_CTRL_SRG_DISABLE                    (128)
/**
@} */

/** @defgroup CSL_DEVSTATUS_SYMBOL RCV/XMT status symbols
 * @ingroup CSL_MCBSP_SYMBOL
 *
 * Use this symbol to compare the return value of @a CSL_mcbspGetHwStatus()
 * function for @a CSL_MCBSP_QUERY_DEV_STATUS query.
 *
 * @{ */
/** RCV ready status */
#define CSL_MCBSP_RRDY        0x0001
/** XMT ready status */
#define CSL_MCBSP_XRDY        0x0002
/** RCV full status */
#define CSL_MCBSP_RFULL       0x0004
/** XMT empty status */
#define CSL_MCBSP_XEMPTY      0x0008
/** RCV frame sync error status */
#define CSL_MCBSP_RSYNCERR    0x0010
/** XMT frame sync error status */
#define CSL_MCBSP_XSYNCERR    0x0020
/**
@} */

/** @defgroup CSL_EMCBSP_SYMBOL Error codes
 * @ingroup CSL_MCBSP_SYMBOL
 *
 * @{ */
/** Invalid Control Command */
#define CSL_EMCBSP_INVCNTLCMD                         (CSL_EMCBSP_FIRST - 0)

/** Invalid Query */
#define CSL_EMCBSP_INVQUERY                           (CSL_EMCBSP_FIRST - 1)

/** Invalid Parameter */
#define CSL_EMCBSP_INVPARAMS                          (CSL_EMCBSP_FIRST - 2)

/** Invalid Size */
#define CSL_EMCBSP_INVSIZE                            (CSL_EMCBSP_FIRST - 3)

/** 'Does not exist' */
#define CSL_EMCBSP_NOTEXIST                           (CSL_EMCBSP_FIRST - 4)
/**
@} */

/**
 * @defgroup CSL_MCBSP_DEFAULT_SYMBOL MCBSP CSL Defaults
 * @ingroup CSL_MCBSP_SYMBOL
 *
 * @{ */
/** Data Setup defaults */
#define CSL_MCBSP_DATASETUP_DEFAULTS {              \
   (CSL_McbspPhase)CSL_MCBSP_PHASE_SINGLE,          \
   (CSL_McbspWordLen)CSL_MCBSP_WORDLEN_16,          \
   1,                                               \
   (CSL_McbspWordLen)0,                             \
   0,                                               \
   (CSL_McbspFrmSync)CSL_MCBSP_FRMSYNC_DETECT,      \
   (CSL_McbspCompand)CSL_MCBSP_COMPAND_OFF_MSB_FIRST, \
   (CSL_McbspDataDelay)CSL_MCBSP_DATADELAY_0_BIT,   \
   (CSL_McbspRjustDxena)0,                          \
   (CSL_McbspIntMode)CSL_MCBSP_INTMODE_ON_READY     \
}

/** Clock Setup defaults */
#define CSL_MCBSP_CLOCKSETUP_DEFAULTS{                  \
 (CSL_McbspFsClkMode)CSL_MCBSP_FSCLKMODE_EXTERNAL,      \
 (CSL_McbspFsClkMode)CSL_MCBSP_FSCLKMODE_EXTERNAL,      \
 (CSL_McbspTxRxClkMode)CSL_MCBSP_TXRXCLKMODE_INTERNAL,  \
 (CSL_McbspTxRxClkMode)CSL_MCBSP_TXRXCLKMODE_EXTERNAL,  \
 (CSL_McbspFsPol)0,                                     \
 (CSL_McbspFsPol)0,                                     \
 (CSL_McbspClkPol)0,                                    \
 (CSL_McbspClkPol)0,                                    \
 1,                                                     \
 0x40,                                                  \
 0xFF,                                                  \
 (CSL_McbspSrgClk)0,                                    \
 (CSL_McbspClkPol)0,                                    \
 (CSL_McbspTxFsMode)CSL_MCBSP_SRG_FRMSYNC_SRG,          \
 (CSL_McbspClkgSyncMode)CSL_MCBSP_CLKGSYNCMODE_OFF      \
}

/** Multichannel Setup defaults */
#define CSL_MCBSP_MULTICHAN_DEFAULTS {                  \
 (CSL_McbspPartMode)CSL_MCBSP_PARTMODE_2PARTITION,      \
 (CSL_McbspPartMode)CSL_MCBSP_PARTMODE_2PARTITION,      \
 (Uint16)0,                                             \
 (Uint16)0,                                             \
 (CSL_McbspPABlk)CSL_MCBSP_PABLK_0,                     \
 (CSL_McbspPBBlk)CSL_MCBSP_PBBLK_1,                     \
 (CSL_McbspPABlk)CSL_MCBSP_PABLK_0,                     \
 (CSL_McbspPBBlk)CSL_MCBSP_PBBLK_1                      \
}

/** Global parameters Setup defaults */
#define CSL_MCBSP_GLOBALSETUP_DEFAULTS {                \
 (CSL_McbspIOMode)CSL_MCBSP_IOMODE_TXDIS_RXDIS,         \
 (CSL_McbspDlbMode)CSL_MCBSP_DLBMODE_OFF,               \
 (CSL_McbspClkStp)CSL_MCBSP_CLKSTP_DISABLE,             \
}

/** Default Emulation mode - Stop */
#define CSL_MCBSP_EMUMODE_DEFAULT  CSL_MCBSP_EMU_STOP

/** Extend Setup default - NULL */
#define CSL_MCBSP_EXTENDSETUP_DEFAULT  NULL

/** Default HwSetup */
#define CSL_MCBSP_HWSETUP_DEFAULTS {                \
    CSL_MCBSP_GLOBALSETUP_DEFAULTS,                 \
    CSL_MCBSP_DATASETUP_DEFAULTS,                   \
    CSL_MCBSP_DATASETUP_DEFAULTS,                   \
    CSL_MCBSP_CLOCKSETUP_DEFAULTS,                  \
    CSL_MCBSP_MULTICHAN_DEFAULTS,                   \
    CSL_MCBSP_EMUMODE_DEFAULT,                      \
    CSL_MCBSP_EXTENDSETUP_DEFAULT                   \
  }

/** The default value for @a CSL_McbspConfig structure */
#define CSL_MCBSP_CONFIG_DEFAULTS {          \
    CSL_MCBSP_DRR2_RESETVAL,                 \
    CSL_MCBSP_DRR1_RESETVAL,                 \
    CSL_MCBSP_DXR2_RESETVAL,                 \
    CSL_MCBSP_DXR1_RESETVAL,                 \
    CSL_MCBSP_SPCR2_RESETVAL,                \
    CSL_MCBSP_SPCR1_RESETVAL,                \
    CSL_MCBSP_RCR2_RESETVAL,                 \
    CSL_MCBSP_RCR1_RESETVAL,                 \
    CSL_MCBSP_XCR2_RESETVAL,                 \
    CSL_MCBSP_XCR1_RESETVAL,                 \
    CSL_MCBSP_SRGR2_RESETVAL,                \
    CSL_MCBSP_SRGR1_RESETVAL,                \
    CSL_MCBSP_MCR2_RESETVAL,                 \
    CSL_MCBSP_MCR1_RESETVAL,                 \
    CSL_MCBSP_RCERA_RESETVAL,                \
    CSL_MCBSP_RCERB_RESETVAL,                \
    CSL_MCBSP_XCERA_RESETVAL,                \
    CSL_MCBSP_XCERB_RESETVAL,                \
    CSL_MCBSP_PCR_RESETVAL,                  \
    CSL_MCBSP_RCERC_RESETVAL,                \
    CSL_MCBSP_RCERD_RESETVAL,                \
    CSL_MCBSP_XCERC_RESETVAL,                \
    CSL_MCBSP_XCERD_RESETVAL,                \
    CSL_MCBSP_RCERE_RESETVAL,                \
    CSL_MCBSP_RCERF_RESETVAL,                \
    CSL_MCBSP_XCERE_RESETVAL,                \
    CSL_MCBSP_XCERF_RESETVAL,                \
    CSL_MCBSP_RCERG_RESETVAL,                \
    CSL_MCBSP_RCERH_RESETVAL,                \
    CSL_MCBSP_XCERG_RESETVAL                 \
}

/**
@} */

/**************************************************************************\
* MCBSP global typedef declarations
\**************************************************************************/

/**
 * @defgroup CSL_MCBSP_WORDLEN_ENUM Word length
 * @ingroup CSL_MCBSP_ENUM
 *
 * @brief Word lengths supported on MCBSP
 *
 * Use this symbol for setting Word Length in each Phase for every Frame
 * @{ */
typedef enum {
    CSL_MCBSP_WORDLEN_8        =                  0,
    CSL_MCBSP_WORDLEN_12       =                  1,
    CSL_MCBSP_WORDLEN_16       =                  2,
    CSL_MCBSP_WORDLEN_20       =                  3,
    CSL_MCBSP_WORDLEN_24       =                  4,
    CSL_MCBSP_WORDLEN_32       =                  5
} CSL_McbspWordLen;
/**
@} */

/**
 * @defgroup CSL_MCBSP_COMPAND_ENUM Companding options
 * @ingroup CSL_MCBSP_ENUM
 *
 * @brief MCBSP companding options
 *
 * Use this symbol to set Companding related options
 * @{ */
typedef enum {
    CSL_MCBSP_COMPAND_OFF_MSB_FIRST =                 0,
    CSL_MCBSP_COMPAND_OFF_LSB_FIRST =                 1,
    CSL_MCBSP_COMPAND_MULAW         =                 2,
    CSL_MCBSP_COMPAND_ALAW          =                 3
} CSL_McbspCompand;
/**
@} */

/**
 * @defgroup CSL_MCBSP_DATADELAY_ENUM Data delay
 * @ingroup CSL_MCBSP_ENUM
 *
 * @brief Data delay in bits
 *
 * Use this symbol to set XMT/RCV Data Delay (in bits)
 * @{ */
typedef enum {
    CSL_MCBSP_DATADELAY_0_BIT      =                 0,
    CSL_MCBSP_DATADELAY_1_BIT      =                 1,
    CSL_MCBSP_DATADELAY_2_BITS     =                 2
} CSL_McbspDataDelay;
/**
@} */

/**
 * @defgroup CSL_MCBSP_EVENT_ENUM Interrupt mode
 * @ingroup CSL_MCBSP_ENUM
 *
 * @brief MCBSP Interrupt mode
 *
 * Use this symbol to set Interrupt mode (i.e. source of interrupt generation).
 * This symbol is used on both RCV and XMT for RINT and XINT generation mode.
 * @{ */
typedef enum {
    /** Interrupt generated on RRDY of RCV or XRDY of XMT */
    CSL_MCBSP_INTMODE_ON_READY         =                  0,
    /** Interrupt generated on end of 16-channel block transfer
     *  in multichannel mode */
    CSL_MCBSP_INTMODE_ON_EOB           =                  1,
    /** Interrupt generated on frame sync */
    CSL_MCBSP_INTMODE_ON_FSYNC         =                  2,
    /** Interrupt generated on synchronisation error */
    CSL_MCBSP_INTMODE_ON_SYNCERR       =                  3
} CSL_McbspIntMode;
/**
@} */

/**
 * @defgroup CSL_MCBSP_FSCLKMODE_ENUM Frame sync clock source
 * @ingroup CSL_MCBSP_ENUM
 *
 * @brief Frame sync clock source
 *
 * Use this symbol to set the frame sync clock source as internal or external
 * @{ */
typedef enum {
    CSL_MCBSP_FSCLKMODE_EXTERNAL    =                  0,
    CSL_MCBSP_FSCLKMODE_INTERNAL    =                  1
} CSL_McbspFsClkMode;
/**
@} */

/**
 * @defgroup CSL_MCBSP_CLKMODE_ENUM Clock Mode
 * @ingroup CSL_MCBSP_ENUM
 *
 * @brief Clock source
 *
 * Use this symbol to set the clock source as internal or external
 * @{ */
typedef enum {
    CSL_MCBSP_TXRXCLKMODE_EXTERNAL    =                  0,
    CSL_MCBSP_TXRXCLKMODE_INTERNAL    =                  1
} CSL_McbspTxRxClkMode;
/**
@} */

/**
 * @defgroup CSL_MCBSP_FSPOLAR_ENUM Frame sync polarity
 * @ingroup CSL_MCBSP_ENUM
 *
 * @brief Frame sync polarity
 *
 * Use this symbol to set frame sync polarity as active-high or active-low
 * @{ */
typedef enum {
    CSL_MCBSP_FSPOL_ACTIVE_HIGH      =                  0,
    CSL_MCBSP_FSPOL_ACTIVE_LOW       =                  1
} CSL_McbspFsPol;
/**
@} */

/**
 * @defgroup CSL_MCBSP_CLKPOLAR_ENUM Clock polarity
 * @ingroup CSL_MCBSP_ENUM
 *
 * @brief Clock polarity
 *
 * Use this symbol to set XMT or RCV clock polarity as rising or falling edge
 * @{ */
typedef enum {
    CSL_MCBSP_CLKPOL_TX_RISING_EDGE      =                 0,
    CSL_MCBSP_CLKPOL_RX_FALLING_EDGE     =                 0,
    CSL_MCBSP_CLKPOL_SRG_RISING_EDGE     =                 0,
    CSL_MCBSP_CLKPOL_TX_FALLING_EDGE     =                 1,
    CSL_MCBSP_CLKPOL_RX_RISING_EDGE      =                 1,
    CSL_MCBSP_CLKPOL_SRG_FALLING_EDGE    =                 1
} CSL_McbspClkPol;
/**
@} */

/**
 * @defgroup CSL_MCBSP_SRGCLK_ENUM SRG clock source
 * @ingroup CSL_MCBSP_ENUM
 *
 * @brief SRG clock source
 *
 * Use this symbol to select input clock source for Sample Rate Generator
 * @{ */
typedef enum {
    CSL_MCBSP_SRGCLK_CLKS                 =                  0,
    CSL_MCBSP_SRGCLK_CLKCPU               =                  1,
    CSL_MCBSP_SRGCLK_CLKR                 =                  2,
    CSL_MCBSP_SRGCLK_CLKX                 =                  3
} CSL_McbspSrgClk;
/**
@} */

/**
 * @defgroup CSL_MCBSP_TXFSMODE_ENUM XMT Frame Sync generation mode
 * @ingroup CSL_MCBSP_ENUM
 *
 * @brief XMT Frame Sync generation mode
 *
 * Use this symbol to set XMT Frame Sync generation mode
 * @{ */
typedef enum {
    CSL_MCBSP_TXFSMODE_DXRCOPY  =                  0,
    CSL_MCBSP_TXFSMODE_SRG      =                  1
} CSL_McbspTxFsMode;
/**
@} */

/**
 * @defgroup CSL_MCBSP_IOMODE_ENUM XMT and RCV IO Mode
 * @ingroup CSL_MCBSP_ENUM
 *
 * @brief XMT and RCV IO Mode
 *
 * Use this symbol to Enable/Disable IO Mode for XMT and RCV
 * @{ */
typedef enum {
    CSL_MCBSP_IOMODE_TXDIS_RXDIS       =                  0,
    CSL_MCBSP_IOMODE_TXDIS_RXEN        =                  1,
    CSL_MCBSP_IOMODE_TXEN_RXDIS        =                  2,
    CSL_MCBSP_IOMODE_TXEN_RXEN         =                  3
} CSL_McbspIOMode;
/**
@} */

/**