cslr_ata.h

来自「dsp在音频处理中的运用」· C头文件 代码 · 共 787 行 · 第 1/3 页

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#define CSL_ATA_IDETIMP_SLVTIMEN_ENABLE  (0x00000001u)

#define CSL_ATA_IDETIMP_RDYSMPL_MASK     (0x00003000u)
#define CSL_ATA_IDETIMP_RDYSMPL_SHIFT    (0x0000000Cu)
#define CSL_ATA_IDETIMP_RDYSMPL_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMP_RDYSMPL_120NS    (0x00000000u)
#define CSL_ATA_IDETIMP_RDYSMPL_100NS    (0x00000001u)
#define CSL_ATA_IDETIMP_RDYSMPL_80NS     (0x00000002u)
#define CSL_ATA_IDETIMP_RDYSMPL_70NS     (0x00000003u)

#define CSL_ATA_IDETIMP_RDYRCVRY_MASK    (0x00000300u)
#define CSL_ATA_IDETIMP_RDYRCVRY_SHIFT   (0x00000008u)
#define CSL_ATA_IDETIMP_RDYRCVRY_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMP_RDYRCVRY_120NS   (0x00000000u)
#define CSL_ATA_IDETIMP_RDYRCVRY_100NS   (0x00000001u)
#define CSL_ATA_IDETIMP_RDYRCVRY_75NS    (0x00000002u)
#define CSL_ATA_IDETIMP_RDYRCVRY_50NS    (0x00000003u)

#define CSL_ATA_IDETIMP_DMAFTIM1_MASK    (0x00000080u)
#define CSL_ATA_IDETIMP_DMAFTIM1_SHIFT   (0x00000007u)
#define CSL_ATA_IDETIMP_DMAFTIM1_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMP_DMAFTIM1_PIOTCR  (0x00000000u)
#define CSL_ATA_IDETIMP_DMAFTIM1_PIOCOMP (0x00000001u)

#define CSL_ATA_IDETIMP_PREPOST1_MASK    (0x00000040u)
#define CSL_ATA_IDETIMP_PREPOST1_SHIFT   (0x00000006u)
#define CSL_ATA_IDETIMP_PREPOST1_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMP_PREPOST1_DISABLE (0x00000000u)
#define CSL_ATA_IDETIMP_PREPOST1_ENABLE  (0x00000001u)

#define CSL_ATA_IDETIMP_RDYSEN1_MASK     (0x00000020u)
#define CSL_ATA_IDETIMP_RDYSEN1_SHIFT    (0x00000005u)
#define CSL_ATA_IDETIMP_RDYSEN1_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMP_RDYSEN1_DISABLE  (0x00000000u)
#define CSL_ATA_IDETIMP_RDYSEN1_ENABLE   (0x00000001u)

#define CSL_ATA_IDETIMP_PIOFTIM1_MASK    (0x00000010u)
#define CSL_ATA_IDETIMP_PIOFTIM1_SHIFT   (0x00000004u)
#define CSL_ATA_IDETIMP_PIOFTIM1_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMP_PIOFTIM1_DISABLE (0x00000000u)
#define CSL_ATA_IDETIMP_PIOFTIM1_ENABLE  (0x00000001u)

#define CSL_ATA_IDETIMP_DMAFTIM0_MASK    (0x00000008u)
#define CSL_ATA_IDETIMP_DMAFTIM0_SHIFT   (0x00000003u)
#define CSL_ATA_IDETIMP_DMAFTIM0_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMP_DMAFTIM0_PIOTCR  (0x00000000u)
#define CSL_ATA_IDETIMP_DMAFTIM0_PIOCOMP (0x00000001u)

#define CSL_ATA_IDETIMP_PREPOST0_MASK    (0x00000040u)
#define CSL_ATA_IDETIMP_PREPOST0_SHIFT   (0x00000006u)
#define CSL_ATA_IDETIMP_PREPOST0_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMP_PREPOST0_DISABLE (0x00000000u)
#define CSL_ATA_IDETIMP_PREPOST0_ENABLE  (0x00000001u)

#define CSL_ATA_IDETIMP_RDYSEN0_MASK     (0x00000020u)
#define CSL_ATA_IDETIMP_RDYSEN0_SHIFT    (0x00000005u)
#define CSL_ATA_IDETIMP_RDYSEN0_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMP_RDYSEN0_DISABLE  (0x00000000u)
#define CSL_ATA_IDETIMP_RDYSEN0_ENABLE   (0x00000001u)

#define CSL_ATA_IDETIMP_PIOFTIM0_MASK    (0x00000010u)
#define CSL_ATA_IDETIMP_PIOFTIM0_SHIFT   (0x00000004u)
#define CSL_ATA_IDETIMP_PIOFTIM0_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMP_PIOFTIM0_DISABLE (0x00000000u)
#define CSL_ATA_IDETIMP_PIOFTIM0_ENABLE  (0x00000001u)

#define CSL_ATA_IDETIMP_RESETVAL         (0x00000000u)

/* IDETIMS */

#define CSL_ATA_IDETIMS_IDEEN_MASK       (0x00008000u)
#define CSL_ATA_IDETIMS_IDEEN_SHIFT      (0x0000000Fu)
#define CSL_ATA_IDETIMS_IDEEN_RESETVAL   (0x00000000u)
#define CSL_ATA_IDETIMS_IDEEN_DISABLE    (0x00000000u)
#define CSL_ATA_IDETIMS_IDEEN_ENABLE     (0x00000001u)

#define CSL_ATA_IDETIMS_SLVTIMEN_MASK    (0x00004000u)
#define CSL_ATA_IDETIMS_SLVTIMEN_SHIFT   (0x0000000Eu)
#define CSL_ATA_IDETIMS_SLVTIMEN_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMS_SLVTIMEN_DISABLE (0x00000000u)
#define CSL_ATA_IDETIMS_SLVTIMEN_ENABLE  (0x00000001u)

#define CSL_ATA_IDETIMS_RDYSMPL_MASK     (0x00003000u)
#define CSL_ATA_IDETIMS_RDYSMPL_SHIFT    (0x0000000Cu)
#define CSL_ATA_IDETIMS_RDYSMPL_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMS_RDYSMPL_120NS    (0x00000000u)
#define CSL_ATA_IDETIMS_RDYSMPL_100NS    (0x00000001u)
#define CSL_ATA_IDETIMS_RDYSMPL_80NS     (0x00000002u)
#define CSL_ATA_IDETIMS_RDYSMPL_70NS     (0x00000003u)

#define CSL_ATA_IDETIMS_RDYRCVRY_MASK    (0x00000300u)
#define CSL_ATA_IDETIMS_RDYRCVRY_SHIFT   (0x00000008u)
#define CSL_ATA_IDETIMS_RDYRCVRY_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMS_RDYRCVRY_120NS   (0x00000000u)
#define CSL_ATA_IDETIMS_RDYRCVRY_100NS   (0x00000001u)
#define CSL_ATA_IDETIMS_RDYRCVRY_75NS    (0x00000002u)
#define CSL_ATA_IDETIMS_RDYRCVRY_50NS    (0x00000003u)

#define CSL_ATA_IDETIMS_DMAFTIM1_MASK    (0x00000080u)
#define CSL_ATA_IDETIMS_DMAFTIM1_SHIFT   (0x00000007u)
#define CSL_ATA_IDETIMS_DMAFTIM1_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMS_DMAFTIM1_PIOTCR  (0x00000000u)
#define CSL_ATA_IDETIMS_DMAFTIM1_PIOCOMP (0x00000001u)

#define CSL_ATA_IDETIMS_PREPOST1_MASK    (0x00000040u)
#define CSL_ATA_IDETIMS_PREPOST1_SHIFT   (0x00000006u)
#define CSL_ATA_IDETIMS_PREPOST1_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMS_PREPOST1_DISABLE (0x00000000u)
#define CSL_ATA_IDETIMS_PREPOST1_ENABLE  (0x00000001u)

#define CSL_ATA_IDETIMS_RDYSEN1_MASK     (0x00000020u)
#define CSL_ATA_IDETIMS_RDYSEN1_SHIFT    (0x00000005u)
#define CSL_ATA_IDETIMS_RDYSEN1_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMS_RDYSEN1_DISABLE  (0x00000000u)
#define CSL_ATA_IDETIMS_RDYSEN1_ENABLE   (0x00000001u)

#define CSL_ATA_IDETIMS_PIOFTIM1_MASK    (0x00000010u)
#define CSL_ATA_IDETIMS_PIOFTIM1_SHIFT   (0x00000004u)
#define CSL_ATA_IDETIMS_PIOFTIM1_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMS_PIOFTIM1_DISABLE (0x00000000u)
#define CSL_ATA_IDETIMS_PIOFTIM1_ENABLE  (0x00000001u)

#define CSL_ATA_IDETIMS_DMAFTIM0_MASK    (0x00000008u)
#define CSL_ATA_IDETIMS_DMAFTIM0_SHIFT   (0x00000003u)
#define CSL_ATA_IDETIMS_DMAFTIM0_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMS_DMAFTIM0_PIOTCR  (0x00000000u)
#define CSL_ATA_IDETIMS_DMAFTIM0_PIOCOMP (0x00000001u)

#define CSL_ATA_IDETIMS_PREPOST0_MASK    (0x00000040u)
#define CSL_ATA_IDETIMS_PREPOST0_SHIFT   (0x00000006u)
#define CSL_ATA_IDETIMS_PREPOST0_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMS_PREPOST0_DISABLE (0x00000000u)
#define CSL_ATA_IDETIMS_PREPOST0_ENABLE  (0x00000001u)

#define CSL_ATA_IDETIMS_RDYSEN0_MASK     (0x00000020u)
#define CSL_ATA_IDETIMS_RDYSEN0_SHIFT    (0x00000005u)
#define CSL_ATA_IDETIMS_RDYSEN0_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMS_RDYSEN0_DISABLE  (0x00000000u)
#define CSL_ATA_IDETIMS_RDYSEN0_ENABLE   (0x00000001u)

#define CSL_ATA_IDETIMS_PIOFTIM0_MASK    (0x00000010u)
#define CSL_ATA_IDETIMS_PIOFTIM0_SHIFT   (0x00000004u)
#define CSL_ATA_IDETIMS_PIOFTIM0_RESETVAL (0x00000000u)
#define CSL_ATA_IDETIMS_PIOFTIM0_DISABLE (0x00000000u)
#define CSL_ATA_IDETIMS_PIOFTIM0_ENABLE  (0x00000001u)

#define CSL_ATA_IDETIMS_RESETVAL         (0x00000000u)

/* SIDETIM */

#define CSL_ATA_SIDETIM_RDYSMPS1_MASK    (0x000000C0u)
#define CSL_ATA_SIDETIM_RDYSMPS1_SHIFT   (0x00000006u)
#define CSL_ATA_SIDETIM_RDYSMPS1_RESETVAL (0x00000000u)
#define CSL_ATA_SIDETIM_RDYSMPS1_120NS   (0x00000000u)
#define CSL_ATA_SIDETIM_RDYSMPS1_100NS   (0x00000001u)
#define CSL_ATA_SIDETIM_RDYSMPS1_80NS    (0x00000002u)
#define CSL_ATA_SIDETIM_RDYSMPS1_70NS    (0x00000003u)

#define CSL_ATA_SIDETIM_RDYRCYS1_MASK    (0x00000030u)
#define CSL_ATA_SIDETIM_RDYRCYS1_SHIFT   (0x00000004u)
#define CSL_ATA_SIDETIM_RDYRCYS1_RESETVAL (0x00000000u)
#define CSL_ATA_SIDETIM_RDYRCYS1_120NS   (0x00000000u)
#define CSL_ATA_SIDETIM_RDYRCYS1_100NS   (0x00000001u)
#define CSL_ATA_SIDETIM_RDYRCYS1_75NS    (0x00000002u)
#define CSL_ATA_SIDETIM_RDYRCYS1_50NS    (0x00000003u)

#define CSL_ATA_SIDETIM_RDYSMPP1_MASK    (0x0000000Cu)
#define CSL_ATA_SIDETIM_RDYSMPP1_SHIFT   (0x00000002u)
#define CSL_ATA_SIDETIM_RDYSMPP1_RESETVAL (0x00000000u)
#define CSL_ATA_SIDETIM_RDYSMPP1_120NS   (0x00000000u)
#define CSL_ATA_SIDETIM_RDYSMPP1_100NS   (0x00000001u)
#define CSL_ATA_SIDETIM_RDYSMPP1_80NS    (0x00000002u)
#define CSL_ATA_SIDETIM_RDYSMPP1_70NS    (0x00000003u)

#define CSL_ATA_SIDETIM_RDYRCYP1_MASK    (0x00000003u)
#define CSL_ATA_SIDETIM_RDYRCYP1_SHIFT   (0x00000000u)
#define CSL_ATA_SIDETIM_RDYRCYP1_RESETVAL (0x00000000u)
#define CSL_ATA_SIDETIM_RDYRCYP1_120NS   (0x00000000u)
#define CSL_ATA_SIDETIM_RDYRCYP1_100NS   (0x00000001u)
#define CSL_ATA_SIDETIM_RDYRCYP1_75NS    (0x00000002u)
#define CSL_ATA_SIDETIM_RDYRCYP1_50NS    (0x00000003u)

#define CSL_ATA_SIDETIM_RESETVAL         (0x00000000u)

/* SLEWCTL */

#define CSL_ATA_SLEWCTL_SLEWCTL_MASK     (0x0000FFFFu)
#define CSL_ATA_SLEWCTL_SLEWCTL_SHIFT    (0x00000000u)
#define CSL_ATA_SLEWCTL_SLEWCTL_RESETVAL (0x00000155u)

#define CSL_ATA_SLEWCTL_RESETVAL         (0x00000155u)

/* IDESTATUS */

#define CSL_ATA_IDESTATUS_CABLEIDP_MASK  (0x00000002u)
#define CSL_ATA_IDESTATUS_CABLEIDP_SHIFT (0x00000001u)
#define CSL_ATA_IDESTATUS_CABLEIDP_RESETVAL (0x00000000u)
#define CSL_ATA_IDESTATUS_CABLEIDP_80COND (0x00000000u)
#define CSL_ATA_IDESTATUS_CABLEIDP_40COND (0x00000001u)

#define CSL_ATA_IDESTATUS_CABLEIDS_MASK  (0x00000001u)
#define CSL_ATA_IDESTATUS_CABLEIDS_SHIFT (0x00000000u)
#define CSL_ATA_IDESTATUS_CABLEIDS_RESETVAL (0x00000000u)
#define CSL_ATA_IDESTATUS_CABLEIDS_80COND (0x00000000u)
#define CSL_ATA_IDESTATUS_CABLEIDS_40COND (0x00000001u)

#define CSL_ATA_IDESTATUS_RESETVAL       (0x00000000u)

/* UDMACTL */

#define CSL_ATA_UDMACTL_UDMAS1_MASK      (0x00000008u)
#define CSL_ATA_UDMACTL_UDMAS1_SHIFT     (0x00000003u)
#define CSL_ATA_UDMACTL_UDMAS1_RESETVAL  (0x00000000u)

#define CSL_ATA_UDMACTL_UDMAS0_MASK      (0x00000004u)
#define CSL_ATA_UDMACTL_UDMAS0_SHIFT     (0x00000002u)
#define CSL_ATA_UDMACTL_UDMAS0_RESETVAL  (0x00000000u)

#define CSL_ATA_UDMACTL_UDMAP1_MASK      (0x00000002u)
#define CSL_ATA_UDMACTL_UDMAP1_SHIFT     (0x00000001u)
#define CSL_ATA_UDMACTL_UDMAP1_RESETVAL  (0x00000000u)

#define CSL_ATA_UDMACTL_UDMAP0_MASK      (0x00000001u)
#define CSL_ATA_UDMACTL_UDMAP0_SHIFT     (0x00000000u)
#define CSL_ATA_UDMACTL_UDMAP0_RESETVAL  (0x00000000u)

#define CSL_ATA_UDMACTL_RESETVAL         (0x00000000u)

/* UDMATIM */

#define CSL_ATA_UDMATIM_TCYCS1_MASK      (0x00007000u)
#define CSL_ATA_UDMATIM_TCYCS1_SHIFT     (0x0000000Cu)
#define CSL_ATA_UDMATIM_TCYCS1_RESETVAL  (0x00000000u)
#define CSL_ATA_UDMATIM_TCYCS1_MODE0     (0x00000000u)
#define CSL_ATA_UDMATIM_TCYCS1_MODE1     (0x00000001u)
#define CSL_ATA_UDMATIM_TCYCS1_MODE2     (0x00000002u)
#define CSL_ATA_UDMATIM_TCYCS1_MODE3     (0x00000003u)
#define CSL_ATA_UDMATIM_TCYCS1_MODE4     (0x00000004u)
#define CSL_ATA_UDMATIM_TCYCS1_MODE5     (0x00000005u)
#define CSL_ATA_UDMATIM_TCYCS1_MODE6     (0x00000006u)

#define CSL_ATA_UDMATIM_TCYCS0_MASK      (0x00000700u)
#define CSL_ATA_UDMATIM_TCYCS0_SHIFT     (0x00000008u)
#define CSL_ATA_UDMATIM_TCYCS0_RESETVAL  (0x00000000u)
#define CSL_ATA_UDMATIM_TCYCS0_MODE0     (0x00000000u)
#define CSL_ATA_UDMATIM_TCYCS0_MODE1     (0x00000001u)
#define CSL_ATA_UDMATIM_TCYCS0_MODE2     (0x00000002u)
#define CSL_ATA_UDMATIM_TCYCS0_MODE3     (0x00000003u)
#define CSL_ATA_UDMATIM_TCYCS0_MODE4     (0x00000004u)
#define CSL_ATA_UDMATIM_TCYCS0_MODE5     (0x00000005u)
#define CSL_ATA_UDMATIM_TCYCS0_MODE6     (0x00000006u)

#define CSL_ATA_UDMATIM_TCYCP1_MASK      (0x00000070u)
#define CSL_ATA_UDMATIM_TCYCP1_SHIFT     (0x00000004u)
#define CSL_ATA_UDMATIM_TCYCP1_RESETVAL  (0x00000000u)
#define CSL_ATA_UDMATIM_TCYCP1_MODE0     (0x00000000u)
#define CSL_ATA_UDMATIM_TCYCP1_MODE1     (0x00000001u)
#define CSL_ATA_UDMATIM_TCYCP1_MODE2     (0x00000002u)
#define CSL_ATA_UDMATIM_TCYCP1_MODE3     (0x00000003u)
#define CSL_ATA_UDMATIM_TCYCP1_MODE4     (0x00000004u)
#define CSL_ATA_UDMATIM_TCYCP1_MODE5     (0x00000005u)
#define CSL_ATA_UDMATIM_TCYCP1_MODE6     (0x00000006u)
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