cslr_intc2.h

来自「dsp在音频处理中的运用」· C头文件 代码 · 共 574 行 · 第 1/2 页

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574 行
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#define CSL_INTC2_MIR_IRQ24_MASK      (0x00000080u)#define CSL_INTC2_MIR_IRQ24_SHIFT     (0x00000007u)#define CSL_INTC2_MIR_IRQ24_RESETVAL  (0x00000001u)#define CSL_INTC2_MIR_IRQ25_MASK      (0x00000040u)#define CSL_INTC2_MIR_IRQ25_SHIFT     (0x00000006u)#define CSL_INTC2_MIR_IRQ25_RESETVAL  (0x00000001u)#define CSL_INTC2_MIR_IRQ26_MASK      (0x00000020u)#define CSL_INTC2_MIR_IRQ26_SHIFT     (0x00000005u)#define CSL_INTC2_MIR_IRQ26_RESETVAL  (0x00000001u)#define CSL_INTC2_MIR_IRQ27_MASK      (0x00000010u)#define CSL_INTC2_MIR_IRQ27_SHIFT     (0x00000004u)#define CSL_INTC2_MIR_IRQ27_RESETVAL  (0x00000001u)#define CSL_INTC2_MIR_IRQ28_MASK      (0x00000008u)#define CSL_INTC2_MIR_IRQ28_SHIFT     (0x00000003u)#define CSL_INTC2_MIR_IRQ28_RESETVAL  (0x00000001u)#define CSL_INTC2_MIR_IRQ29_MASK      (0x00000004u)#define CSL_INTC2_MIR_IRQ29_SHIFT     (0x00000002u)#define CSL_INTC2_MIR_IRQ29_RESETVAL  (0x00000001u)#define CSL_INTC2_MIR_IRQ30_MASK      (0x00000002u)#define CSL_INTC2_MIR_IRQ30_SHIFT     (0x00000001u)#define CSL_INTC2_MIR_IRQ30_RESETVAL  (0x00000001u)#define CSL_INTC2_MIR_IRQ31_MASK      (0x00000001u)#define CSL_INTC2_MIR_IRQ31_SHIFT     (0x00000000u)#define CSL_INTC2_MIR_IRQ31_RESETVAL  (0x00000001u)#define CSL_INTC2_MIR_RESETVAL        (0x80000000u)  /* CSL_INTC2_SIR */#define CSL_INTC2_SIR_IRQ_MASK        (0x0000007Fu)#define CSL_INTC2_SIR_IRQ_SHIFT       (0x00000000u)#define CSL_INTC2_SIR_IRQ_RESETVAL    (0x00000000u)#define CSL_INTC2_SIR_RESETVAL        (0x00000000u)  /* CSL_INTC2_SFR */#define CSL_INTC2_SFR_IRQ_MASK        (0x0000007Fu)#define CSL_INTC2_SFR_IRQ_SHIFT       (0x00000000u)#define CSL_INTC2_SFR_IRQ_RESETVAL    (0x00000000u)#define CSL_INTC2_SFR_RESETVAL        (0x00000000u)  /* CSL_INTC2_ICR */#define CSL_INTC2_ICR_GLOBAL_MASK_MASK                                    \          (0x00000004u)#define CSL_INTC2_ICR_GLOBAL_MASK_SHIFT                                   \          (0x00000002u)#define CSL_INTC2_ICR_GLOBAL_MASK_RESETVAL                                \          (0x00000000u)#define CSL_INTC2_ICR_NEW_FIQ_AGR_MASK                                    \          (0x00000002u)#define CSL_INTC2_ICR_NEW_FIQ_AGR_SHIFT                                   \          (0x00000001u)#define CSL_INTC2_ICR_NEW_FIQ_AGR_RESETVAL                                \          (0x00000000u)#define CSL_INTC2_ICR_NEW_IRQ_AGR_MASK                                    \          (0x00000001u)#define CSL_INTC2_ICR_NEW_IRQ_AGR_SHIFT                                   \          (0x00000000u)#define CSL_INTC2_ICR_NEW_IRQ_AGR_RESETVAL                                \          (0x00000000u)#define CSL_INTC2_ICR_RESETVAL        (0x00000000u)  /* CSL_INTC2_ILR */#define CSL_INTC2_ILR_PRIORITY_MASK   (0x000001FCu)#define CSL_INTC2_ILR_PRIORITY_SHIFT  (0x00000002u)#define CSL_INTC2_ILR_PRIORITY_RESETVAL                                   \          (0x00000000u)#define CSL_INTC2_ILR_SENSE_EDGE_MASK (0x00000002u)#define CSL_INTC2_ILR_SENSE_EDGE_SHIFT                                    \          (0x00000001u)#define CSL_INTC2_ILR_SENSE_EDGE_RESETVAL                                 \          (0x00000000u)#define CSL_INTC2_ILR_FIQ_MASK        (0x00000001u)#define CSL_INTC2_ILR_FIQ_SHIFT       (0x00000000u)#define CSL_INTC2_ILR_FIQ_RESETVAL    (0x00000000u)#define CSL_INTC2_ILR_RESETVAL        (0x00000000u)  /* CSL_INTC2_ISR */#define CSL_INTC2_ISR_ISR0_MASK       (0x80000000u)#define CSL_INTC2_ISR_ISR0_SHIFT      (0x0000001Fu)#define CSL_INTC2_ISR_ISR0_RESETVAL   (0x00000000u)#define CSL_INTC2_ISR_ISR1_MASK       (0x40000000u)#define CSL_INTC2_ISR_ISR1_SHIFT      (0x0000001Eu)#define CSL_INTC2_ISR_ISR1_RESETVAL   (0x00000000u)#define CSL_INTC2_ISR_ISR2_MASK       (0x20000000u)#define CSL_INTC2_ISR_ISR2_SHIFT      (0x0000001Du)#define CSL_INTC2_ISR_ISR2_RESETVAL   (0x00000000u)#define CSL_INTC2_ISR_ISR3_MASK       (0x10000000u)#define CSL_INTC2_ISR_ISR3_SHIFT      (0x0000001Cu)#define CSL_INTC2_ISR_ISR3_RESETVAL   (0x00000000u)#define CSL_INTC2_ISR_ISR4_MASK       (0x08000000u)#define CSL_INTC2_ISR_ISR4_SHIFT      (0x0000001Bu)#define CSL_INTC2_ISR_ISR4_RESETVAL   (0x00000000u)#define CSL_INTC2_ISR_ISR5_MASK       (0x04000000u)#define CSL_INTC2_ISR_ISR5_SHIFT      (0x0000001Au)#define CSL_INTC2_ISR_ISR5_RESETVAL   (0x00000000u)#define CSL_INTC2_ISR_ISR6_MASK       (0x02000000u)#define CSL_INTC2_ISR_ISR6_SHIFT      (0x00000019u)#define CSL_INTC2_ISR_ISR6_RESETVAL   (0x00000000u)#define CSL_INTC2_ISR_ISR7_MASK       (0x01000000u)#define CSL_INTC2_ISR_ISR7_SHIFT      (0x00000018u)#define CSL_INTC2_ISR_ISR7_RESETVAL   (0x00000000u)#define CSL_INTC2_ISR_ISR8_MASK       (0x00800000u)#define CSL_INTC2_ISR_ISR8_SHIFT      (0x00000017u)#define CSL_INTC2_ISR_ISR8_RESETVAL   (0x00000000u)#define CSL_INTC2_ISR_ISR9_MASK       (0x00400000u)#define CSL_INTC2_ISR_ISR9_SHIFT      (0x00000016u)#define CSL_INTC2_ISR_ISR9_RESETVAL   (0x00000000u)#define CSL_INTC2_ISR_ISR10_MASK      (0x00200000u)#define CSL_INTC2_ISR_ISR10_SHIFT     (0x00000015u)#define CSL_INTC2_ISR_ISR10_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR11_MASK      (0x00100000u)#define CSL_INTC2_ISR_ISR11_SHIFT     (0x00000014u)#define CSL_INTC2_ISR_ISR11_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR12_MASK      (0x00080000u)#define CSL_INTC2_ISR_ISR12_SHIFT     (0x00000013u)#define CSL_INTC2_ISR_ISR12_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR13_MASK      (0x00040000u)#define CSL_INTC2_ISR_ISR13_SHIFT     (0x00000012u)#define CSL_INTC2_ISR_ISR13_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR14_MASK      (0x00020000u)#define CSL_INTC2_ISR_ISR14_SHIFT     (0x00000011u)#define CSL_INTC2_ISR_ISR14_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR15_MASK      (0x00010000u)#define CSL_INTC2_ISR_ISR15_SHIFT     (0x00000010u)#define CSL_INTC2_ISR_ISR15_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR16_MASK      (0x00008000u)#define CSL_INTC2_ISR_ISR16_SHIFT     (0x0000000Fu)#define CSL_INTC2_ISR_ISR16_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR17_MASK      (0x00004000u)#define CSL_INTC2_ISR_ISR17_SHIFT     (0x0000000Eu)#define CSL_INTC2_ISR_ISR17_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR18_MASK      (0x00002000u)#define CSL_INTC2_ISR_ISR18_SHIFT     (0x0000000Du)#define CSL_INTC2_ISR_ISR18_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR19_MASK      (0x00001000u)#define CSL_INTC2_ISR_ISR19_SHIFT     (0x0000000Cu)#define CSL_INTC2_ISR_ISR19_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR20_MASK      (0x00000800u)#define CSL_INTC2_ISR_ISR20_SHIFT     (0x0000000Bu)#define CSL_INTC2_ISR_ISR20_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR21_MASK      (0x00000400u)#define CSL_INTC2_ISR_ISR21_SHIFT     (0x0000000Au)#define CSL_INTC2_ISR_ISR21_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR22_MASK      (0x00000200u)#define CSL_INTC2_ISR_ISR22_SHIFT     (0x00000009u)#define CSL_INTC2_ISR_ISR22_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR23_MASK      (0x00000100u)#define CSL_INTC2_ISR_ISR23_SHIFT     (0x00000008u)#define CSL_INTC2_ISR_ISR23_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR24_MASK      (0x00000080u)#define CSL_INTC2_ISR_ISR24_SHIFT     (0x00000007u)#define CSL_INTC2_ISR_ISR24_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR25_MASK      (0x00000040u)#define CSL_INTC2_ISR_ISR25_SHIFT     (0x00000006u)#define CSL_INTC2_ISR_ISR25_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR26_MASK      (0x00000020u)#define CSL_INTC2_ISR_ISR26_SHIFT     (0x00000005u)#define CSL_INTC2_ISR_ISR26_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR27_MASK      (0x00000010u)#define CSL_INTC2_ISR_ISR27_SHIFT     (0x00000004u)#define CSL_INTC2_ISR_ISR27_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR28_MASK      (0x00000008u)#define CSL_INTC2_ISR_ISR28_SHIFT     (0x00000003u)#define CSL_INTC2_ISR_ISR28_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR29_MASK      (0x00000004u)#define CSL_INTC2_ISR_ISR29_SHIFT     (0x00000002u)#define CSL_INTC2_ISR_ISR29_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR30_MASK      (0x00000002u)#define CSL_INTC2_ISR_ISR30_SHIFT     (0x00000001u)#define CSL_INTC2_ISR_ISR30_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_ISR31_MASK      (0x00000001u)#define CSL_INTC2_ISR_ISR31_SHIFT     (0x00000000u)#define CSL_INTC2_ISR_ISR31_RESETVAL  (0x00000000u)#define CSL_INTC2_ISR_RESETVAL        (0x00000000u)  /* CSL_INTC2_STATUS */#define CSL_INTC2_STATUS_RST_MASK     (0x00000001u)#define CSL_INTC2_STATUS_RST_SHIFT    (0x00000000u)#define CSL_INTC2_STATUS_RST_RESETVAL (0x00000001u)#define CSL_INTC2_STATUS_RESETVAL     (0x00000001u)  /* CSL_INTC2_OCP_CFG */#define CSL_INTC2_OCP_CFG_IDLE_MODE_MASK                                  \          (0x00000018u)#define CSL_INTC2_OCP_CFG_IDLE_MODE_SHIFT                                 \          (0x00000003u)#define CSL_INTC2_OCP_CFG_IDLE_MODE_RESETVAL                              \          (0x00000000u)#define CSL_INTC2_OCP_CFG_IDLE_MODE_FORCEWAKEUP                           \          (0x00000000u)#define CSL_INTC2_OCP_CFG_IDLE_MODE_SMARTIDLE                             \          (0x00000002u)#define CSL_INTC2_OCP_CFG_SOFTRST_MASK                                    \          (0x00000002u)#define CSL_INTC2_OCP_CFG_SOFTRST_SHIFT                                   \          (0x00000001u)#define CSL_INTC2_OCP_CFG_SOFTRST_RESETVAL                                \          (0x00000000u)#define CSL_INTC2_OCP_CFG_AUTOIDLE_MASK                                   \          (0x00000001u)#define CSL_INTC2_OCP_CFG_AUTOIDLE_SHIFT                                  \          (0x00000000u)#define CSL_INTC2_OCP_CFG_AUTOIDLE_RESETVAL                               \          (0x00000000u)#define CSL_INTC2_OCP_CFG_RESETVAL    (0x00000000u)  /* CSL_INTC2_INTH_REV */#define CSL_INTC2_INTH_REV_MINOR_MASK (0x000000F0u)#define CSL_INTC2_INTH_REV_MINOR_SHIFT                                    \          (0x00000004u)#define CSL_INTC2_INTH_REV_MINOR_RESETVAL                                 \          (0x00000000u)#define CSL_INTC2_INTH_REV_MAJOR_MASK (0x0000000Fu)#define CSL_INTC2_INTH_REV_MAJOR_SHIFT                                    \          (0x00000000u)#define CSL_INTC2_INTH_REV_MAJOR_RESETVAL                                 \          (0x00000000u)#define CSL_INTC2_INTH_REV_RESETVAL   (0x00000000u)#define CSL_INTC1_ITR_RESET			(0)#define CSL_INTC1_MIR_MASK_ENABLE	(0)#define CSL_INTC1_MIR_MASK_DISABLE	(1)#define CSL_INTC1_ISR_RESET			(0)#define CSL_INTC1_ITR_SET			(1)#endif
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