cslr_spi.h

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#ifndef _CSLR_SPI_001_H_
#define _CSLR_SPI_001_H_

#include <cslr.h>
#include <tistdtypes.h>


/**************************************************************************\
* Register Overlay Structure
\**************************************************************************/
typedef struct  {
    volatile Uint32 SPI_REV;
    volatile Uint32 SPI_RESERVED1;
    volatile Uint32 SPI_RESERVED2;
    volatile Uint32 SPI_RESERVED3;
    volatile Uint32 SPI_SCR;
    volatile Uint32 SPI_SSR;
    volatile Uint32 SPI_ISR;
    volatile Uint32 SPI_IER;
    volatile Uint32 SPI_RESERVED4;
    volatile Uint32 SPI_SET1;
    volatile Uint32 SPI_SET2;
    volatile Uint32 SPI_CTRL;
    volatile Uint32 SPI_DSR;
    volatile Uint32 SPI_TX;
    volatile Uint32 SPI_RX;
    volatile Uint32 SPI_TEST;
} CSL_SpiRegs;
typedef CSL_SpiRegs*			CSL_SpiRegsOvly;

/**************************************************************************\
* Register Id's
\**************************************************************************/
typedef enum  {
   CSL_SPI_SPIGCR0 = 0x0000u,
   CSL_SPI_SPIGCR1 = 0x0004u,
   CSL_SPI_SPIINT0 = 0x0008u,
   CSL_SPI_SPILVL = 0x000cu,
   CSL_SPI_SPIFLG = 0x0010u,
   CSL_SPI_SPIPC0 = 0x0014u,
   CSL_SPI_SPIPC1 = 0x0018u,
   CSL_SPI_SPIPC2 = 0x001cu,
   CSL_SPI_SPIPC3 = 0x0020u,
   CSL_SPI_SPIPC4 = 0x0024u,
   CSL_SPI_SPIPC5 = 0x0028u,
   CSL_SPI_SPIPC6 = 0x002cu,
   CSL_SPI_SPIPC7 = 0x0030u,
   CSL_SPI_SPIDAT0 = 0x0034u,
   CSL_SPI_SPIDAT1 = 0x0038u,
   CSL_SPI_SPIBUF = 0x003cu,
   CSL_SPI_SPIEMU = 0x0040u,
   CSL_SPI_SPIDELAY = 0x0044u,
   CSL_SPI_SPIDEF = 0x0048u,
   CSL_SPI_SPIFMT = 0x004cu,
   CSL_SPI_TGINTVEC = 0x005cu,
   CSL_SPI_SPIE = 0x0070u,
   CSL_SPI_TGITENST = 0x0074u,
   CSL_SPI_TGITENCR = 0x0078u,
   CSL_SPI_TGITLVST = 0x007cu,
   CSL_SPI_TGITLVCR = 0x0080u,
   CSL_SPI_TGINTFLAG = 0x0084u,
   CSL_SPI_TICKCNT = 0x0090u,
   CSL_SPI_LTGPEND = 0x0094u,
   CSL_SPI_TGCTRL = 0x0098u,
   CSL_SPI_DMACTRL = 0x00d8u,
   CSL_SPI_TXBUF = 0x0400u,
   CSL_SPI_RXBUF = 0x0500u
} CSL_SpiRegIds;

/**************************************************************************\
* Field Definition Macros
\**************************************************************************/

/* SPIREV */
#define CSL_SPI_SPIREV_REV_MASK         (0x000000FFu)
#define CSL_SPI_SPIREV_REV_SHIFT        (0x00000000u)
#define CSL_SPI_SPIREV_REV_RESETVAL     (0x00000000u)
#define CSL_SPI_SPIREV_RESETVAL         (0x00000000u)

/* SPISCR */
#define CSL_SPI_SPISCR_IDLEMODE_MASK    (0x00000018u)
#define CSL_SPI_SPISCR_IDLEMODE_SHIFT   (0x00000003u)
#define CSL_SPI_SPISCR_IDLEMODE_RESETVAL (0x00000000u)
#define CSL_SPI_SPISCR_IDLEMODE_FRC     (0x00000000u)
#define CSL_SPI_SPISCR_IDLEMODE_NO      (0x00000001u)
#define CSL_SPI_SPISCR_IDLEMODE_SMRT    (0x00000002u)

#define CSL_SPI_SPISCR_WAKEUPEN_MASK    (0x00000004u)
#define CSL_SPI_SPISCR_WAKEUPEN_SHIFT   (0x00000002u)
#define CSL_SPI_SPISCR_WAKEUPEN_RESETVAL (0x00000000u)
#define CSL_SPI_SPISCR_WAKEUPEN_DIS     (0x00000000u)
#define CSL_SPI_SPISCR_WAKEUPEN_EN      (0x00000001u)

#define CSL_SPI_SPISCR_RESET_MASK		(0x00000002u)
#define CSL_SPI_SPISCR_RESET_SHIFT		(0x00000001u)
#define CSL_SPI_SPISCR_RESET_RESETVAL	(0x00000000u)
#define CSL_SPI_SPISCR_RESET_YES		(0x00000001u)
#define CSL_SPI_SPISCR_RESET_NO			(0x00000000u)

#define CSL_SPI_SPISCR_AUTO_IDLE_MASK   (0x00000001u)
#define CSL_SPI_SPISCR_AUTO_IDLE_SHIFT  (0x00000000u)
#define CSL_SPI_SPISCR_AUTO_IDLE_RESETVAL (0x00000000u)
#define CSL_SPI_SPISCR_AUTO_IDLE_FREE   (0x00000000u)
#define CSL_SPI_SPISCR_AUTO_IDLE_AUTO   (0x00000001u)

#define CSL_SPI_SPISCR_RESETVAL         (0x00000000u)

/* SPISSR */
#define CSL_SPI_SPISSR_RESET_MASK		(0x00000001u)
#define CSL_SPI_SPISSR_RESET_SHIFT		(0x00000000u)
#define CSL_SPI_SPISSR_RESET_RESETVAL	(0x00000000u)
#define CSL_SPI_SPISSR_RESET_VAL		(0x00000001u)

#define CSL_SPI_SPISSR_RESETVAL         (0x00000000u)

/* SPIISR */
#define CSL_SPI_SPIISR_FLAG_MASK		(0x0000001Fu)
#define CSL_SPI_SPIISR_FLAG_SHIFT		(0x00000000u)
#define CSL_SPI_SPIISR_FLAG_RESETVAL	(0x00000000u)
#define CSL_SPI_SPIISR_FLAG_ENABLE		(0x00000001u)
#define CSL_SPI_SPIISR_FLAG_DISABLE		(0x00000000u)

#define CSL_SPI_SPIISR_RESETVAL         (0x00000000u)

/* SPIIER */
#define CSL_SPI_SPIIER_INT_MASK			(0x0000001Fu)
#define CSL_SPI_SPIIER_INT_SHIFT		(0x00000000u)
#define CSL_SPI_SPIIER_INT_RESETVAL		(0x00000000u)
#define CSL_SPI_SPIIER_INT_ENABLE		(0x00000001u)
#define CSL_SPI_SPIIER_INT_DISABLE		(0x00000000u)

#define CSL_SPI_SPIIER_RESETVAL         (0x00000000u)

/* SPISET1 */
#define CSL_SPI_SPISET1_SPIEN_MASK		(0x00000001u)
#define CSL_SPI_SPISET1_SPIEN_SHIFT		(0x00000000u)
#define CSL_SPI_SPISET1_SPIEN_RESETVAL	(0x00000000u)
#define CSL_SPI_SPISET1_SPIEN_ENABLE	(0x00000001u)
#define CSL_SPI_SPISET1_SPIEN_DISABLE	(0x00000000u)

#define CSL_SPI_SPISET1_PRESCALE_MASK	(0x0000001Eu)
#define CSL_SPI_SPISET1_PRESCALE_SHIFT	(0x00000001u)
#define CSL_SPI_SPISET1_PRESCALE_RESETVAL (0x00000000u)

#define CSL_SPI_SPISET1_DMA_MASK		(0x00000020u)
#define CSL_SPI_SPISET1_DMA_SHIFT		(0x00000005u)
#define CSL_SPI_SPISET1_DMA_RESETVAL	(0x00000000u)
#define CSL_SPI_SPISET1_DMA_ENABLE		(0x00000001u)
#define CSL_SPI_SPISET1_DMA_DISABLE		(0x00000000u)

#define CSL_SPI_SPISET1_RESETVAL         (0x00000000u)

/* SPISET2 */
#define CSL_SPI_SPISET2_MASTER_MASK		(0x00008000u)
#define CSL_SPI_SPISET2_MASTER_SHIFT	(0x0000000Fu)
#define CSL_SPI_SPISET2_MASTER_RESETVAL	(0x00000000u)
#define CSL_SPI_SPISET2_MASTER_NO		(0x00000000u)
#define CSL_SPI_SPISET2_MASTER_YES		(0x00000001u)

#define CSL_SPI_SPISET2_PHASE_MASK		(0x00007C00u)
#define CSL_SPI_SPISET2_PHASE_SHIFT		(0x0000000Au)
#define CSL_SPI_SPISET2_PHASE_RESETVAL	(0x00000000u)
#define CSL_SPI_SPISET2_PHASE_IN		(0x00000001u)
#define CSL_SPI_SPISET2_PHASE_OUT		(0x00000000u)

#define CSL_SPI_SPISET2_CE_MASK         (0x000003E0u)
#define CSL_SPI_SPISET2_CE_SHIFT        (0x00000005u)
#define CSL_SPI_SPISET2_CE_RESETVAL     (0x00000000u)
#define CSL_SPI_SPISET2_CE_HIGH         (0x00000001u)
#define CSL_SPI_SPISET2_CE_LOW           (0x00000000u)

#define CSL_SPI_SPISET2_POLARITY_MASK	(0x0000001Fu)
#define CSL_SPI_SPISET2_POLARITY_SHIFT	(0x00000000u)
#define CSL_SPI_SPISET2_POLARITY_RESETVAL (0x00000000u)
#define CSL_SPI_SPISET2_POLARITY_IN		(0x00000001u)
#define CSL_SPI_SPISET2_POLARITY_OUT	(0x00000000u)

#define CSL_SPI_SPISET2_RESETVAL         (0x00000000u)

/* SPICTRL */
#define CSL_SPI_SPICTRL_CSEL_MASK		(0x00000F80u)
#define CSL_SPI_SPICTRL_CSEL_SHIFT		(0x00000007u)
#define CSL_SPI_SPICTRL_CSEL_RESETVAL	(0x00000000u)
#define CSL_SPI_SPICTRL_CSEL_ENABLE		(0x00000001u)
#define CSL_SPI_SPICTRL_CSEL_DISABLE	(0x00000000u)

#define CSL_SPI_SPICTRL_NBITS_MASK		(0x0000007Cu)
#define CSL_SPI_SPICTRL_NBITS_SHIFT		(0x00000002u)
#define CSL_SPI_SPICTRL_NBITS_RESETVAL	(0x00000000u)

#define CSL_SPI_SPICTRL_RW_MASK			(0x00000001u)
#define CSL_SPI_SPICTRL_RW_SHIFT		(0x00000000u)
#define CSL_SPI_SPICTRL_RW_RESETVAL		(0x00000000u)
#define CSL_SPI_SPICTRL_RW_ENABLE		(0x00000001u)
#define CSL_SPI_SPICTRL_RW_DISABLE		(0x00000000u)

#define CSL_SPI_SPICTRL_W_MASK			(0x00000002u)
#define CSL_SPI_SPICTRL_W_SHIFT			(0x00000001u)
#define CSL_SPI_SPICTRL_W_RESETVAL		(0x00000000u)
#define CSL_SPI_SPICTRL_W_ENABLE		(0x00000001u)
#define CSL_SPI_SPICTRL_W_DISABLE		(0x00000000u)

#define CSL_SPI_SPICTRL_RESETVAL        (0x00000000u)

/* SPITX */

#define CSL_SPI_SPITX_RESETVAL         (0x00000000u)

/* SPITEST */
#define CSL_SPI_SPITEST_LOOPBK_MASK		(0x00000001u)
#define CSL_SPI_SPITEST_LOOPBK_SHIFT	(0x00000000u)
#define CSL_SPI_SPITEST_LOOPBK_RESETVAL	(0x00000000u)
#define CSL_SPI_SPITEST_LOOPBK_DISABLE	(0x00000000u)
#define CSL_SPI_SPITEST_LOOPBK_ENABLE	(0x00000001u)

#define CSL_SPI_SPITEST_RESETVAL         (0x00000000u)

/* Mispi Definition maintained here for compatability */

#define CSL_SPI_SPIGCR0_RESET_MASK    (0x00000001u)
#define CSL_SPI_SPIGCR0_RESET_SHIFT   (0x00000000u)
#define CSL_SPI_SPIGCR0_RESET_RESETVAL (0x00000000u)
#define CSL_SPI_SPIGCR0_RESET_YES     (0x00000000u)
#define CSL_SPI_SPIGCR0_RESET_NO      (0x00000001u)

#define CSL_SPI_SPIGCR0_RESETVAL      (0x00000000u)

/* SPIGCR1 */

#define CSL_SPI_SPIGCR1_SPIEN_MASK    	(0x01000000u)
#define CSL_SPI_SPIGCR1_SPIEN_SHIFT   	(0x00000018u)
#define CSL_SPI_SPIGCR1_SPIEN_RESETVAL 	(0x00000000u)
#define CSL_SPI_SPIGCR1_SPIEN_INRESET 	(0x00000000u)
#define CSL_SPI_SPIGCR1_SPIEN_ACTIVE  	(0x00000001u)

#define CSL_SPI_SPIGCR1_LOOPBK_MASK   	(0x00000001u)
#define CSL_SPI_SPIGCR1_LOOPBK_SHIFT  	(0x00000000u)
#define CSL_SPI_SPIGCR1_LOOPBK_RESETVAL 	(0x00000000u)
#define CSL_SPI_SPIGCR1_LOOPBK_DISABLE 	(0x00000000u)
#define CSL_SPI_SPIGCR1_LOOPBK_ENABLE 	(0x00000001u)

#define CSL_SPI_SPIGCR1_PWRDN_MASK    	(0x00000100u)
#define CSL_SPI_SPIGCR1_PWRDN_SHIFT   	(0x00000008u)
#define CSL_SPI_SPIGCR1_PWRDN_RESETVAL	(0x00000000u)
#define CSL_SPI_SPIGCR1_PWRDN_ACTIVE  	(0x00000000u)
#define CSL_SPI_SPIGCR1_PWRDN_PWRDN   	(0x00000001u)

#define CSL_SPI_SPIGCR1_CLKMOD_MASK   	(0x00000002u)
#define CSL_SPI_SPIGCR1_CLKMOD_SHIFT  	(0x00000001u)
#define CSL_SPI_SPIGCR1_CLKMOD_RESETVAL 	(0x00000000u)
#define CSL_SPI_SPIGCR1_CLKMOD_EXTERNAL 	(0x00000000u)
#define CSL_SPI_SPIGCR1_CLKMOD_INTERNAL 	(0x00000001u)

#define CSL_SPI_SPIGCR1_MASTER_MASK   	(0x00008000u)
#define CSL_SPI_SPIGCR1_MASTER_SHIFT  	(0x0000000Fu)
#define CSL_SPI_SPIGCR1_MASTER_RESETVAL 	(0x00000000u)
#define CSL_SPI_SPIGCR1_MASTER_NO     	(CSL_SPI_SPISET2_MASTER_NO)
#define CSL_SPI_SPIGCR1_MASTER_YES    	(CSL_SPI_SPISET2_MASTER_YES)

#define CSL_SPI_SPIGCR1_RESETVAL      	(0x00000002u)

/* SPIINT0 */

#define CSL_SPI_SPIINT0_ENAHIGHZ_MASK (0x01000000u)
#define CSL_SPI_SPIINT0_ENAHIGHZ_SHIFT (0x00000018u)
#define CSL_SPI_SPIINT0_ENAHIGHZ_RESETVAL (0x00000000u)
#define CSL_SPI_SPIINT0_ENAHIGHZ_DISABLE (0x00000000u)
#define CSL_SPI_SPIINT0_ENAHIGHZ_ENABLE (0x00000001u)

#define CSL_SPI_SPIINT0_DMAREQ_MASK   (0x00010000u)
#define CSL_SPI_SPIINT0_DMAREQ_SHIFT  (0x00000010u)
#define CSL_SPI_SPIINT0_DMAREQ_RESETVAL (0x00000000u)
#define CSL_SPI_SPIINT0_DMAREQ_DISABLE (0x00000000u)
#define CSL_SPI_SPIINT0_DMAREQ_ENABLE (0x00000001u)

#define CSL_SPI_SPIINT0_RXINT_MASK    (0x00000001u)
#define CSL_SPI_SPIINT0_RXINT_SHIFT   (0x00000000u)
#define CSL_SPI_SPIINT0_RXINT_RESETVAL (0x00000000u)
#define CSL_SPI_SPIINT0_RXINT_DISABLE (0x00000000u)
#define CSL_SPI_SPIINT0_RXINT_ENABLE  (0x00000001u)

#define CSL_SPI_SPIINT0_OVRNINT_MASK  (0x00000004u)
#define CSL_SPI_SPIINT0_OVRNINT_SHIFT (0x00000003u)
#define CSL_SPI_SPIINT0_OVRNINT_RESETVAL (0x00000000u)
#define CSL_SPI_SPIINT0_OVRNINT_DISABLE (0x00000000u)
#define CSL_SPI_SPIINT0_OVRNINT_ENABLE (0x00000001u)

#define CSL_SPI_SPIINT0_BITERR_MASK   (0x00000010u)
#define CSL_SPI_SPIINT0_BITERR_SHIFT  (0x00000004u)
#define CSL_SPI_SPIINT0_BITERR_RESETVAL (0x00000000u)
#define CSL_SPI_SPIINT0_BITERR_DISABLE (0x00000000u)
#define CSL_SPI_SPIINT0_BITERR_ENABLE (0x00000001u)

#define CSL_SPI_SPIINT0_DESYNC_MASK   (0x00000008u)
#define CSL_SPI_SPIINT0_DESYNC_SHIFT  (0x00000004u)
#define CSL_SPI_SPIINT0_DESYNC_RESETVAL (0x00000000u)
#define CSL_SPI_SPIINT0_DESYNC_DISABLE (0x00000000u)
#define CSL_SPI_SPIINT0_DESYNC_ENABLE (0x00000001u)

#define CSL_SPI_SPIINT0_PARERR_MASK   (0x00000010u)
#define CSL_SPI_SPIINT0_PARERR_SHIFT  (0x00000005u)
#define CSL_SPI_SPIINT0_PARERR_RESETVAL (0x00000000u)
#define CSL_SPI_SPIINT0_PARERR_DISABLE (0x00000000u)
#define CSL_SPI_SPIINT0_PARERR_ENABLE (0x00000001u)

#define CSL_SPI_SPIINT0_TIMEOUT_MASK  (0x00000020u)
#define CSL_SPI_SPIINT0_TIMEOUT_SHIFT (0x00000005u)
#define CSL_SPI_SPIINT0_TIMEOUT_RESETVAL (0x00000000u)
#define CSL_SPI_SPIINT0_TIMEOUT_DISABLE (0x00000000u)
#define CSL_SPI_SPIINT0_TIMEOUT_ENABLE (0x00000001u)

#define CSL_SPI_SPIINT0_RESETVAL      (0x00000000u)

/* SPILVL */

#define CSL_SPI_SPILVL_RXINT_MASK     (0x00000100u)
#define CSL_SPI_SPILVL_RXINT_SHIFT    (0x00000008u)
#define CSL_SPI_SPILVL_RXINT_RESETVAL (0x00000000u)
#define CSL_SPI_SPILVL_RXINT_INT0     (0x00000000u)
#define CSL_SPI_SPILVL_RXINT_INT1     (0x00000001u)

#define CSL_SPI_SPILVL_OVRNINT_MASK   (0x00000040u)
#define CSL_SPI_SPILVL_OVRNINT_SHIFT  (0x00000006u)
#define CSL_SPI_SPILVL_OVRNINT_RESETVAL (0x00000000u)
#define CSL_SPI_SPILVL_OVRNINT_INT0   (0x00000000u)
#define CSL_SPI_SPILVL_OVRNINT_INT1   (0x00000001u)

#define CSL_SPI_SPILVL_BITERR_MASK    (0x00000010u)
#define CSL_SPI_SPILVL_BITERR_SHIFT   (0x00000004u)
#define CSL_SPI_SPILVL_BITERR_RESETVAL (0x00000000u)
#define CSL_SPI_SPILVL_BITERR_INT0    (0x00000000u)
#define CSL_SPI_SPILVL_BITERR_INT1    (0x00000001u)

#define CSL_SPI_SPILVL_DESYNC_MASK    (0x00000008u)
#define CSL_SPI_SPILVL_DESYNC_SHIFT   (0x00000003u)
#define CSL_SPI_SPILVL_DESYNC_RESETVAL (0x00000000u)
#define CSL_SPI_SPILVL_DESYNC_INT0    (0x00000000u)
#define CSL_SPI_SPILVL_DESYNC_INT1    (0x00000001u)

#define CSL_SPI_SPILVL_PARERR_MASK    (0x00000004u)
#define CSL_SPI_SPILVL_PARERR_SHIFT   (0x00000002u)
#define CSL_SPI_SPILVL_PARERR_RESETVAL (0x00000000u)
#define CSL_SPI_SPILVL_PARERR_INT0    (0x00000000u)
#define CSL_SPI_SPILVL_PARERR_INT1    (0x00000001u)
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