csl_lcdctrl.h
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* @brief Mask loaded palette interrupt * @param None */ CSL_LCDCTRL_CMD_MASK_LOAD_PALETTE_INT, /** * @brief Unmask loaded palette interrupt * @param None */ CSL_LCDCTRL_CMD_UNMASK_LOAD_PALETTE_INT, /** * @brief Mask the line interrupt going to the shared interrupt * @param None */ CSL_LCDCTRL_CMD_MASK_NIRQ_LINE_INT, /** * @brief Unmask the line interrupt going to the shared interrupt * @param None */ CSL_LCDCTRL_CMD_UNMASK_NIRQ_LINE_INT, /** * @brief Mask the dedicated line interrupt * @param None */ CSL_LCDCTRL_CMD_MASK_DEDICATED_LINE_INT, /** * @brief Unmask the dedicated line interrupt * @param None */ CSL_LCDCTRL_CMD_UNMASK_DEDICATED_LINE_INT, /** * @brief Clear the loaded palette interrupt * @param None */ CSL_LCDCTRL_CMD_CLEAR_LOADED_PALETTE_INT, /** * @brief Clear the line interrupt * @param None */ CSL_LCDCTRL_CMD_CLEAR_LINE_INT, /** * @brief Clear the ac bias count status * @param None */ CSL_LCDCTRL_CMD_CLEAR_ACBIASCNT_INT, /** * @brief Clear the vsync interrupt * @param None */ CSL_LCDCTRL_CMD_CLEAR_VSYNC_INT} CSL_LcdctrlHwControlCmd;/*---------------------------------------------------------------------------------------------*//*---------------------------------------------------------------------------------------------*//** Enum's used to "Query" the LCD Controller h/w. */typedef enum { /** * @brief Query the current line being displayed * @param Uint16* */ CSL_LCDCTRL_QUERY_CURRENTLINE = 1, /** * @brief Query the line at which the interrupt is genearted * @param Uint16* */ CSL_LCDCTRL_QUERY_INTERRUPTLINE = 2, /** * @brief Query the frame done interrupt status * @param CSL_LcdctrlActiveFrame* */ CSL_LCDCTRL_QUERY_FRAMEDONE = 3, /** * @brief Query the vsync interrupt status * @param CSL_LcdCtrlVSInt* */ CSL_LCDCTRL_QUERY_VSYNCINT = 4, /** * @brief Query the synchronization lost status * @param CSL_LcdCtrlSyncStat* */ CSL_LCDCTRL_QUERY_SYNCLOST = 5, /** * @brief Query the AC bias count status * @param CSL_LcdCtrlACBiasCnt* */ CSL_LCDCTRL_QUERY_ACBIASCNT = 6, /** * @brief Query the fifo underflow status * @param CSL_LcdCtrlFIFOStat* */ CSL_LCDCTRL_QUERY_FIFO_UFLOW = 7, /** * @brief Query the palette loading interrupt status * @param CSL_LcdCtrlPaletteLoading* */ CSL_LCDCTRL_QUERY_PALETTE_LOADING = 8, /** * @brief Query the LCD controller enabled/disabled status * @param CSL_LcdctrlEndis* */ CSL_LCDCTRL_QUERY_ENDIS = 9, /** * @brief Query the line interrupt status * @param CSL_LcdCtrlLineInt* */ CSL_LCDCTRL_QUERY_LINEINT = 10} CSL_LcdctrlHwStatusQuery;/*---------------------------------------------------------------------------------------------*//*---------------------------------------------------------------------------------------------*//** @brief Strucure to setup LCD Timing 0 Register. */typedef struct CSL_LcdctrlHwSetupTiming0Reg { /** Configuration of pixels per line */ Uint16 pixels_per_line; /** Configuration of the horizontal sync pulse width */ Uint16 horz_sync_width; /** Configuration of the horizontal front porch*/ Uint16 horz_front_porch; /** Configuration of the horizontal back porch*/ Uint16 horz_back_porch;} CSL_LcdctrlHwSetupHorzTiming;/** Default setup structure for the CSL_LcdctrlHwSetupHorzTiming setup structure. */#define CSL_LCDCTRL_HWSETUP_HORZTIMING_DEFAULTS {\(Uint16) CSL_LCDCTRL_TIMING0_PPL_RESETVAL, \(Uint16) CSL_LCDCTRL_TIMING0_HSW_RESETVAL, \(Uint16) CSL_LCDCTRL_TIMING0_HFP_RESETVAL, \(Uint16) CSL_LCDCTRL_TIMING0_HBP_RESETVAL\}/*---------------------------------------------------------------------------------------------*//*---------------------------------------------------------------------------------------------*//** @brief Strucure to setup LCD Timing 1 Register. */typedef struct CSL_LcdctrlHwSetupTiming1Reg { /** Configuration of the number of lines per panel */ Uint16 lines_per_panel; /** Configuration of vertical sync pulse width */ Uint16 vert_sync_width; /** Configuration of vertical front porch */ Uint16 vert_front_porch; /** Configuration of vertical back porch */ Uint16 vert_back_porch;} CSL_LcdctrlHwSetupVertTiming;/** Default setup structure for the CSL_LcdctrlHwSetupVertTiming setup structure. */#define CSL_LCDCTRL_HWSETUP_VERTTIMING_DEFAULTS {\(Uint16) CSL_LCDCTRL_TIMING1_LPP_RESETVAL, \(Uint16) CSL_LCDCTRL_TIMING1_VSW_RESETVAL, \(Uint16) CSL_LCDCTRL_TIMING1_VFP_RESETVAL, \(Uint16) CSL_LCDCTRL_TIMING1_VBP_RESETVAL \}/*---------------------------------------------------------------------------------------------*//*---------------------------------------------------------------------------------------------*//** @brief Strucure to setup LCD Timing 2 Register. */typedef struct CSL_LcdctrlHwSetupTiming2Reg { /** Pixel clock divisor */ Uint16 pixel_clk_divisor; /** ac bias pin transitions per interrupt */ Uint16 acbias; /** ac bias pin frequency */ Uint16 acbiasint; /** Invert VSYNC configuration */ CSL_LcdctrlIVS invert_vsync; /** Invert HSYNC configuration */ CSL_LcdctrlIHS invert_hsync; /** Invert pixel clock configuration */ CSL_LcdctrlIPC invert_pixel_clk; /** Invert output enable configuration */ CSL_LcdctrlIEO invert_output_enable; /** HSYNC/VSYNC rise/fall configuration */ CSL_LcdctrlRF rise_fall; /** Pixel clock control */ CSL_LcdctrlPxlClkCtrl pixel_clk_ctrl;} CSL_LcdctrlHwSetupCommonTiming;/** Default setup structure for the CSL_LcdctrlHwSetupCommonTiming setup structure. */#define CSL_LCDCTRL_HWSETUP_COMMONTIMING_DEFAULTS { \(Uint16) CSL_LCDCTRL_TIMING2_PCD_RESETVAL, \(Uint16) CSL_LCDCTRL_TIMING2_ACB_RESETVAL, \(Uint16) CSL_LCDCTRL_TIMING2_ACBI_RESETVAL, \(CSL_LcdctrlIVS) CSL_LCDCTRL_TIMING2_IVS_RESETVAL, \(CSL_LcdctrlIHS) CSL_LCDCTRL_TIMING2_IHS_RESETVAL, \(CSL_LcdctrlIPC) CSL_LCDCTRL_TIMING2_IPC_RESETVAL, \(CSL_LcdctrlIEO) CSL_LCDCTRL_TIMING2_IEO_RESETVAL, \(CSL_LcdctrlRF) CSL_LCDCTRL_TIMING2_RF_RESETVAL, \(CSL_LcdctrlPxlClkCtrl) CSL_LCDCTRL_TIMING2_ONOFF_RESETVAL \}/*---------------------------------------------------------------------------------------------*//*---------------------------------------------------------------------------------------------*//** @brief Basic Display Settings. */typedef struct CSL_LcdctrlHwSetupBasic { /** Monochrome/Color setting. */ CSL_LcdctrlMonoColor bwcolor; /** Passive Display (STN) or Active Display (TFT). */ CSL_LcdctrlDisplay actpassive; /** 12-BPP STN (565) Mode */ CSL_LcdctrlBPP STN565_mode; /** LCD Control Bit 0. */ Bool lcdcb0; /** LCD Control Bit 1. */ Bool lcdcb1; /** Pixel Data Width. */ CSL_LcdctrlPxlWidth pxlwidth; /** Palette Loading Mode. */ CSL_LcdctrlPaletteMode palette; /** FIFO DMA request delay (0-255) LCD_CK cycles. */ Uint16 fifo_dma_req_delay;}CSL_LcdctrlHwSetupBasicDisp;/** Default setup structure for the CSL_LcdctrlHwSetupBasicDisp setup structure. */#define CSL_LCDCTRL_HWSETUP_BASICDISP_DEFAULTS { \(CSL_LcdctrlMonoColor) CSL_LCDCTRL_CTRL_LCDBW_RESETVAL, \(CSL_LcdctrlDisplay) CSL_LCDCTRL_CTRL_LCDTFT_RESETVAL, \(CSL_LcdctrlBPP) CSL_LCDCTRL_CTRL_STN_RESETVAL, \(Bool) CSL_LCDCTRL_CTRL_LCDCB0_RESETVAL, \(Bool) CSL_LCDCTRL_CTRL_LCDCB1_RESETVAL, \(CSL_LcdctrlPxlWidth) CSL_LCDCTRL_CTRL_M8B_RESETVAL, \(CSL_LcdctrlPaletteMode) CSL_LCDCTRL_CTRL_PLM_RESETVAL, \(Uint16) CSL_LCDCTRL_CTRL_FDD_RESETVAL \}/*---------------------------------------------------------------------------------------------*//*---------------------------------------------------------------------------------------------*//** @brief TFT Display Settings. */typedef struct CSL_LcdctrlHwSetupTFTMode { /** TFT alternate signal mapping */ CSL_LcdctrlTFTMap TFT_signal_map; /** Pixel toggles always/ during valid data */ CSL_LcdctrlPixelGating TFT_pixel_gating;}CSL_LcdctrlHwSetupTFTMode;/** Default setup structure for the CSL_LcdctrlHwSetupTFTMode setup structure. */#define CSL_LCDCTRL_HWSETUP_TFTMODE_DEFAULTS { \(CSL_LcdctrlTFTMap) CSL_LCDCTRL_CTRL_TFT_RESETVAL, \(CSL_LcdctrlPixelGating) CSL_LCDCTRL_CTRL_PXLGATED_RESETVAL \}/*---------------------------------------------------------------------------------------------*//*---------------------------------------------------------------------------------------------*//** @brief SubPanel Register Settings. */typedef struct CSL_LcdctrlHwSetupSubPanel { /** Default pixel data */ Uint16 default_pixel_data; /** Line per panel threshold */ Uint16 line_per_panel_thresh; /** Subpanel signal high or low */ CSL_LcdctrlSignalLevel siglevel;}CSL_LcdctrlHwSetupSubPanel;/** Default values for the subpanel configuration */#define CSL_LCDCTRL_HWSETUP_SUBPANEL_DEFAULTS {\(Uint16) CSL_LCDCTRL_SUBPANEL_DPD_RESETVAL, \(Uint16) (CSL_LCDCTRL_SUBPANEL_LPPT_RESETVAL + 1), \(CSL_LcdctrlSignalLevel) CSL_LCDCTRL_SUBPANEL_HOLS_RESETVAL, \}/*---------------------------------------------------------------------------------------------*//** @brief Structure used to setup LCD Controller.*/typedef struct CSL_LcdctrlHwSetup { /** Active TFT Display Settings. */ CSL_LcdctrlHwSetupTFTMode *TFTSetup; /** Display settings : Mode, Control Bits (0 & 1 settings), * Active/Passive display settings. */ CSL_LcdctrlHwSetupBasicDisp *dispsetup; /** LCD Timing Register0 setting. */ CSL_LcdctrlHwSetupHorzTiming *htiming; /** LCD Timing Register1 setting. */ CSL_LcdctrlHwSetupVertTiming *vtiming; /** LCD Timing Register2 settings. ( Common settings for Horizontal & Vertical timings). */ CSL_LcdctrlHwSetupCommonTiming *ctiming; /** SubPanel Register Settings. */ CSL_LcdctrlHwSetupSubPanel *subpanel;} CSL_LcdctrlHwSetup;/** Default values for the setup structure */#define CSL_LCDCTRL_HWSETUP_DEFAULTS {\ &(CSL_LcdctrlHwSetupTFTMode *)(CSL_LCDCTRL_HWSETUP_TFTMODE_DEFAULTS), \ &(CSL_LcdctrlHwSetupBasicDisp *)(CSL_LCDCTRL_HWSETUP_BASICDISP_DEFAULTS), \ &(CSL_LcdctrlHwSetupHorzTiming *)(CSL_LCDCTRL_HWSETUP_HORZTIMING_DEFAULTS), \ &(CSL_LcdctrlHwSetupVertTiming *)(CSL_LCDCTRL_HWSETUP_VERTTIMING_DEFAULTS), \ &(CSL_LcdctrlHwSetupCommonTiming *)(CSL_LCDCTRL_HWSETUP_COMMONTIMING_DEFAULTS), \ &(CSL_LcdctrlHwSetupSubPanel *)(CSL_LCDCTRL_HWSETUP_SUBPANEL_DEFAULTS) \}/** @brief Structure used in the csl_lcdctrlHwSetupRaw () of the LCD Controller.*/typedef struct CSL_LcdctrlConfig { /** Control register settings */ Uint32 CONTROL; /** LCD timing register 0 setting. */ Uint32 TIMING0; /** LCD timing register 1 setting. */ Uint32 TIMING1; /** LCD timing register 2 setting. */ Uint32 TIMING2; /** Sub panel register settings. */ Uint32 SUBPANEL; /** Line interrupt register setting */ Uint32 LINEINT;} CSL_LcdctrlConfig;/** Default values for config structure */#define CSL_LCDTRL_CONFIG_DEFAULTS { \ CSL_LCDCTRL_CTRL_RESETVAL, \ CSL_LCDCTRL_TIMING0_RESETVAL, \ CSL_LCDCTRL_TIMING1_RESETVAL, \ CSL_LCDCTRL_TIMING2_RESETVAL, \ CSL_LCDCTRL_SUBPANEL_RESETVAL, \ CSL_LCDCTRL_LINEINT_RESETVAL \}/**************************************************************************\ * LCDCTRL global macro declarations \**************************************************************************//**************************************************************************\ * LCDCTRL global typedef declarations \**************************************************************************//** @brief LCD controller module object structure */typedef struct CSL_LcdctrlObj { /** This is a pointer to the registers of the instance of LCDCTRL * referred to by this object */ CSL_LcdctrlRegsOvly regs; /** This is the instance of LCDCTRL being referred to by this object */ CSL_InstNum perNum;
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