csl_lcdctrl.h
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/** ========================================================= * Copyright (c) Texas Instruments Inc 2002, 2003 * * Use of this software is controlled by the terms and conditions found * in the license agreement under which this software has been supplied * provided * ========================================================== *//** @file csl_lcdctrl.h * * @brief CSL Functional layer header for LCD Controller * * Description * - The different enumerations for Control commands and queries, structure definitions for * Hardware setup and function declarations for Initialization,Instance open, Instance close, * Hardware setup,Control and status. * * @author: * * Modifications * - modified on: 21/06/2004 * - reason: Incorporated review Comments from V.Sathyanarayan * 1> CSL_LCDCTRL_ANY need not be provided in the CSL_LcdctrlNum enum as there is only one instance * of the LCD Controller. Open(.) implementation will also get simplified. * 2> The spendis member is part of two structures namely :- * CSL_LcdctrlHwSetupSubPanel and CSL_LcdctrlHwSetup. It need not be part of the CSL_LcdctrlHwSetup structure. * 3> The names of the structure members could be more descriptive instead of the 3-5 letter acronyms similar to the * bit names. This would help the CSL to data structure members to be more intuitive. Corresponding changes are done * for structs, CSL_LcdctrlHwSetupVertTiming, CSL_LcdctrlHwSetupHorzTiming, CSL_LcdctrlHwSetupCommonTiming, * CSL_LcdctrlHwSetupSubPanel. * 4> The following bits of the Control register do not feature in the setup :- * 565STN, TFTMAP,FDD,pxl_gated,line_int_clr_sel bit. * 565STN, FDD are added into CSL_LcdctrlHwSetupBasicDisp. * TFTMAP & pxl_gated are added into new struct CSL_LcdctrlHwSetupTFTMode. * line_int_clr_sel bit will be added as control cmd. * 5> Interrupt Mask (intmask) in the CSL_LcdctrlHwSetup structure can be a bit-vector instead of a structure. * This is for uniformity across the modules. Hence, removed that struct part and implemented as corresponding mask & * unmask cmds for each interrupts. * * @date: 21st June, 2004 * @modified by: Anil Kumar.T.S * * Modification 2 * - modified on: 05/10/2004 * - reason: fix for PSG00000130 * * date: 5th October, 2004 * modified by: Sandhya S * * Modification 3 * - modified on: 21/12/2004 * - reason: UT fixes, adding CSL_LcdctrlConfig structure and adding additional control commands * and queries * * date: 28th January, 2005 * modified by: Sandhya S * Modification 4 * - modified on: 28/1/2005 * - reason: Adding doxygen compatible comments * * date: 28th January, 2005 * modified by: Sandhya S */#ifndef _CSL_LCDCTRL_H_#define _CSL_LCDCTRL_H_#ifdef __cplusplusextern "C" {#endif#include <csl.h>#include <cslr_lcdctrl.h>/** LCD controller enable/isable setting. */typedef enum { /** Enable the LCD controller */ CSL_LCDCTRL_ENDIS_ENABLE = CSL_LCDCTRL_CTRL_LCDEN_ENABLE, /** Disable the LCD controller */ CSL_LCDCTRL_ENDIS_DISABLE = CSL_LCDCTRL_CTRL_LCDEN_DISABLE} CSL_LcdctrlEndis;/** LCD controller monochrome/color setting. */typedef enum { /** LCD controller color mode */ CSL_LCDCTRL_MONOCOLOR_COLOR = CSL_LCDCTRL_CTRL_LCDBW_COLOR, /** LCD controller monochrome mode */ CSL_LCDCTRL_MONOCOLOR_MONOCHROME = CSL_LCDCTRL_CTRL_LCDBW_MONO} CSL_LcdctrlMonoColor;/** LCD controller mask setting. This is to be used for controlling the following fields in the LCD controller register * Done Mask, * Load Mask, * Line Interrupt Mask. */typedef enum { /** Mask active */ CSL_LCDCTRL_INTMASK_ACTIVE = 0, /** Mask not active */ CSL_LCDCTRL_INTMASK_NOTACTIVE = 1} CSL_LcdctrlIntMask;/** LCD active(TFT) / passive(STN) display settings */typedef enum { /** LCD controller passive (STN) mode */ CSL_LCDCTRL_DISPLAY_STN = CSL_LCDCTRL_CTRL_LCDTFT_PASSIVE, /** LCD controller active (TFT) mode */ CSL_LCDCTRL_DISPLAY_TFT = CSL_LCDCTRL_CTRL_LCDTFT_ACTIVE} CSL_LcdctrlDisplay;/** LCD Controller settings for pixel data width. */typedef enum { /** Pixel data [3:0] is used to output four pixel values to the panel at * each pixel clock transition. */ CSL_LCDCTRL_PXLWIDTH_FOUR = CSL_LCDCTRL_CTRL_M8B_DATA30, /** Pixel data [7:0] is used to output eight pixel values to the panel at * each pixel clock transition. */ CSL_LCDCTRL_PXLWIDTH_EIGHT = CSL_LCDCTRL_CTRL_M8B_DATA70} CSL_LcdctrlPxlWidth;/** LCD Controller settings for palette loading mode. */typedef enum { /** Palette and data loading */ CSL_LCDCTRL_PLM_PALETTE_AND_DATA = CSL_LCDCTRL_CTRL_PLM_PALETTEDATA, /** Palette loading */ CSL_LCDCTRL_PLM_PALETTE = CSL_LCDCTRL_CTRL_PLM_PALETTE, /** Data loading */ CSL_LCDCTRL_PLM_DATA = CSL_LCDCTRL_CTRL_PLM_DATA, /** Not connected */ CSL_LCDCTRL_PLM_NOT_CONNECTED = CSL_LCDCTRL_CTRL_PLM_NOTCONNECT} CSL_LcdctrlPaletteMode;/** LCD Controller settings for TFT alternate signal mapping. */typedef enum { /** Output pixel data for 1, 2, 4, 8, and 12 BPP modes is right aligned * on pixel data[11:0] */ CSL_LCDCTRL_TFT_RIGHT_ALIGNED = CSL_LCDCTRL_CTRL_TFT_RIGHTALIGN, /** Output pixel data for 1, 2, 4, 8, and 12 BPP modes is converted to * 5,6,5 format and uses pins [15:0]. */ CSL_LCDCTRL_TFT_565 = CSL_LCDCTRL_CTRL_TFT_FORMAT565} CSL_LcdctrlTFTMap;/** LCD Controller settings for TFT pixel gated. */typedef enum { /** Pixel clock always toggles. */ CSL_LCDCTRL_PXLCLK_TOGGLE_ALWAYS = CSL_LCDCTRL_CTRL_PXLGATED_ALWAYS, /** Pixel clock only toggles when there is valid data to display. */ CSL_LCDCTRL_PXLCLK_TOGGLE_ON_VALID_DATA = CSL_LCDCTRL_CTRL_PXLGATED_DISPLAYDATA} CSL_LcdctrlPixelGating;/** LCD Controller settings for 12-BPP (565) mode. */typedef enum { /** 12-BPP (565) mode off */ CSL_LCDCTRL_12BPP_OFF = CSL_LCDCTRL_CTRL_STN_OFF, /** 12-BPP (565) mode on */ CSL_LCDCTRL_12BPP_ON = CSL_LCDCTRL_CTRL_STN_ON} CSL_LcdctrlBPP;/** Configure the IVS line to be active HIGH or active LOW. */typedef enum { /** The frame clock (VSYNC) is active high */ CSL_LCDCTRL_IVS_ACTIVE_HIGH = CSL_LCDCTRL_TIMING2_IVS_ACTIVEHIGH, /** The frame clock (VSYNC) is active low */ CSL_LCDCTRL_IVS_ACTIVE_LOW = CSL_LCDCTRL_TIMING2_IVS_ACTIVELOW} CSL_LcdctrlIVS;/** Configure the IHS line to be active HIGH or active LOW. */typedef enum { /** The line clock (HSYNC) is active high */ CSL_LCDCTRL_IHS_ACTIVE_HIGH = CSL_LCDCTRL_TIMING2_IHS_ACTIVEHIGH, /** The line clock (HSYNC) is active low */ CSL_LCDCTRL_IHS_ACTIVE_LOW = CSL_LCDCTRL_TIMING2_IHS_ACTIVELOW} CSL_LcdctrlIHS;/** Pixel clock rising/falling edge configuration */typedef enum { /** Data is driven on the LCD data lines on the rising-edge of the * pixel clock. */ CSL_LCDCTRL_IPC_RISING_EDGE = CSL_LCDCTRL_TIMING2_IPC_RISING, /** Data is driven on the LCD data lines on the falling-edge of the * pixel clock. */ CSL_LCDCTRL_IPC_FALLING_EDGE = CSL_LCDCTRL_TIMING2_IPC_FALLING} CSL_LcdctrlIPC;/** ac bias pin configuration */typedef enum { /** ac-bias pin is active high in active display mode. */ CSL_LCDCTRL_IEO_ACTIVE_HIGH = CSL_LCDCTRL_TIMING2_IEO_ACTIVEHIGH, /** ac-bias pin is active low in active display mode. */ CSL_LCDCTRL_IEO_ACTIVE_LOW = CSL_LCDCTRL_TIMING2_IEO_ACTIVELOW}CSL_LcdctrlIEO;/** Program HSYNC/VSYNC rise or fall */typedef enum { /** Line clock (HSYNC) and frame clock (VSYNC) are driven on falling edge * of pixel clock. */ CSL_LCDCTRL_RF_FALLING_EDGE = CSL_LCDCTRL_TIMING2_RF_FALLINGEDGE, /** Line clock (HSYNC) and frame clock (VSYNC) are driven on rising edge * of pixel clock. */ CSL_LCDCTRL_RF_RISING_EDGE = CSL_LCDCTRL_TIMING2_RF_RISINGEDGE}CSL_LcdctrlRF;/** HSYNC/VSYNC pixel clock control on/off */typedef enum { /** Line clock (HSYNC) and frame clock (VSYNC) are driven on opposite edges * of pixel clock than the pixel data */ CSL_LCDCTRL_PXLCLKCTRL_OPPOSITE_EDGES = CSL_LCDCTRL_TIMING2_ONOFF_OPPOSITE , /** Line clock (HSYNC) and frame clock (VSYNC) are driven according * to bit 24. */ CSL_LCDCTRL_PXLCLKCTRL_BIT24 = CSL_LCDCTRL_TIMING2_ONOFF_SAME}CSL_LcdctrlPxlClkCtrl;/** Sub panel high or low signal configuration */typedef enum { /** The image from the frame buffer is displayed below the LPPT value. */ CSL_LCDCTRL_SIGNALLEVEL_HIGH = CSL_LCDCTRL_SUBPANEL_HOLS_ABOVE, /** The image from the frame buffer is displayed above the LPPT value. */ CSL_LCDCTRL_SIGNALLEVEL_LOW = CSL_LCDCTRL_SUBPANEL_HOLS_BELOW}CSL_LcdctrlSignalLevel;/** SubPanel block enable/disable setting. */typedef enum { /** Subpanel function is disabled. */ CSL_LCDCTRL_SUBPANEL_DISABLE = CSL_LCDCTRL_SUBPANEL_SPEN_DISABLE, /** Subpanel function is enabled. */ CSL_LCDCTRL_SUBPANEL_ENABLE = CSL_LCDCTRL_SUBPANEL_SPEN_ENABLE}CSL_LcdctrlSubPanelEnDis;/** Active frame not done or done status. */typedef enum { /** LCD is enabled */ CSL_LCDCTRL_ACTIVEFRAME_NOTDONE = CSL_LCDCTRL_STATUS_DONE_NOTDONE, /** LCD is disabled and the active frame is just completed. */ CSL_LCDCTRL_ACTIVEFRAME_DONE = CSL_LCDCTRL_STATUS_DONE_DONE} CSL_LcdctrlActiveFrame;/** Vertical sync interrupt generation. */typedef enum { /** VSYNC interrupt is generated. */ CSL_LCDCTRL_VSINT_GENERATED = CSL_LCDCTRL_STATUS_VS_INTERRUPT, /** VSYNC interrupt is not generated. */ CSL_LCDCTRL_VSINT_NOTGENERATED = CSL_LCDCTRL_STATUS_VS_NOINTERRUPT} CSL_LcdCtrlVSInt;/** Line interrupt generation. */typedef enum { /** LINE interrupt is generated. */ CSL_LCDCTRL_LINEINT_GENERATED = CSL_LCDCTRL_STATUS_LINEINT_INTERRUPT, /** LINE interrupt is not generated. */ CSL_LCDCTRL_LINEINT_NOTGENERATED = CSL_LCDCTRL_STATUS_LINEINT_NOINTERRUPT} CSL_LcdCtrlLineInt;/** Frame synchronization status. */typedef enum { /** Frame synchronization error occurred. */ CSL_LCDCTRL_SYNCSTAT_ERROR = CSL_LCDCTRL_STATUS_SYNCLOST_ERROR, /** No frame synchronization error occurred. */ CSL_LCDCTRL_SYNCSTAT_OK = CSL_LCDCTRL_STATUS_SYNCLOST_NOERROR}CSL_LcdCtrlSyncStat;/** AC Bias count status. */typedef enum { /** ac-bias transition counter has decremented to 0 */ CSL_LCDCTRL_ACBIASCNT_ZERO = CSL_LCDCTRL_STATUS_ABC_ZERO, /** ac-bias transition counter has not decremented to 0 */ CSL_LCDCTRL_ACBIASCNT_NOTZERO = CSL_LCDCTRL_STATUS_ABC_NOTZERO} CSL_LcdCtrlACBiasCnt;/** FIFO underflow status. */typedef enum { /** FIFO has underrun. */ CSL_LCDCTRL_FIFOSTAT_OVERFLOW = CSL_LCDCTRL_STATUS_FUF_UNDERFLOW, /** FIFO has not underrun. */ CSL_LCDCTRL_FIFOSTAT_NOOVERFLOW =CSL_LCDCTRL_STATUS_FUF_NOUNDERFLOW} CSL_LcdCtrlFIFOStat;/* Palette loading status. */typedef enum { /** Palette is not loaded. */ CSL_LCDCTRL_PALETTELOADING_EMPTY = CSL_LCDCTRL_STATUS_LP_EMPTY, /** Palette is loaded. */ CSL_LCDCTRL_PALETTELOADING_FULL = CSL_LCDCTRL_STATUS_LP_LOADED} CSL_LcdCtrlPaletteLoading;/*---------------------------------------------------------------------------------------------*//*---------------------------------------------------------------------------------------------*//** Enum's used to "Control" the LCD Controller. */typedef enum { /** * @brief Disable the LCD controller * @param None */ CSL_LCDCTRL_CMD_DISABLE_LCDCONTROLLER = 1, /** * @brief Enable the LCD controller * @param None */ CSL_LCDCTRL_CMD_ENABLE_LCDCONTROLLER, /** * @brief Set the line at which the interrupt is to be generated * @param Uint16 * */ CSL_LCDCTRL_CMD_LINEINT_NUMBER, /** * @brief Disable sub panel display * @param None */ CSL_LCDCTRL_CMD_DISABLE_SUBPANEL_DISPLAY, /** * @brief Enable sub panel display * @param None */ CSL_LCDCTRL_CMD_ENABLE_SUBPANEL_DISPLAY, /** * @brief Mask VSYNC interrupt * @param None */ CSL_LCDCTRL_CMD_MASK_VSYNC_INT, /** * @brief Unmask VSYNC interrupt * @param None */ CSL_LCDCTRL_CMD_UNMASK_VSYNC_INT, /** * @brief Mask frame done interrupt * @param None */ CSL_LCDCTRL_CMD_MASK_FRAMEDONE_INT, /** * @brief Unmask frame done interrupt * @param None */ CSL_LCDCTRL_CMD_UNMASK_FRAMEDONE_INT, /**
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