cslr_mmcsd.h

来自「dsp在音频处理中的运用」· C头文件代码 · 共 756 行 · 第 1/2 页
756 行
#define CSL_MMCSD_IE_BRS_RESETVAL        (0x00000000u)#define CSL_MMCSD_IE_BRS_INTDIS          (0x00000000u)#define CSL_MMCSD_IE_BRS_INTEN           (0x00000001u)#define CSL_MMCSD_IE_CB_MASK             (0x00000004u)#define CSL_MMCSD_IE_CB_SHIFT            (0x00000002u)#define CSL_MMCSD_IE_CB_RESETVAL         (0x00000000u)#define CSL_MMCSD_IE_CB_INTDIS           (0x00000000u)#define CSL_MMCSD_IE_CB_INTEN            (0x00000001u)#define CSL_MMCSD_IE_CD_MASK             (0x00000002u)#define CSL_MMCSD_IE_CD_SHIFT            (0x00000001u)#define CSL_MMCSD_IE_CD_RESETVAL         (0x00000000u)#define CSL_MMCSD_IE_CD_INTDIS           (0x00000000u)#define CSL_MMCSD_IE_CD_INTEN            (0x00000001u)#define CSL_MMCSD_IE_EOC_MASK            (0x00000001u)#define CSL_MMCSD_IE_EOC_SHIFT           (0x00000000u)#define CSL_MMCSD_IE_EOC_RESETVAL        (0x00000000u)#define CSL_MMCSD_IE_EOC_INTDIS          (0x00000000u)#define CSL_MMCSD_IE_EOC_INTEN           (0x00000001u)#define CSL_MMCSD_IE_RESETVAL            (0x00000000u)/* CTO */#define CSL_MMCSD_CTO_CTO_MASK           (0x000000FFu)#define CSL_MMCSD_CTO_CTO_SHIFT          (0x00000000u)#define CSL_MMCSD_CTO_CTO_RESETVAL       (0x00000000u)#define CSL_MMCSD_CTO_RESETVAL           (0x00000000u)/* DTO */#define CSL_MMCSD_DTO_DTO_MASK           (0x0000FFFFu)#define CSL_MMCSD_DTO_DTO_SHIFT          (0x00000000u)#define CSL_MMCSD_DTO_DTO_RESETVAL       (0x00000000u)#define CSL_MMCSD_DTO_RESETVAL           (0x00000000u)/* DATA */#define CSL_MMCSD_DATA_DATA_MASK         (0x0000FFFFu)#define CSL_MMCSD_DATA_DATA_SHIFT        (0x00000000u)#define CSL_MMCSD_DATA_DATA_RESETVAL     (0x00000000u)#define CSL_MMCSD_DATA_RESETVAL          (0x00000000u)/* BLEN */#define CSL_MMCSD_BLEN_BLEN_MASK         (0x000007FFu)#define CSL_MMCSD_BLEN_BLEN_SHIFT        (0x00000000u)#define CSL_MMCSD_BLEN_BLEN_RESETVAL     (0x00000000u)#define CSL_MMCSD_BLEN_RESETVAL          (0x00000000u)/* NBLK */#define CSL_MMCSD_NBLK_NBLK_MASK         (0x000007FFu)#define CSL_MMCSD_NBLK_NBLK_SHIFT        (0x00000000u)#define CSL_MMCSD_NBLK_NBLK_RESETVAL     (0x00000000u)#define CSL_MMCSD_NBLK_RESETVAL          (0x00000000u)/* BUF */#define CSL_MMCSD_BUF_RXDE_MASK          (0x00008000u)#define CSL_MMCSD_BUF_RXDE_SHIFT         (0x0000000Fu)#define CSL_MMCSD_BUF_RXDE_RESETVAL      (0x00000000u)#define CSL_MMCSD_BUF_RXDE_DIS           (0x00000000u)#define CSL_MMCSD_BUF_RXDE_EN            (0x00000001u)#define CSL_MMCSD_BUF_AFL_MASK           (0x00001F00u)#define CSL_MMCSD_BUF_AFL_SHIFT          (0x00000008u)#define CSL_MMCSD_BUF_AFL_RESETVAL       (0x00000000u)#define CSL_MMCSD_BUF_TXDE_MASK          (0x00000080u)#define CSL_MMCSD_BUF_TXDE_SHIFT         (0x00000007u)#define CSL_MMCSD_BUF_TXDE_RESETVAL      (0x00000000u)#define CSL_MMCSD_BUF_TXDE_DIS           (0x00000000u)#define CSL_MMCSD_BUF_TXDE_EN            (0x00000001u)#define CSL_MMCSD_BUF_AEL_MASK           (0x0000001Fu)#define CSL_MMCSD_BUF_AEL_SHIFT          (0x00000000u)#define CSL_MMCSD_BUF_AEL_RESETVAL       (0x00000000u)#define CSL_MMCSD_BUF_RESETVAL           (0x00000000u)/* SPI */#define CSL_MMCSD_SPI_STR_MASK           (0x00008000u)#define CSL_MMCSD_SPI_STR_SHIFT          (0x0000000Fu)#define CSL_MMCSD_SPI_STR_RESETVAL       (0x00000000u)#define CSL_MMCSD_SPI_STR_NOACT          (0x00000000u)#define CSL_MMCSD_SPI_STR_START          (0x00000000u)#define CSL_MMCSD_SPI_WNR_MASK           (0x00004000u)#define CSL_MMCSD_SPI_WNR_SHIFT          (0x0000000Eu)#define CSL_MMCSD_SPI_WNR_RESETVAL       (0x00000000u)#define CSL_MMCSD_SPI_WNR_READ           (0x00000000u)#define CSL_MMCSD_SPI_WNR_WRITE          (0x00000001u)#define CSL_MMCSD_SPI_SODV_MASK          (0x00002000u)#define CSL_MMCSD_SPI_SODV_SHIFT         (0x0000000Du)#define CSL_MMCSD_SPI_SODV_RESETVAL      (0x00000000u)#define CSL_MMCSD_SPI_SODV_ZERO          (0x00000000u)#define CSL_MMCSD_SPI_SODV_ONE           (0x00000001u)#define CSL_MMCSD_SPI_CSTR_MASK          (0x00001000u)#define CSL_MMCSD_SPI_CSTR_SHIFT         (0x0000000Cu)#define CSL_MMCSD_SPI_CSTR_RESETVAL      (0x00000000u)#define CSL_MMCSD_SPI_CSTR_FIFO          (0x00000000u)#define CSL_MMCSD_SPI_CSTR_NOFIFO        (0x00000001u)#define CSL_MMCSD_SPI_TCSH_MASK          (0x00000C00u)#define CSL_MMCSD_SPI_TCSH_SHIFT         (0x0000000Au)#define CSL_MMCSD_SPI_TCSH_RESETVAL      (0x00000000u)#define CSL_MMCSD_SPI_TCSH_1BY2          (0x00000000u)#define CSL_MMCSD_SPI_TCSH_3BY2          (0x00000001u)#define CSL_MMCSD_SPI_TCSH_5BY2          (0x00000002u)#define CSL_MMCSD_SPI_TCSH_7BY2          (0x00000003u)#define CSL_MMCSD_SPI_TCSS_MASK          (0x00000300u)#define CSL_MMCSD_SPI_TCSS_SHIFT         (0x00000008u)#define CSL_MMCSD_SPI_TCSS_RESETVAL      (0x00000000u)#define CSL_MMCSD_SPI_CSEL_MASK          (0x00000080u)#define CSL_MMCSD_SPI_CSEL_SHIFT         (0x00000007u)#define CSL_MMCSD_SPI_CSEL_RESETVAL      (0x00000000u)#define CSL_MMCSD_SPI_CSEL_SPI           (0x00000000u)#define CSL_MMCSD_SPI_CSEL_MMC           (0x00000000u)#define CSL_MMCSD_SPI_CS_MASK            (0x00000030u)#define CSL_MMCSD_SPI_CS_SHIFT           (0x00000004u)#define CSL_MMCSD_SPI_CS_RESETVAL        (0x00000000u)#define CSL_MMCSD_SPI_CSM_MASK           (0x00000008u)#define CSL_MMCSD_SPI_CSM_SHIFT          (0x00000003u)#define CSL_MMCSD_SPI_CSM_RESETVAL       (0x00000000u)#define CSL_MMCSD_SPI_CSM_AUTO           (0x00000000u)#define CSL_MMCSD_SPI_CSM_MANUAL         (0x00000001u)#define CSL_MMCSD_SPI_CSD_MASK           (0x00000004u)#define CSL_MMCSD_SPI_CSD_SHIFT          (0x00000002u)#define CSL_MMCSD_SPI_CSD_RESETVAL       (0x00000000u)#define CSL_MMCSD_SPI_CSD_COND           (0x00000000u)#define CSL_MMCSD_SPI_CSD_LO             (0x00000000u)#define CSL_MMCSD_SPI_CSD_HI             (0x00000001u)#define CSL_MMCSD_SPI_PHA_MASK           (0x00000002u)#define CSL_MMCSD_SPI_PHA_SHIFT          (0x00000001u)#define CSL_MMCSD_SPI_PHA_RESETVAL       (0x00000000u)#define CSL_MMCSD_SPI_PHA_OUT            (0x00000000u)#define CSL_MMCSD_SPI_PHA_IN             (0x00000001u)#define CSL_MMCSD_SPI_POL_MASK           (0x00000001u)#define CSL_MMCSD_SPI_POL_SHIFT          (0x00000000u)#define CSL_MMCSD_SPI_POL_RESETVAL       (0x00000000u)#define CSL_MMCSD_SPI_POL_RISING         (0x00000000u)#define CSL_MMCSD_SPI_POL_FALLING        (0x00000001u)#define CSL_MMCSD_SPI_RESETVAL           (0x00000000u)/* SDIO */#define CSL_MMCSD_SDIO_C5E_MASK          (0x00008000u)#define CSL_MMCSD_SDIO_C5E_SHIFT         (0x0000000Fu)#define CSL_MMCSD_SDIO_C5E_RESETVAL      (0x00000000u)#define CSL_MMCSD_SDIO_C5E_DIS           (0x00000000u)#define CSL_MMCSD_SDIO_C5E_EN            (0x00000001u)#define CSL_MMCSD_SDIO_C14E_MASK         (0x00004000u)#define CSL_MMCSD_SDIO_C14E_SHIFT        (0x0000000Eu)#define CSL_MMCSD_SDIO_C14E_RESETVAL     (0x00000000u)#define CSL_MMCSD_SDIO_C14E_DIS          (0x00000000u)#define CSL_MMCSD_SDIO_C14E_EN           (0x00000001u)#define CSL_MMCSD_SDIO_C13E_MASK         (0x00002000u)#define CSL_MMCSD_SDIO_C13E_SHIFT        (0x0000000Du)#define CSL_MMCSD_SDIO_C13E_RESETVAL     (0x00000000u)#define CSL_MMCSD_SDIO_C13E_DIS          (0x00000000u)#define CSL_MMCSD_SDIO_C13E_EN           (0x00000001u)#define CSL_MMCSD_SDIO_C12E_MASK         (0x00001000u)#define CSL_MMCSD_SDIO_C12E_SHIFT        (0x0000000Cu)#define CSL_MMCSD_SDIO_C12E_RESETVAL     (0x00000000u)#define CSL_MMCSD_SDIO_C12E_DIS          (0x00000000u)#define CSL_MMCSD_SDIO_C12E_EN           (0x00000001u)#define CSL_MMCSD_SDIO_D3PS_MASK         (0x00000800u)#define CSL_MMCSD_SDIO_D3PS_SHIFT        (0x0000000Bu)#define CSL_MMCSD_SDIO_D3PS_RESETVAL     (0x00000000u)#define CSL_MMCSD_SDIO_D3PS_NOINV        (0x00000000u)#define CSL_MMCSD_SDIO_D3PS_INV          (0x00000001u)#define CSL_MMCSD_SDIO_D3ES_MASK         (0x00000400u)#define CSL_MMCSD_SDIO_D3ES_SHIFT        (0x0000000Au)#define CSL_MMCSD_SDIO_D3ES_RESETVAL     (0x00000000u)#define CSL_MMCSD_SDIO_D3ES_LEVEL        (0x00000000u)#define CSL_MMCSD_SDIO_D3ES_EDGE         (0x00000001u)#define CSL_MMCSD_SDIO_CDWE_MASK         (0x00000200u)#define CSL_MMCSD_SDIO_CDWE_SHIFT        (0x00000009u)#define CSL_MMCSD_SDIO_CDWE_RESETVAL     (0x00000000u)#define CSL_MMCSD_SDIO_CDWE_MASKED       (0x00000000u)#define CSL_MMCSD_SDIO_CDWE_NOMASK       (0x00000001u)#define CSL_MMCSD_SDIO_IWE_MASK          (0x00000100u)#define CSL_MMCSD_SDIO_IWE_SHIFT         (0x00000008u)#define CSL_MMCSD_SDIO_IWE_RESETVAL      (0x00000000u)#define CSL_MMCSD_SDIO_IWE_MASKED        (0x00000000u)#define CSL_MMCSD_SDIO_IWE_NOMASK        (0x00000001u)#define CSL_MMCSD_SDIO_DCR4_MASK         (0x00000080u)#define CSL_MMCSD_SDIO_DCR4_SHIFT        (0x00000007u)#define CSL_MMCSD_SDIO_DCR4_RESETVAL     (0x00000000u)#define CSL_MMCSD_SDIO_DCR4_EN           (0x00000000u)#define CSL_MMCSD_SDIO_DCR4_DIS          (0x00000001u)#define CSL_MMCSD_SDIO_XDTS_MASK         (0x00000040u)#define CSL_MMCSD_SDIO_XDTS_SHIFT        (0x00000006u)#define CSL_MMCSD_SDIO_XDTS_RESETVAL     (0x00000000u)#define CSL_MMCSD_SDIO_XDTS_NOSDIO       (0x00000000u)#define CSL_MMCSD_SDIO_XDTS_SDIO         (0x00000001u)#define CSL_MMCSD_SDIO_DPE_MASK          (0x00000020u)#define CSL_MMCSD_SDIO_DPE_SHIFT         (0x00000005u)#define CSL_MMCSD_SDIO_DPE_RESETVAL      (0x00000000u)#define CSL_MMCSD_SDIO_DPE_NO            (0x00000000u)#define CSL_MMCSD_SDIO_DPE_YES           (0x00000001u)#define CSL_MMCSD_SDIO_RW_MASK           (0x00000010u)#define CSL_MMCSD_SDIO_RW_SHIFT          (0x00000004u)#define CSL_MMCSD_SDIO_RW_RESETVAL       (0x00000000u)#define CSL_MMCSD_SDIO_RW_NOREQ          (0x00000000u)#define CSL_MMCSD_SDIO_RW_REQ            (0x00000001u)#define CSL_MMCSD_SDIO_CDE_MASK          (0x00000004u)#define CSL_MMCSD_SDIO_CDE_SHIFT         (0x00000002u)#define CSL_MMCSD_SDIO_CDE_RESETVAL      (0x00000000u)#define CSL_MMCSD_SDIO_CDE_DIS           (0x00000000u)#define CSL_MMCSD_SDIO_CDE_EN            (0x00000001u)#define CSL_MMCSD_SDIO_RWE_MASK          (0x00000002u)#define CSL_MMCSD_SDIO_RWE_SHIFT         (0x00000001u)#define CSL_MMCSD_SDIO_RWE_RESETVAL      (0x00000000u)#define CSL_MMCSD_SDIO_RWE_DIS           (0x00000000u)#define CSL_MMCSD_SDIO_RWE_EN            (0x00000001u)#define CSL_MMCSD_SDIO_IRQE_MASK         (0x00000001u)#define CSL_MMCSD_SDIO_IRQE_SHIFT        (0x00000000u)#define CSL_MMCSD_SDIO_IRQE_RESETVAL     (0x00000000u)#define CSL_MMCSD_SDIO_IRQE_DIS          (0x00000000u)#define CSL_MMCSD_SDIO_IRQE_EN           (0x00000001u)#define CSL_MMCSD_SDIO_RESETVAL          (0x00000000u)/* SYST */#define CSL_MMCSD_SYST_WAKD_MASK         (0x00008000u)#define CSL_MMCSD_SYST_WAKD_SHIFT        (0x0000000Fu)#define CSL_MMCSD_SYST_WAKD_RESETVAL     (0x00000000u)#define CSL_MMCSD_SYST_SSB_MASK          (0x00004000u)#define CSL_MMCSD_SYST_SSB_SHIFT         (0x0000000Eu)#define CSL_MMCSD_SYST_SSB_RESETVAL      (0x00000000u)#define CSL_MMCSD_SYST_SSB_NOACT         (0x00000000u)#define CSL_MMCSD_SYST_SSB_SETSTAT       (0x00000001u)#define CSL_MMCSD_SYST_RDYD_MASK         (0x00002000u)#define CSL_MMCSD_SYST_RDYD_SHIFT        (0x0000000Du)#define CSL_MMCSD_SYST_RDYD_RESETVAL     (0x00000001u)#define CSL_MMCSD_SYST_RDYD_LOW          (0x00000000u)#define CSL_MMCSD_SYST_RDYD_HIGH         (0x00000001u)#define CSL_MMCSD_SYST_DDIR_MASK         (0x00001000u)#define CSL_MMCSD_SYST_DDIR_SHIFT        (0x0000000Cu)#define CSL_MMCSD_SYST_DDIR_RESETVAL     (0x00000000u)#define CSL_MMCSD_SYST_DDIR_IN           (0x00000000u)#define CSL_MMCSD_SYST_DDIR_OUT          (0x00000001u)#define CSL_MMCSD_SYST_DATD_MASK         (0x00000F00u)#define CSL_MMCSD_SYST_DATD_SHIFT        (0x00000008u)#define CSL_MMCSD_SYST_DATD_RESETVAL     (0x00000000u)#define CSL_MMCSD_SYST_CDIR_MASK         (0x00000080u)#define CSL_MMCSD_SYST_CDIR_SHIFT        (0x00000007u)#define CSL_MMCSD_SYST_CDIR_RESETVAL     (0x00000000u)#define CSL_MMCSD_SYST_CDIR_IN           (0x00000000u)#define CSL_MMCSD_SYST_CDIR_OUT          (0x00000001u)#define CSL_MMCSD_SYST_CDAT_MASK         (0x00000040u)#define CSL_MMCSD_SYST_CDAT_SHIFT        (0x00000006u)#define CSL_MMCSD_SYST_CDAT_RESETVAL     (0x00000000u)#define CSL_MMCSD_SYST_MCKD_MASK         (0x00000020u)#define CSL_MMCSD_SYST_MCKD_SHIFT        (0x00000005u)#define CSL_MMCSD_SYST_MCKD_RESETVAL     (0x00000000u)#define CSL_MMCSD_SYST_SCKD_MASK         (0x00000010u)#define CSL_MMCSD_SYST_SCKD_SHIFT        (0x00000004u)#define CSL_MMCSD_SYST_SCKD_RESETVAL     (0x00000000u)#define CSL_MMCSD_SYST_CSD_MASK          (0x0000000Fu)#define CSL_MMCSD_SYST_CSD_SHIFT         (0x00000000u)#define CSL_MMCSD_SYST_CSD_RESETVAL      (0x00000000u)#define CSL_MMCSD_SYST_RESETVAL          (0x00002000u)/* REV */#define CSL_MMCSD_REV_REV_MASK           (0x000000FFu)#define CSL_MMCSD_REV_REV_SHIFT          (0x00000000u)#define CSL_MMCSD_REV_REV_RESETVAL       (0x00000031u)#define CSL_MMCSD_REV_REV_REV30          (0x00000030u)#define CSL_MMCSD_REV_REV_REV31          (0x00000031u)#define CSL_MMCSD_REV_REV_REV34          (0x00000034u)#define CSL_MMCSD_REV_RESETVAL           (0x00000031u)/* RSP */#define CSL_MMCSD_RSP_RSP_MASK           (0x0000FFFFu)#define CSL_MMCSD_RSP_RSP_SHIFT          (0x00000000u)#define CSL_MMCSD_RSP_RSP_RESETVAL       (0x00000000u)#define CSL_MMCSD_RSP_RESETVAL           (0x00000000u)/* IOSR */#define CSL_MMCSD_IOSR_STOP_MASK         (0x00000008u)#define CSL_MMCSD_IOSR_STOP_SHIFT        (0x00000003u)#define CSL_MMCSD_IOSR_STOP_RESETVAL     (0x00000000u)#define CSL_MMCSD_IOSR_STOP_NOACT        (0x00000000u)#define CSL_MMCSD_IOSR_STOP_STOPDAT      (0x00000001u)#define CSL_MMCSD_IOSR_SAVE_MASK         (0x00000004u)#define CSL_MMCSD_IOSR_SAVE_SHIFT        (0x00000002u)#define CSL_MMCSD_IOSR_SAVE_RESETVAL     (0x00000000u)#define CSL_MMCSD_IOSR_SAVE_NOACT        (0x00000000u)#define CSL_MMCSD_IOSR_SAVE_SAVE         (0x00000001u)#define CSL_MMCSD_IOSR_RESU_MASK         (0x00000002u)#define CSL_MMCSD_IOSR_RESU_SHIFT        (0x00000001u)#define CSL_MMCSD_IOSR_RESU_RESETVAL     (0x00000000u)#define CSL_MMCSD_IOSR_RESU_NOACT        (0x00000000u)#define CSL_MMCSD_IOSR_RESU_RESUME       (0x00000001u)#define CSL_MMCSD_IOSR_SUSP_MASK         (0x00000001u)#define CSL_MMCSD_IOSR_SUSP_SHIFT        (0x00000000u)#define CSL_MMCSD_IOSR_SUSP_RESETVAL     (0x00000000u)#define CSL_MMCSD_IOSR_SUSP_NOACT        (0x00000000u)#define CSL_MMCSD_IOSR_SUSP_SUSPEND      (0x00000001u)#define CSL_MMCSD_IOSR_RESETVAL          (0x00000000u)/* SYSC */#define CSL_MMCSD_SYSC_SRST_MASK         (0x00000002u)#define CSL_MMCSD_SYSC_SRST_SHIFT        (0x00000001u)#define CSL_MMCSD_SYSC_SRST_RESETVAL     (0x00000000u)#define CSL_MMCSD_SYSC_SRST_NOACT        (0x00000000u)#define CSL_MMCSD_SYSC_SRST_RESET        (0x00000001u)#define CSL_MMCSD_SYSC_RESETVAL          (0x00000000u)/* SYSS */#define CSL_MMCSD_SYSS_SRST_MASK         (0x00000002u)#define CSL_MMCSD_SYSS_SRST_SHIFT        (0x00000001u)#define CSL_MMCSD_SYSS_SRST_RESETVAL     (0x00000000u)#define CSL_MMCSD_SYSS_SRST_ON           (0x00000000u)#define CSL_MMCSD_SYSS_SRST_DONE         (0x00000001u)#define CSL_MMCSD_SYSS_RESETVAL         (0x00000000u)#endif
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