csl_uart.h
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** This is used for control/query commands to set/query the Number of Stop bits.*/typedef enum { /** Number of Stop bits = 1 */ CSL_UART_NUMSTOP_1 , /** Number of Stop bits = 1.5 */ CSL_UART_NUMSTOP_1_5 , /** Number of Stop bits = 2 */ CSL_UART_NUMSTOP_2}CSL_UartNumStop;/**@}*//**@defgroup CSL_UART_PARITY_ENUM Parity Setting@ingroup CSL_UART_ENUM@{*//** @brief Enums for the Parity Setting** This is used for control/query commands to set/query the Parity Setting.*/typedef enum { /** No Parity */ CSL_UART_PARITY_NONE = 0, /** Odd Parity */ CSL_UART_PARITY_ODD = 1, /** Even Parity */ CSL_UART_PARITY_EVEN = 3, /** Forced 1 Parity */ CSL_UART_PARITY_FORCED1 = 5, /** Forced 0 Parity */ CSL_UART_PARITY_FORCED0 = 7}CSL_UartParity;/**@}*//**@defgroup CSL_UART_INTRSOURCE_ENUM Interrupt Source@ingroup CSL_UART_ENUM@{*//** @brief Enums for the Interrupt Source** This is used for query Interrupt Source.*/typedef enum { /** No Interrupt Occured */ CSL_UART_INTRSOURCE_NONE = CSL_UART_IIR_IT_PENDING_NONE, /** Receiver Line Status Interrupt */ CSL_UART_INTRSOURCE_LINESTS = CSL_UART_IIR_IT_TYPE_RX_LINE_STATUS << 1, /** Rx Timeout Interrupt */ CSL_UART_INTRSOURCE_RXTIMEOUT = CSL_UART_IIR_IT_TYPE_RX_TIMEOUT << 1, /** Rx Interrupt */ CSL_UART_INTRSOURCE_RHR = CSL_UART_IIR_IT_TYPE_RHR << 1, /** Tx Interrupt */ CSL_UART_INTRSOURCE_THR = CSL_UART_IIR_IT_TYPE_THR << 1 , /** Modem Status Interrupt */ CSL_UART_INTRSOURCE_MODEMSTS = CSL_UART_IIR_IT_TYPE_MSR << 1, /** XOFF/SPecial Character Interrupt */ CSL_UART_INTRSOURCE_XOFFSPECIAL = CSL_UART_IIR_IT_TYPE_XOFF_SPCHAR << 1, /** RTS/CTS/DSR pin change state(active low to high) */ CSL_UART_INTRSOURCE_RCD = CSL_UART_IIR_IT_TYPE_RCD << 1}CSL_UartIntrSource;/**@}*//**@defgroup CSL_UART_CONTROLCMD_ENUM Control Commands* @ingroup CSL_UART_CONTROL_API@{*//** @brief Enumeration for control commands passed to @aCSL_UartHwControl()** This is the set of commands that are passed to the @a CSL_UartHwControl()* with an optional argument type-casted to @a void* .* The arguments to be passed with each enumeration (if any) are specified* next to the enumeration.*/typedef enum {/**@brief Soft Resets the module1. Programmation of SOFTRESET field in SYSC@param None@return CSL_SOK*/ CSL_UART_CMD_RESET = 0 ,/**@brief Sets events qualified to do wake up.1. Programmation of WER Register@param (CSL_BitMask16*)@return CSL_SOK*/ CSL_UART_CMD_SETWAKEUPEVENTS = 1,/**@brief Read a byte of data received by UART@param (CSL_UartXfer*)@return CSL_SOK or CSL_ESYS_FAIL, based on whether read operation was successful or not.*/ CSL_UART_CMD_READ = 2 ,/**@brief Write a byte of data to UART for transmission.@param (CSL_UartXfer*)@return CSL_SOK or CSL_ESYS_FAIL, based on whether write operation was successful or not.*/ CSL_UART_CMD_WRITE = 3 ,/**@brief Set the XOFF2 character1. Programmation of XOFF2@param (Uint8*)@return CSL_SOK*/ CSL_UART_CMD_SET_SPECIALCHAR = 4 ,/**@brief When a falling edge event occured on RX,CTS,DSR then SSR[1] is setThe only way to clear this is by issuing this command. This command does :- \n1. Praogrammation of the RX_CTS_DSR_WAKE_UP_ENABLE field of SCR (Set to 0)@param None@return CSL_SOK*/ CSL_UART_CMD_RCDEVENT_CLEAR = 5,/**@brief Enables the Corresponding InterruptsThis command does the following :- \n1. Programmation of IER Register \n2. Programmation of DSR_IT field in SCR \n3. Programmation of RX_CTS_DSR_WAKE_UP in SCR \n@param (CSL_BitMask16*)@return CSL_SOK*/ CSL_UART_CMD_EVENT_DISABLE = 0x6|0 ,/**@brief Disables the Corresponding InterruptsThis command does the following :- \n1. Programmation of IER Register \n2. Programmation of DSR_IT field in SCR \n3. Programmation of RX_CTS_DSR_WAKE_UP in SCR \n@param (CSL_BitMask16*)@return CSL_SOK*/ CSL_UART_CMD_EVENT_ENABLE = 0x6|1 ,/**@brief Disable "XON ANY" Function1. Programmation of XON_EN in MCR(Set to 0)@param None@return CSL_SOK*/ CSL_UART_CMD_XONANY_DISABLE = 0x8 | CSL_UART_MCR_XON_EN_DISABLE,/**@brief Enable "XON ANY" Function1. Programmation of XON_EN in MCR(Set to 1)@param None@return CSL_SOK*/ CSL_UART_CMD_XONANY_ENABLE = 0x8 | CSL_UART_MCR_XON_EN_ENABLE,/**@brief Disables the Tx Empty Mode of txinterrupt generation1. Programmation of TX_EMPTY_CTL_IT field in the SCR(Set to 0).@param None@return CSL_SOK*/ CSL_UART_CMD_TXEMPTYIT_DISABLE = 0xA | CSL_UART_SCR_TX_EMPTY_CTL_IT_DISABLE,/**@brief Enables the Tx Empty Mode of Tx interrupt generation1. Programmation of TX_EMPTY_CTL_IT field in the SCR(Set to 1).@param None@return CSL_SOK*/ CSL_UART_CMD_TXEMPTYIT_ENABLE = 0xA | CSL_UART_SCR_TX_EMPTY_CTL_IT_ENABLE, /**@brief Disables the RTS line i.e pulls it high1. Programmation of RTS field in MCR(Set to 0)@param None@return CSL_SOK*/ CSL_UART_CMD_RTS_DISABLE = 0xC | CSL_UART_MCR_RTS_DISABLE,/**@brief Enables the RTS line i.e pulls it low1. Programmation of RTS field in MCR(Set to 1)@param None@return CSL_SOK*/ CSL_UART_CMD_RTS_ENABLE = 0xC | CSL_UART_MCR_RTS_ENABLE,/**@brief Disables the DTR line i.e pulls it high1. Programmation of DTR field in the MCR(Set to 0)@param None@return CSL_SOK*/ CSL_UART_CMD_DTR_DISABLE = 0xE | CSL_UART_MCR_DTR_DISABLE ,/**@brief Enables the DTR line i.e pulls it low1. Programmation of RTS field in MCR(Set to 1)@param None@return CSL_SOK*/ CSL_UART_CMD_DTR_ENABLE = 0xE | CSL_UART_MCR_DTR_ENABLE ,/**@brief Pull the RI line high1. Programmation of RI_STS_CH field in the MCR(Set to 0)@param None@return CSL_SOK*/ CSL_UART_CMD_RI_HIGH = 0x10 | CSL_UART_MCR_RI_STS_CH_HIGH,/**@brief Pull the RI line low1. Programmation of RI_STS_CH field in the MCR(Set to 1)@param None@return CSL_SOK*/ CSL_UART_CMD_RI_LOW = 0x10 | CSL_UART_MCR_RI_STS_CH_LOW,/**@brief Pull the DCD line high1. Programmation of CD_STS_CH field in MCR(Set to 0)@param None@return CSL_SOK*/ CSL_UART_CMD_DCD_HIGH = 0x12 | CSL_UART_MCR_CD_STS_CH_HIGH ,/**@brief Pull the DCD line low1. Programmation of CD_STS_CH field in MCR(Set to 1)@param None@return CSL_SOK*/ CSL_UART_CMD_DCD_LOW = 0x12 | CSL_UART_MCR_CD_STS_CH_LOW ,/**@brief Internal OCP clock gating strategy is set to "Clock is running"1. Programmation of AUTOIDLE in SYSC(Set to CLKRUN mode).@param None@return CSL_SOK*/ CSL_UART_CMD_SYSAUTOIDLE_CLKRUN = 0x14 | CSL_UART_SYSC_AUTOIDLE_CLKRUN ,/**@brief Apply Auto OCP clock gating strategy.1. Programmation of AUTOIDLE in SYSC(Set to AUTO_OCP mode).@param None@return CSL_SOK*/ CSL_UART_CMD_SYSAUTOIDLE_AUTO_OCP = 0x14 | CSL_UART_SYSC_AUTOIDLE_AUTO_OCP ,/**@brief System Wake Up Feature control disabled1. Programmation of ENAWAKEUP in SYSC(Set to 0)@param None@return CSL_SOK*/ CSL_UART_CMD_SYSWAKE_DISABLE = 0x16 | CSL_UART_SYSC_ENAWAKEUP_DISABLE ,/**@brief System Wake Up Feature control enabled1. Programmation of ENAWAKEUP in SYSC(Set to 1)@param None@return CSL_SOK*/ CSL_UART_CMD_SYSWAKE_ENABLE = 0x16 | CSL_UART_SYSC_ENAWAKEUP_ENABLE ,/**@brief Disable special character detect1. Programmation of SPECIAL_CHAR_DETECT in EFR(Set to 0)@param None@return CSL_SOK*/ CSL_UART_CMD_SPECIALCHARDETECT_DISABLE = 0x18 | CSL_UART_EFR_SPECIAL_CHAR_DETECT_DISABLE ,/**@brief Enable special character detect1. Programmation of SPECIAL_CHAR_DETECT in EFR(Set to 1)@param None@return CSL_SOK*/ CSL_UART_CMD_SPECIALCHARDETECT_ENABLE = 0x18 | CSL_UART_EFR_SPECIAL_CHAR_DETECT_ENABLE ,/**@brief Disables the Break Condition1. Programmation of BREAK_EN field in LCR register(Set to 0).@param None@return CSL_SOK*/ CSL_UART_CMD_BREAK_DISABLE = 0x1A | CSL_UART_LCR_BREAK_EN_DISABLE,/**@brief Enable the break Condition1. Programmation of BREAK_EN field in the LCR register(Set to 1).@param None@return CSL_SOK*/ CSL_UART_CMD_BREAK_ENABLE = 0x1A | CSL_UART_LCR_BREAK_EN_ENABLE ,/**@brief Set power control management to "Force Idle"1. Programmation of IDLEMODE in SYSC(Set to FORCE)@param None@return CSL_SOK*/ CSL_UART_CMD_SYSIDLEMODE_FORCE = 0x1C | CSL_UART_SYSC_IDLEMODE_FORCE ,/**@brief Set power control management to "None"1. Programmation of IDLEMODE in SYSC(Set to NONE)@param None@return CSL_SOK*/ CSL_UART_CMD_SYSIDLEMODE_NONE = 0x1C | CSL_UART_SYSC_IDLEMODE_NONE ,/**@brief Set power control management to "Smart Idle"1. Programmation of IDLEMODE in SYSC(Set to SMART)@param None@return CSL_SOK*/ CSL_UART_CMD_SYSIDLEMODE_SMART = 0x1C | CSL_UART_SYSC_IDLEMODE_SMART
}CSL_UartHwControlCmd;/** @}*//**@defgroup CSL_UART_QUERYCMD_ENUM Query Commands* @ingroup CSL_UART_QUERY_API* @{ *//** @brief Enumeration for queries passed to @a CSL_UartGetHwStatus()** This is used to get the status of different operations or to get the* existing setup of UART. The arguments to be passed with each* enumeration if any are specified next to the enumeration */typedef enum {/**@brief Queries the events enabled in the UART Module OR'd events activated in the UART moduleIER Accessed@param (CSL_BitMask16*)@return CSL_SOK*/ CSL_UART_QUERY_EVENTS,/**@brief Queries the wakeup events enabled in the UART ModuleOR'd events activated in the UART module \nWER Accessed@param (CSL_BitMask16*)@return CSL_SOK*/ CSL_UART_QUERY_WAKEUP_EVENTS,/**@brief Queries Receiver Line StatusLSR Accessed@param (CSL_BitMask16*)@return CSL_SOK*/ CSL_UART_QUERY_LINESTATUS,/**@brief Queries Modem StatusMSR Accessed@param (CSL_BitMask16*)@return CSL_SOK*/ CSL_UART_QUERY_MODEMSTATUS,/**@brief Queries Supplementary StatusSSR Accessed@param (CSL_BitMask16*)@return CSL_SOK*/ CSL_UART_QUERY_SUPPSTATUS,/**@brief Queries the Autobaud parameters in the AUTOBAUD modeUASR Accessed@param (CSL_UartAutoBaudSpeed*)@return CSL_SOK*/ CSL_UART_QUERY_AUTOBAUD,/**@brief Version number of the moduleMVR Accessed@param (Uint16*)@return CSL_SOK*/ CSL_UART_QUERY_VERSION,/**@brief Interrupt Source read from the Interrupt Identification registerIIR Accessed@param (CSL_UartIntrSource*)@return CSL_SOK*/ CSL_UART_QUERY_INTRSOURCE,/**@brief Query to find out if the System Reset is complete or ongoingSYSS Accessed@param (Bool*) \n TRUE Reset is done \n FALSE Reset is ongoing \n@return CSL_SOK*/ CSL_UART_QUERY_RESET}CSL_UartHwStatusQuery;/**@}*//*** @addtogroup CSL_UART_DATASTRUCT* @{ *//** @brief CSL_UartXfer is used when sending/receiving data.*/typedef struct CSL_UartXfer{ /** 8-bit single data transfer/receive buffer */
Uint8 data;
/** Number of bytes(5/6/7/8 chars) to be transferred */
Uint16 num;
/** Number of bytes(5/6/7/8 chars) actually transferred */
Uint16 xfernum;
/** OR'd combination of errors i.e Parity and/or Break and/or Frame Error */
CSL_BitMask16 error;
}CSL_UartXfer;/**@} *//*** @addtogroup CSL_UART_DATASTRUCT* @{ *//** @brief CSL_UartAutoBaud is used when querying the Autobaud parameters .*/typedef struct CSL_UartAutoBaud{ /** Uart Autobaud speed */ CSL_UartAutoBaudSpeed speed; /** Uart Autobaud character length */ CSL_UartAutoBitperChar bits; /** Uart Autobaud parity */ CSL_UartAutoParity parity;}CSL_UartAutoBaud;/**@} *//** @addtogroup CSL_UART_DATASTRUCT** @{ *//** @brief CSL_UartHwCtrlSetup is a substructure of the CSL_UartHwSetup.** that has the fields required for configuring for the UART Module.*/typedef struct CSL_UartHwCtrlSetup{ /** Module Clock Frequency(Hz) */ Uint32 moduleClock; /** Standard baudrate setting */ Uint32 baudrate; /** Either 13x/16x/Autobaud mode */ CSL_UartMode mode; /** One of 4 possible DMA modes */ CSL_UartDmaMode dmaMode; /** A maximum 6 bit Receive Trigger Level */ Uint16 rxTrigLevel; /** A maximum 6 bit Transmit Trigger Level */ Uint16 txTrigLevel; /** OR'd combination of interrupts to be enabled */ CSL_BitMask16 interruptEnable; /** FIFO Enable/Disable \n TRUE - Enable FIFO \n FALSE - Disable FIFO \n */ Bool fifoenable; /** Loop Back Enable/Disbable \n TRUE - Enable Loopback \n FALSE - Disable Loopback \n */ Bool loopenable;}CSL_UartHwCtrlSetup;/** @brief CSL_UartHwSetupModem is a substructure of the CSL_UartHwSetup.** It has the fields required for the Modem Setup*/typedef struct CSL_UartHwSetupModem{ /** Length of each transmitted character 5/6/7/8 bits*/ CSL_UartCharLen length; /** Number of Stop bits */ CSL_UartNumStop stopBits; /** Type of Parity */ CSL_UartParity parity;}CSL_UartHwSetupModem;/** @brief CSL_UartConfig structure is used during the raw h/w config.*/typedef struct { /** Divisor Latches High */
Uint8 DLH; /** Divisor Latches Low */
Uint8 DLL; /** Interrupt Enable Register */
Uint8 IER; /** FIFO Control Register */
Uint8 FCR; /** Enhanced Feature Register */
Uint8 EFR; /** Modem Control Register */ Uint8 MCR; /** XON Character 1 register */
Uint8 XON1; /** XON Character 1 register */
Uint8 XON2; /** XOFF Character 1 register */
Uint8 XOFF1; /** XOFF Character 1 register */
Uint8 XOFF2; /** Mode Definition register 1 */
Uint8 MDR1; /** Transmit Control Register */
Uint8 TCR; /** Trigger Level Register */
Uint8 TLR; /** Supplementary Control Register */
Uint8 SCR; /** System Configuration Register */ Uint8 SYSC; /** Wakeup Enable Register */ Uint8 WER;
} CSL_UartConfig;/** default setting for @aCSL_UartConfig */
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