csl_uart.h

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/*  =========================================================
*   Copyright (c) Texas Instruments Inc 2002, 2003, 2004
*
*   Use of this software is controlled by the terms and conditions found
*   in the license agreement under which this software has been supplied
*   provided
*   ==========================================================
*/
/** @mainpage UART Module
*
* @section Introduction
*
* @subsection xxx Purpose and Scope
* The purpose of this document is to identify a set of common CSL APIs for
* the UART Module across various devices. The CSL developer
* is expected to refer to this document while implementing APIs for these
* modules . Some of the listed APIs may not be applicable to a given UART
* While in other cases this list of APIs may not be
* sufficient to cover all the features of a particular UART Module.
* The CSL developer should use his/her discretion in
* designing new APIs or extending the existing ones to cover these.
*
*
*
* @subsection aaa Terms and Abbreviations
*   -# CSL  :  Chip Support Library
*   -# API  :  Application Programmer Interface
*   -# UART :  Universal Asynchronous Receiver Transmitter
*
* @subsection References
*    -# CSL 3.x Technical Requirements Specifications Version 0.5, dated
*       May 14th, 2003
*    -# The OMAP 1610 Technical Reference Manual (SWPU062B)
*
* @subsection Assumptions
*     The abbreviations CSL, UART have been used throughout this
*     document to refer to the OMAP 1610 UART Module.
*     'space' Refers to the empty 5/6/7/8 elements.
*     'character' Refers to the 5/6/7/8 bit long transfer elements.
*      This is not what is meant in conventional "C".
*/

/** @file csl_uart.h
*
*  @brief    Header file for functional layer of CSL
*
*  Description
*    - The different enumerations, structure definitions
*      and function declarations
*  @date 27th Jan, 2004
*  @author Ruchika Kharwar

 *  Modification 1
 *    - Modified on: 2005/01/02
 *    - Reason: transfer structure change
 			  : add CSL_UART_CONFIG_DEFAULTS	
 *
 *  @date 2005/02/04
 *  @author svijay
*/

/**
@defgroup CSL_UART_API UART
*/
/**
@defgroup CSL_UART_DATASTRUCT  UART Data Structures
@ingroup CSL_UART_API
*/
/**
@defgroup CSL_UART_SYMBOL  Symbols
@ingroup CSL_UART_API
*/
/**
@defgroup CSL_UART_ENUM  Enumerated Data Types
@ingroup CSL_UART_API
*/

/**
@defgroup CSL_UART_FUNCTION  Functions
@ingroup CSL_UART_API
*/
#ifndef _CSL_UART_H_
#define _CSL_UART_H_

#ifdef __cplusplus
extern "C" {
#endif

#include <csl.h>
#include <cslr_uart.h>

/**************************************************************************\
* UART global macro declarations
\**************************************************************************/
/* Macros - events, used for
*  Interrupt Enable Symbols
*/
/** @defgroup CSL_UART_EVENT_SYMBOL Events
*   @ingroup CSL_UART_SYMBOL
*
*
* @{ */
/** Enable/Disable Receive Threshold Interrupt       */
#define  CSL_UART_EVENT_RHR           0x01
/** Enable/Disable TransmitThreshold Interrupt       */
#define  CSL_UART_EVENT_THR           0x02
/** Enable/Disable Line Status Interrupt             */
#define  CSL_UART_EVENT_LINESTS       0x04
/** Enable/Disable Modem Status Interrupt            */
#define  CSL_UART_EVENT_MODEMSTS      0x08
/** Enable/Disable Sleep Mode			             */
#define  CSL_UART_EVENT_SLEEP         0x10
/** Enable/Disable XOFF Interrupt			       */
#define  CSL_UART_EVENT_XOFF          0x20
/** Enable/Disable RTS Interrupt				       */
#define  CSL_UART_EVENT_RTS           0x40
/** Enable/Disable CTS Interrupt				       */
#define  CSL_UART_EVENT_CTS           0x80
/** Enable/Disable DSR Interrupt				       */
#define  CSL_UART_EVENT_DSR           0x100
/** Enable/Disable RX/CTS/DSR Interrupt for Wakeup   */
#define  CSL_UART_EVENT_RCDWAKEUP     0x200
/**
@} */

/** @defgroup CSL_UART_TXTRIGGER_SYMBOL Tx Trigger Levels
*   @ingroup CSL_UART_SYMBOL
*
* @{ */
/** 8  spaces                 */
#define CSL_UART_TXTRIGLEVEL_8   8
/** 16 spaces                             */
#define CSL_UART_TXTRIGLEVEL_16  16
/** 32 spaces                             */
#define CSL_UART_TXTRIGLEVEL_32  32
/** 56 spaces                             */
#define CSL_UART_TXTRIGLEVEL_56  56
/**
@}*/

/** @defgroup CSL_UART_RXTRIGGER_SYMBOL Rx Trigger Levels
*   @ingroup CSL_UART_SYMBOL
*
* @{ */
/** 8  characters                      */
#define CSL_UART_RXTRIGLEVEL_8   8
/** 16 characters                      */
#define CSL_UART_RXTRIGLEVEL_16  16
/** 56 characters                      */
#define CSL_UART_RXTRIGLEVEL_56  56
/** 60 characters                      */
#define CSL_UART_RXTRIGLEVEL_60  60
/**
@}*/
/** @defgroup CSL_UART_WAKEUP_SYMBOL WakeUp Events
*   @ingroup CSL_UART_SYMBOL
*
* @{ */
/* Macros - UART WakeUp enable Flags
*  The application may also use these flags to allow specified source to enable wakeup
*/
/** CTS Activity can wake Up the system              */
#define CSL_UART_WAKEUPEVENT_CTS  CSL_FMK(UART_WER_CTS,1)
/** DSR Activity can wake Up the system              */
#define CSL_UART_WAKEUPEVENT_DSR  CSL_FMK(UART_WER_DSR,1)
/** RI  Activity can wake Up the system              */
#define CSL_UART_WAKEUPEVENT_RI   CSL_FMK(UART_WER_RI,1)
/** DCD Activity can wake Up the system              */
#define CSL_UART_WAKEUPEVENT_DCD  CSL_FMK(UART_WER_DCD,1)
/** RX/RXIR Activity can wake Up the system          */
#define CSL_UART_WAKEUPEVENT_RX   CSL_FMK(UART_WER_RXIR,1)
/** RHR Activity can wake Up the system              */
#define CSL_UART_WAKEUPEVENT_RHR  CSL_FMK(UART_WER_RHR,1)
/** Receive Line Status can wake Up the system       */
#define CSL_UART_WAKEUPEVENT_LS   CSL_FMK(UART_WER_RLS,1)

/**
@}*/

/** @defgroup CSL_UART_LINESTS_SYMBOL Line Status
*   @ingroup CSL_UART_SYMBOL
*
* @{ */
/* Macros - UART Line Status/Errors
*/
/** Atleast one Parity/Framing/break error in the  Rx FIFO*/
#define CSL_UART_LINESTS_PFB_ERROR          CSL_FMK(UART_LSR_RX_FIFO_STS,1)
/** Tx Hold and Shift registers Empty */
#define CSL_UART_LINESTS_TXSHIFTEMPTY       CSL_FMK(UART_LSR_TX_SR_E,1)
/** Tx FIFO Empty */
#define CSL_UART_LINESTS_TXFIFOEMPTY        CSL_FMK(UART_LSR_TX_FIFO_E,1)
/** Break condition detected while the data is being read */
#define CSL_UART_LINESTS_BREAK_ERROR        CSL_FMK(UART_LSR_RX_BI,1)
/** Framing error in data being read from the Rx FIFO */
#define CSL_UART_LINESTS_RXFRAME_ERROR      CSL_FMK(UART_LSR_RX_FE,1)
/** Parity error in data being read from the Rx FIFO */
#define CSL_UART_LINESTS_PARITY_ERROR       CSL_FMK(UART_LSR_RX_PE,1)
/** Overrun error in data being read from the Rx FIFO */
#define CSL_UART_LINESTS_OVERRUN_ERROR      CSL_FMK(UART_LSR_RX_OE,1)
/** Framing error in data being read from the Rx FIFO */
#define CSL_UART_LINESTS_RXFIFO_NOTEMPTY    CSL_FMK(UART_LSR_RX_FIFO_E,1)
/**
@}*/
/** @defgroup CSL_UART_MODEMSTS_SYMBOL Modem Status
*   @ingroup CSL_UART_SYMBOL
*
* @{ */
/* Macros - Modem Status
*/
/** CTS input has changed state  */
#define CSL_UART_MODEMSTS_CTS	            CSL_FMK(UART_MSR_CTS_STS,1)
/** DSR input has changed state  */
#define CSL_UART_MODEMSTS_DSR	            CSL_FMK(UART_MSR_DSR_STS,1)
/** RI input has changed state from low to high  */
#define CSL_UART_MODEMSTS_RI	            CSL_FMK(UART_MSR_RI_STS,1)
/** DCD input has changed state  */
#define CSL_UART_MODEMSTS_DCD	            CSL_FMK(UART_MSR_DCD_STS,1)
/** CTS complement  */
#define CSL_UART_MODEMSTS_NCTS	            CSL_FMK(UART_MSR_NCTS_STS,1)
/** DSR complement  */
#define CSL_UART_MODEMSTS_NDSR	            CSL_FMK(UART_MSR_NDSR_STS,1)
/** RI complement  */
#define CSL_UART_MODEMSTS_NRI	            CSL_FMK(UART_MSR_NRI_STS,1)
/** CD complement  */
#define CSL_UART_MODEMSTS_NCD	            CSL_FMK(UART_MSR_NCD_STS,1)
/**
@}*/
/** @defgroup CSL_UART_SUPPSTS_SYMBOL Supplementary Status
*   @ingroup CSL_UART_SYMBOL
*
* @{ */
/* Macros - Supplementary Status/Errors
*/
/** Tx FIFO full  */
#define CSL_UART_SUPPSTS_TXFIFOFULL           CSL_FMK(UART_SSR_TX_FIFO_FULL,1)
/** Falling edge on Rx/CTS,DSR */
#define CSL_UART_SUPPSTS_RCD_WAKE_UP          CSL_FMK(UART_SSR_RX_CTS_DSR_WAKE_UP_STS,1)

/**
@}*/
/** @defgroup CSL_UART_RXFIFOTRIGGER_SYMBOL Rx FIFO Trigger Levels
*   @ingroup CSL_UART_SYMBOL
*
* @{ */
/* Macros - Rx FIFO Trigger Levels
*/
/** Rx FIFO Trigger Halt Min */ 
#define CSL_UART_RX_FIFO_TRIG_HALT_MIN     1
/** Rx FIFO Trigger Halt Max */ 
#define CSL_UART_RX_FIFO_TRIG_HALT_MAX     63
/** Rx FIFO Trigger Resume Min */ 
#define CSL_UART_RX_FIFO_TRIG_RESUME_MIN   1
/** Rx FIFO Trigger Resume Max */ 
#define CSL_UART_RX_FIFO_TRIG_RESUME_MAX   63

/**
@}*/
/**@defgroup CSL_UART_BAUDRATE_SYMBOL Baud Rate
*  @ingroup CSL_UART_SYMBOL
@{*/
/** @brief Baud Rate setting.
*/
#define CSL_UART_BAUD_0_3K      300
/**0.6 Kb/s */
#define CSL_UART_BAUD_0_6K      600
/**1.2Kb/s */
#define CSL_UART_BAUD_1_2K      1200
/** 2.4Kb/s*/
#define CSL_UART_BAUD_2_4K      2400
/** 4.8 Kb/s */
#define CSL_UART_BAUD_4_8K      4800
/** 9.6 Kb/s   */
#define CSL_UART_BAUD_9_6K      9600
/**14.4 Kb/s */
#define CSL_UART_BAUD_14_4K     14400
/**19.2 Kb/s */
#define CSL_UART_BAUD_19_2K     19200
/**28.8 Kb/s */
#define CSL_UART_BAUD_28_8K     28800
/** 38.4 Kb/s*/
#define CSL_UART_BAUD_38_4K     38400
/**57.6 Kb/s */
#define CSL_UART_BAUD_57_6K      57600
/**115.2 Kb/s */
#define CSL_UART_BAUD_115_2K     115200
/** 230.4 Kb/s */
#define CSL_UART_BAUD_230_4K     230400
/** 460.8 Kb/s */
#define CSL_UART_BAUD_460_8K     460800
/** 921.6  Kb/s */
#define CSL_UART_BAUD_921_6K     921600
/** 1.8342 Mb/s */
#define CSL_UART_BAUD_1_834M     1834200
/** 3.6864 Mb/s */
#define CSL_UART_BAUD_3_686M     3686400
/**
@}
*/
/**************************************************************************\
* UART global typedef declarations
\**************************************************************************/


/**@defgroup CSL_UART_AUTOBAUD_ENUM AutoBaud Speeds
*  @ingroup CSL_UART_ENUM
@{*/
/** @brief UART AutoBaud speeds
*
* This is used for query commands to query the  UART AutoBaud Mode
*/
typedef enum {
    /** 0Kb/s */
    CSL_UART_AUTOBAUDSPEED_NONE= 0  ,
    /** 115200 baud */
    CSL_UART_AUTOBAUDSPEED_1152= 1  ,
	/** 57600 baud */
	CSL_UART_AUTOBAUDSPEED_576= 2 	,
	/** 38400 baud */
	CSL_UART_AUTOBAUDSPEED_384= 3 	,
	/** 28800 baud */
	CSL_UART_AUTOBAUDSPEED_288= 4   ,
	/** 19200 baud */
	CSL_UART_AUTOBAUDSPEED_192= 5 	,
	/** 14400 baud */
	CSL_UART_AUTOBAUDSPEED_144= 6 	,
	/** 09600 baud */
	CSL_UART_AUTOBAUDSPEED_096= 7   ,
	/** 04800 baud */
	CSL_UART_AUTOBAUDSPEED_048= 8   ,
	/** 02400 baud */
	CSL_UART_AUTOBAUDSPEED_024= 9   ,
	/** 1200 baud */
	CSL_UART_AUTOBAUDSPEED_012= 10
}CSL_UartAutoBaudSpeed;
/**
@}
*/
/**@defgroup CSL_UART_AUTOBAUDCHARLEN_ENUM AutoBaud Character Length
*  @ingroup CSL_UART_ENUM
@{*/
/** @brief Enumeration for UART AutoBaud Character Length
*
* This is used for query commands to query the  UART AutoBaud Character Length
*/
typedef enum {
    /** Autobaud character length is 7 */
    CSL_UART_AUTOBITPERCHAR_7 = CSL_UART_UASR_BIT_BY_CHAR_7,
    /** Autobaud character length is 8 */
    CSL_UART_AUTOBITPERCHAR_8 = CSL_UART_UASR_BIT_BY_CHAR_8
}CSL_UartAutoBitperChar;
/**
@}*/
/**@defgroup CSL_UART_AUTOBAUDPARITY_ENUM AutoBaud parity
*  @ingroup CSL_UART_ENUM
@{*/
/** @brief Enumeration for UART AutoBaud parity
*
* This is used for query commands to query the UART AutoBaud parity
*/
typedef enum {
    /** No Autobaud parity detected */
    CSL_UART_AUTOPARITY_NONE = CSL_UART_UASR_PARITY_TYPE_NONE,
    /** Space detected as Autobaud parity */
    CSL_UART_AUTOPARITY_SPACE= CSL_UART_UASR_PARITY_TYPE_SPACE,
    /** Even Autobaud parity detected */
    CSL_UART_AUTOPARITY_EVEN = CSL_UART_UASR_PARITY_TYPE_EVEN,
    /** Odd Autobaud parity detected */
    CSL_UART_AUTOPARITY_ODD  = CSL_UART_UASR_PARITY_TYPE_ODD
}CSL_UartAutoParity;
/**
@}
*/
/**@defgroup CSL_UART_MODE_ENUM  Mode
*  @ingroup CSL_UART_ENUM
@{*/
/** @brief  Enums for the Mode of the UART module
*
* This is used for control/query commands to set/query the mode of the UART module.
*/
typedef enum {
    /** UART 16x mode */
    CSL_UART_MODE_16X         =   CSL_UART_MDR1_MODE_SELECT_16X,
    /** UART 16x Autobaud mode */
    CSL_UART_MODE_16XAUTOBAUD =   CSL_UART_MDR1_MODE_SELECT_16XAUTOBAUD,
    /** UART 13x mode */
    CSL_UART_MODE_13X         =   CSL_UART_MDR1_MODE_SELECT_13X,
    /** Default State */
    CSL_UART_MODE_DISABLE     =   CSL_UART_MDR1_MODE_SELECT_DISABLE
}CSL_UartMode;
/**
@}*/

/**@defgroup CSL_UART_DMAMODE_ENUM  DMA Mode of the UART module
*  @ingroup CSL_UART_ENUM
@{*/
/** @brief  Enums for the DMA Mode of the UART module
*
* This is used for control/query commands to set/query the DMA mode of the UART module.
*/
typedef enum {
    /** No DMA mode */
    CSL_UART_DMAMODE_NONE =  CSL_UART_SCR_DMA_MODE_2_00,
    /** DMA mode 1 */
    CSL_UART_DMAMODE_RXTX =  CSL_UART_SCR_DMA_MODE_2_01,
    /** DMA mode 2 */
    CSL_UART_DMAMODE_RX   =  CSL_UART_SCR_DMA_MODE_2_02,
    /** DMA mode 3 */
    CSL_UART_DMAMODE_TX   =  CSL_UART_SCR_DMA_MODE_2_03
}CSL_UartDmaMode;
/**
@}*/
/**@defgroup CSL_UART_CHARLEN_ENUM  UART character length
@ingroup CSL_UART_ENUM
@{*/
/** @brief  Enums for the UART character length
*
* This is used for control/query commands to set/query the UART character length.
*/
typedef enum {
    /** Character length of 5 */
    CSL_UART_CHARLEN_5    =  CSL_UART_LCR_CHAR_LENGTH_05,
    /** Character length of 6 */
    CSL_UART_CHARLEN_6    =  CSL_UART_LCR_CHAR_LENGTH_06,
    /** Character length of 7 */
    CSL_UART_CHARLEN_7    =  CSL_UART_LCR_CHAR_LENGTH_07,
    /** Character length of 8 */
    CSL_UART_CHARLEN_8    =  CSL_UART_LCR_CHAR_LENGTH_08
}CSL_UartCharLen;
/**
@}*/
/**@defgroup CSL_UART_FLOWCTRL_ENUM  Flow Control Type
@ingroup CSL_UART_ENUM

 @{*/
/** @brief  Enums for the Flow Control
*
* This is used for control/query commands to set/query the UART Flow control parameters.
*/
typedef enum {
	/** Neither HW,nor S/W flow Control */
    CSL_UART_FLOWCONTROL_NONE = 0,
    /** Software Flow Control */
    CSL_UART_FLOWCONTROL_SW   = 1,
    /** Hardware Flow Control */
    CSL_UART_FLOWCONTROL_HW   = 2
}CSL_UartFlowControl;
/**
@}
*/
/**@defgroup CSL_UART_SWFLOWCTRL_ENUM  Software Flow Control
@ingroup CSL_UART_ENUM
@{*/
/** @brief  Enums for the Software Flow Control
*
* This is used for control/query commands to set/query the UART SW Flow control parameters.
*/
typedef enum {
    /** No Flow Control                           */
    CSL_UART_SWFLOW_NONE = 0,
    /** Receiver/Transmitter compares XON1,XOFF1                      */
    CSL_UART_SWFLOW_XONXOFF_1 = 2,
    /** Receiver/Transmitter compares XON2,XOFF2                      */
    CSL_UART_SWFLOW_XONXOFF_2 = 1,
    /** Receiver/Transmitter compares XON1,XON2,XOFF1,XOFF2           */
    CSL_UART_SWFLOW_XONXOFF_12 = 3
}CSL_UartSwFlow;
/**
@}*/
/**@defgroup CSL_UART_NUMSTOP_ENUM  Number of Stop bits
@ingroup CSL_UART_ENUM
@{*/
/** @brief  Enums for the Number of Stop bits