cslr_ocpt1.h

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/** ============================================================================
 *   @file  cslr_ocpt1.h
 *
 *   @path  $(CSLPATH)\arm\ocpt1\src
 *
 *   @desc  API header file for OCP T1 port CSL
 *
 */
 
/*  ============================================================================
 *   Copyright (c) Texas Instruments Inc 2002, 2003, 2004
 *
 *   Use of this software is controlled by the terms and conditions found in the
 *   license agreement under which this software has been supplied.
 *   ===========================================================================
 */
 
/*  @(#) PSP/CSL 3.00.01.00[5912] (2004-07-05)  */

/* =============================================================================
 *  Revision History
 *  ===============
 *  05-Jul-2004 sd File created.
 * =============================================================================
 */
#ifndef _CSLR_OCPT1_H_
#define _CSLR_OCPT1_H_

#include <cslr.h>

#include <tistdtypes.h>

/** Register Overlay Structure */
typedef struct  {
    volatile Uint32 PRIOR;
    volatile Uint8 RSVD0[156];
    volatile Uint32 PTOR1;
    volatile Uint32 PTOR2;
    volatile Uint32 PTOR3;
    volatile Uint32 ATOR;
    volatile Uint32 AADDR;
    volatile Uint32 ATYPER;
    volatile Uint32 CONFIG_REG;	
} CSL_Ocpt1Regs;

/** Overlay structure typedef definition */
typedef volatile CSL_Ocpt1Regs* 	CSL_Ocpt1RegsOvly;

/** Field Definition Macros */

/** Priority register (PRIOR) */

/** PRIOR OCP_PRIORITY - field mask        			*/
#define CSL_OCPT1_PRIOR_OCP_PRIORITY_MASK (0x0000F000u)
/** PRIOR OCP_PRIORITY - field shift value        	*/
#define CSL_OCPT1_PRIOR_OCP_PRIORITY_SHIFT (0x0000000Cu)
/** PRIOR OCP_PRIORITY - field reset value	        */
#define CSL_OCPT1_PRIOR_OCP_PRIORITY_RESETVAL (0x00000000u)

/** PRIOR DMA_PRIORITY - field mask        			*/
#define CSL_OCPT1_PRIOR_DMA_PRIORITY_MASK (0x00000F00u)
/** PRIOR DMA_PRIORITY - field shift value        	*/
#define CSL_OCPT1_PRIOR_DMA_PRIORITY_SHIFT (0x00000008u)
/** PRIOR DMA_PRIORITY - field reset value	        */
#define CSL_OCPT1_PRIOR_DMA_PRIORITY_RESETVAL (0x00000000u)

/** PRIOR DSP_PRIORITY - field mask        			*/
#define CSL_OCPT1_PRIOR_DSP_PRIORITY_MASK (0x00000070u)
/** PRIOR DSP_PRIORITY - field shift value        	*/
#define CSL_OCPT1_PRIOR_DSP_PRIORITY_SHIFT (0x00000004u)
/** PRIOR DSP_PRIORITY - field reset value	        */
#define CSL_OCPT1_PRIOR_DSP_PRIORITY_RESETVAL (0x00000000u)

/** PRIOR ARM_PRIORITY - field mask        			*/
#define CSL_OCPT1_PRIOR_ARM_PRIORITY_MASK (0x00000007u)
/** PRIOR ARM_PRIORITY - field shift value        	*/
#define CSL_OCPT1_PRIOR_ARM_PRIORITY_SHIFT (0x00000000u)
/** PRIOR ARM_PRIORITY - field reset value	        */
#define CSL_OCPT1_PRIOR_ARM_PRIORITY_RESETVAL (0x00000000u)

/** PRIOR - reset value	        				*/
#define CSL_OCPT1_PRIOR_RESETVAL   (0x00000000u)

/* Priority timeout (PTOR1) */

/** PTOR1 DMA - field mask        			*/
#define CSL_OCPT1_PTOR1_DMA_MASK   (0x000000FFu)
/** PTOR1 DMA - field shift value        	*/
#define CSL_OCPT1_PTOR1_DMA_SHIFT  (0x00000000u)
/** PTOR1 DMA - field reset value        	*/
#define CSL_OCPT1_PTOR1_DMA_RESETVAL (0x00000000u)

/** PTOR1 - reset value	        			*/
#define CSL_OCPT1_PTOR1_RESETVAL   (0x00000000u)

/* Priority timeout (PTOR2) */

/** PTOR2 DSP - field mask        			*/
#define CSL_OCPT1_PTOR2_DSP_MASK   (0x00FF0000u)
/** PTOR2 DSP - field shift value        	*/
#define CSL_OCPT1_PTOR2_DSP_SHIFT  (0x00000010u)
/** PTOR2 DSP - field reset value        	*/
#define CSL_OCPT1_PTOR2_DSP_RESETVAL (0x00000000u)

/** PTOR2 LCD - field mask        			*/
#define CSL_OCPT1_PTOR2_LCD_MASK   (0x000000FFu)
/** PTOR2 LCD - field shift value        	*/
#define CSL_OCPT1_PTOR2_LCD_SHIFT  (0x00000000u)
/** PTOR2 LCD - field reset value        	*/
#define CSL_OCPT1_PTOR2_LCD_RESETVAL (0x00000000u)

/** PTOR2 - reset value	        			*/
#define CSL_OCPT1_PTOR2_RESETVAL   (0x00000000u)

/* PTOR3 */

/** PTOR3 OCPI - field mask        			*/
#define CSL_OCPT1_PTOR3_OCPI_MASK  (0x000000FFu)
/** PTOR3 OCPI - field shift value        	*/
#define CSL_OCPT1_PTOR3_OCPI_SHIFT (0x00000000u)
/** PTOR3 OCPI - field reset value        	*/
#define CSL_OCPT1_PTOR3_OCPI_RESETVAL (0x00000000u)

/** PTOR3 - reset value	        			*/
#define CSL_OCPT1_PTOR3_RESETVAL   (0x00000000u)

/* Abort on timeout (ATOR) */

/** ATOR TIMEOUT_EN - field mask        			*/
#define CSL_OCPT1_ATOR_TIMEOUT_EN_MASK (0x00000100u)
/** ATOR TIMEOUT_EN - field shift value    			*/
#define CSL_OCPT1_ATOR_TIMEOUT_EN_SHIFT (0x00000008u)
/** ATOR TIMEOUT_EN - field reset value    			*/
#define CSL_OCPT1_ATOR_TIMEOUT_EN_RESETVAL (0x00000001u)

/** ATOR TIMEOUT_EN - field enable token value 		*/
#define CSL_OCPT1_ATOR_TIMEOUT_EN_DISABLE (0x00000000u)
/** ATOR TIMEOUT_EN - field disable token value 	*/
#define CSL_OCPT1_ATOR_TIMEOUT_EN_ENABLE (0x00000001u)

/** ATOR TIMEOUT - field mask        				*/
#define CSL_OCPT1_ATOR_TIMEOUT_MASK (0x000000FFu)
/** ATOR TIMEOUT - field shift value    			*/
#define CSL_OCPT1_ATOR_TIMEOUT_SHIFT (0x00000000u)
/** ATOR TIMEOUT - field reset value    			*/
#define CSL_OCPT1_ATOR_TIMEOUT_RESETVAL (0x000000FFu)

/** ATOR - reset value	        			*/
#define CSL_OCPT1_ATOR_RESETVAL    (0x000001FFu)

/* Abort address (AADDR) */

/** AADDR value - field mask        				*/
#define CSL_OCPT1_AADDR_ADDRESS_MASK (0xFFFFFFFFu)
/** AADDR value - field shift value      			*/
#define CSL_OCPT1_AADDR_ADDRESS_SHIFT (0x00000000u)
/** AADDR value - field reset value      			*/
#define CSL_OCPT1_AADDR_ADDRESS_RESETVAL (0x00000000u)

/** AADDR - reset value	        			*/
#define CSL_OCPT1_AADDR_RESETVAL   (0x00000000u)

/* Abort type (ATYPER) */

/** ATYPER TIMEOUT_ERR - field mask        			*/
#define CSL_OCPT1_ATYPER_TIMEOUT_ERR_MASK (0x00000010u)
/** ATYPER TIMEOUT_ERR - field shift value 			*/
#define CSL_OCPT1_ATYPER_TIMEOUT_ERR_SHIFT (0x00000004u)
/** ATYPER TIMEOUT_ERR - field reset value 			*/
#define CSL_OCPT1_ATYPER_TIMEOUT_ERR_RESETVAL (0x00000000u)

/** ATYPER TIMEOUT_ERR - field no abort token value */
#define CSL_OCPT1_ATYPER_TIMEOUT_ERR_NO_ABORT (0x00000000u)
/** ATYPER TIMEOUT_ERR - field abort token value 	*/
#define CSL_OCPT1_ATYPER_TIMEOUT_ERR_ABORT (0x00000001u)

/** ATYPER BUS_ERR - field mask        			*/
#define CSL_OCPT1_ATYPER_BUS_ERR_MASK (0x00000008u)
/** ATYPER BUS_ERR - field shift value 			*/
#define CSL_OCPT1_ATYPER_BUS_ERR_SHIFT (0x00000003u)
/** ATYPER BUS_ERR - field reset value 			*/
#define CSL_OCPT1_ATYPER_BUS_ERR_RESETVAL (0x00000000u)

/** ATYPER BUS_ERR - field no abort token value */
#define CSL_OCPT1_ATYPER_BUS_ERR_NO_ABORT (0x00000000u)
/** ATYPER BUS_ERR - field abort token value 	*/
#define CSL_OCPT1_ATYPER_BUS_ERR_ABORT (0x00000001u)

/** ATYPER HOST_ID - field mask        			*/
#define CSL_OCPT1_ATYPER_HOST_ID_MASK (0x00000006u)
/** ATYPER HOST_ID - field shift value 			*/
#define CSL_OCPT1_ATYPER_HOST_ID_SHIFT (0x00000001u)
/** ATYPER HOST_ID - field reset value 			*/
#define CSL_OCPT1_ATYPER_HOST_ID_RESETVAL (0x00000000u)

/** ATYPER HOST_ID - field MPU token value 		*/
#define CSL_OCPT1_ATYPER_HOST_ID_MPU (0x00000000u)
/** ATYPER HOST_ID - field DSP token value 		*/
#define CSL_OCPT1_ATYPER_HOST_ID_DSP (0x00000001u)
/** ATYPER HOST_ID - field DMA token value 		*/
#define CSL_OCPT1_ATYPER_HOST_ID_DMA (0x00000002u)
/** ATYPER HOST_ID - field OCPI token value 	*/
#define CSL_OCPT1_ATYPER_HOST_ID_OCPI (0x00000003u)

/** ATYPER ABORT_FLAG - field mask 				*/
#define CSL_OCPT1_ATYPER_ABORT_FLAG_MASK (0x00000001u)
/** ATYPER ABORT_FLAG - field shift value		*/
#define CSL_OCPT1_ATYPER_ABORT_FLAG_SHIFT (0x00000000u)
/** ATYPER ABORT_FLAG - field reset value		*/
#define CSL_OCPT1_ATYPER_ABORT_FLAG_RESETVAL (0x00000000u)

/** ATYPER ABORT_FLAG - field no abort token value	*/
#define CSL_OCPT1_ATYPER_ABORT_FLAG_NO_ABORT (0x00000000u)
/** ATYPER ABORT_FLAG - field abort token value		*/
#define CSL_OCPT1_ATYPER_ABORT_FLAG_ABORT (0x00000001u)

/** ATYPER - reset value        			*/
#define CSL_OCPT1_ATYPER_RESETVAL  (0x00000000u)

/* OCP config register (CONFIG_REG) */

/** CONFIG_REG PIPELN_RD_EN - field mask 				*/
#define CSL_OCPT1_CONFIG_REG_PIPELN_RD_EN_MASK (0x00000002u)
/** CONFIG_REG PIPELN_RD_EN - field shift value			*/
#define CSL_OCPT1_CONFIG_REG_PIPELN_RD_EN_SHIFT (0x00000001u)
/** CONFIG_REG PIPELN_RD_EN - field reset value			*/
#define CSL_OCPT1_CONFIG_REG_PIPELN_RD_EN_RESETVAL (0x00000001u)

/** CONFIG_REG PIPELN_RD_EN - field disable token value		*/
#define CSL_OCPT1_CONFIG_REG_PIPELN_RD_EN_DISABLE (0x00000000u)
/** CONFIG_REG PIPELN_RD_EN - field enable token value		*/
#define CSL_OCPT1_CONFIG_REG_PIPELN_RD_EN_ENABLE (0x00000001u)

/** CONFIG_REG AUTO_GATED_CLK - field mask 				*/
#define CSL_OCPT1_CONFIG_REG_AUTO_GATED_CLK_MASK (0x00000001u)
/** CONFIG_REG AUTO_GATED_CLK - field shift value		*/
#define CSL_OCPT1_CONFIG_REG_AUTO_GATED_CLK_SHIFT (0x00000000u)
/** CONFIG_REG AUTO_GATED_CLK - field reset value		*/
#define CSL_OCPT1_CONFIG_REG_AUTO_GATED_CLK_RESETVAL (0x00000000u)

/** CONFIG_REG AUTO_GATED_CLK - field disable token value		*/
#define CSL_OCPT1_CONFIG_REG_AUTO_GATED_CLK_DISABLE (0x00000000u)
/** CONFIG_REG AUTO_GATED_CLK - field enable token value		*/
#define CSL_OCPT1_CONFIG_REG_AUTO_GATED_CLK_ENABLE (0x00000001u)

/** CONFIG_REG - reset value        			*/
#define CSL_OCPT1_CONFIG_REG_RESETVAL (0x00000002u)

#endif