csl_usbotg.h

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*
* This is used to get the status of different operations or to get the
* existing setup of USBOTG. The arguments to be passed with each
* enumeration if any are specified next to them respectively */

typedef enum {
    /** Arg = (Uint16*),Queries the OTG Vendor Code */
    CSL_USBOTG_QUERY_VENDORCODE,
    /** Arg = (Uint16*),Queries the OTG FSM state  */
    CSL_USBOTG_QUERY_TEST_FSMSTATE,
    /** Arg = (CSL_BitMask16*),Queries the Interrupt Status Register */
    CSL_USBOTG_QUERY_INTERRUPT_STATUS,
    /** Arg = (Uint16*),Queries the OTG Control Status. Appropriate masks must be used
        after the control register is read to intepret the various control fields */
    CSL_USBOTG_QUERY_CONTROL,
    /** Arg = (Bool*),Queries whether Reset is Done, after issuing a Reset
        command this query can be used to check the reset status
        TRUE  : Reset is done
        FALSE : Reset is not done
        */
    CSL_USBOTG_QUERY_RESETDONE,
    /** Arg = (Bool*),Queries the IDLE setting OTG controller
        TRUE : The OTG controller is idled by disabling the OTG controller.
        FALSE: The OTG controller clock is not gated
     */
    CSL_USBOTG_QUERY_IDLE,
    /** Arg = (Bool*),Queries the IDLE setting of the Host controller
        TRUE : Host power management circuitry is enabled
        FALSE: Host power management circuitry is not enabled
     */
    CSL_USBOTG_QUERY_HOSTIDLE,
    /** Arg = (Bool*),Queries the IDLE setting of the Device controller
        TRUE : The USB device controller clock is disabled if the USB device
	    controller does not need an active clock
        FALSE: The USB device controller clock is not gated
     */
    CSL_USBOTG_QUERY_DEVIDLE,
    /** Arg = (Bool*),Queries the Enable/Status setting of OTG Controller
        TRUE : The OTG controller is enabled
        FALSE: The OTG controller is disabled
     */
    CSL_USBOTG_QUERY_ENABLE,
    /** Arg = (Bool*),Queries the Enable/Status setting of OTG Controller
    	TRUE : USB Host controller clock is not held inactive and a host USB Host
	    controller hardware reset is not forced.
    	FALSE: USB Host controller is not clocked and is held in hardware reset.
    */
    CSL_USBOTG_QUERY_HOSTENABLE,
    /** Arg = (CSL_UsbotgTllspeed*), Reports the TLL speed */
    CSL_USBOTG_QUERY_TLLSPEED,
    /** Arg = (Bool*), TLL models a detached link
	    TRUE : Transceiverless link logic models an attached link.
        FALSE: Transceiverless link logic models a detached link.
	*/
    CSL_USBOTG_QUERY_TLLATTACH,
    /** Arg = (Bool*), B-device has been enabled to issue HNP, relevant when OMAP1610 acts
    as a default-A device,
    	TRUE : A-device has enabled the connected B-device to perform HNP
        FALSE: A-device has not enabled the connected B-device to perform HNP
       */
    CSL_USBOTG_QUERY_A_BHNP,
    /** Arg = (Bool*), relevant when OMAP1610 acts as a default-A device,
    	TRUE : A-device has requested host role on the bus
        FALSE: A-device has not requested host role on the bus
       */
    CSL_USBOTG_QUERY_A_BUSREQ,
    /** Arg = (Bool*), B-device has been enabled to issue HNP, relevant when OMAP1610 acts
    	as a default-B device,
    	TRUE : B-device is enabled to perform HNP
        FALSE: B-device is not enabled to perform HNP
       */
    CSL_USBOTG_QUERY_B_BHNP,
    /** Arg = (Bool*), relevant when OMAP1610 acts as a default-B device,
    	TRUE : B-device has requested host role on the bus
        FALSE: B-device has not requested host role on the bus
        */
    CSL_USBOTG_QUERY_B_BUSREQ,
    /** Arg = (Bool*), OTG Bus Drop status, relevant when acting as Default-A device.

        TRUE : Session end has been requested
        FALSE: Session end has not been requested
    	*/
    CSL_USBOTG_QUERY_A_SESSION,
    /** Arg = (CSL_BitMask16*), OR'd Interrupt Enable masks of those that are enabled */
    CSL_USBOTG_QUERY_INTERRUPT_ENABLE
}CSL_UsbotgHwStatusQuery;

/** @brief CSL_UsbotgHwCtrlSetup is a substructure of the CSL_UsbotgHwSetup.
*
* that has the fields required for configuring parameters required at power-Up/Reset
* for the OTG Module.
*/
typedef struct CSL_UsbotgHwCtrlSetup{
	/** This field enables compatibility with the 16-bit OTG master controller.
	    TRUE : Host Controller is connected to system memory via a 32-bit bus
        FALSE: Host Controller is connected to system memory via a 16-bit bus
	*/
	Bool    bus16bit;
	/** This field configures the OTG controller clock gating control
	    TRUE : The OTG controller is idled by disabling the OTG controller.
        FALSE: The OTG controller clock is not gated
	*/
	Bool    otgIdleEn;
	/** This field configures the Device controller clock-gating control.
	    TRUE : The USB device controller clock is disabled if the USB device
	    controller does not need an active clock
        FALSE: The USB device controller clock is not gated
	*/
	Bool    devIdleEn;
	/** This field Enables/Disables the OTG Module
	    TRUE : The controller is Enabled
        FALSE: The controller is Disabled
	*/
	Bool    enable;
	/** This field configures whether the output signals are synchronised.
	    This must always be set to TRUE.
	    TRUE : The USB output signals are synchronised
        FALSE: The USB output signals are not synchronised
	*/
	Bool    synchEnable;
	/** This field configures the OTG transeiver control and status information
	    selector. For an OMAP1610 dual-role OTG device this field must be set
	    to FALSE.
	    TRUE : Should be set when the USB device controller is used without
	    enabling OTG functionality.
        FALSE: Should be set when an OTG dual role device functionality is
        implemented.
	*/
	Bool    otgPaden;
	/** This field configures the USB pin multiplexing control selector.
	    TRUE : Should be set when the OMAP1610 configuration register module
	    registers provide control.
        FALSE: Should be set when the OTG_SYSCON_2 provides the controls.
	*/
	Bool    hmcPaden;
	/** This field configures the host USB controller enable bit.
	    TRUE : USB Host controller clock is not held inactive and a host USB Host
	    controller hardware reset is not forced.
        FALSE: USB Host controller is not clocked and is held in hardware reset.
	*/
	Bool    uhostEnable;
   /** This field configures the HMC TLL ATTACH configuration bit.
	    TRUE : Transceiverless link logic models an attached link.
        FALSE: Transceiverless link logic models a detached link.
	*/
	Bool    hmcTllattach;
	/** OR'd Interrupt Enable masks of those to be enabled */
    CSL_BitMask16 interruptEnable;
	/** This field configures the HMC TLL SPEED configuration bit.
	*/
	CSL_UsbotgTllspeed hmcTllspeed;
	/** This field configures the HMC Mode
	    The only possible value for OMAP1610 is 0x0
	*/
	CSL_UsbotgHmcMode    hmcMode;

  	/** USB Port 0 transceiver mode
	    On trinity Port 0 is the only one that can be used to setup an
	    OTG link
	    */
	CSL_UsbotgTransceiverMode transceiverPort0;
}CSL_UsbotgHwCtrlSetup;

/** @brief hwDefaultASetupParams is a substructure of the CSL_UsbotgHwSetup.
*
* It has the fields required for the configuration of the parameters relevant when
* the controller is a Default-A device i.e ID = 1.
*/
typedef struct CSL_UsbotgHwDefaultASetup{
	/** This field determines the Session Request protocol generation discharge VBUS enable.
		TRUE : VBUS is discharged after the SRP VBUS pulse
        FALSE: VBUS is not discharged after the SRP VBUS pulse
    */
    Bool srp_gpdvbus;
	/** This field determines the Session Request protocol generation pulse width
	    on D+.
    */
    CSL_UsbotgSrp_gpdata srp_gpdata;
	/** This field determines the Session Request protocol generation charge VBUS duration.
     */
    CSL_UsbotgSrp_gpuvbus srp_gpuvbus;

}CSL_UsbotgHwDefaultASetup;
/** @brief hwDefaultBSetupParams is a substructure of the CSL_UsbotgHwSetup.
*
* It has the fields required for the configuration of the parameters relevant when
* the controller is a Default-B device i.e ID = 0.
*/
typedef struct CSL_UsbotgHwDefaultBSetup{
    /** This field determines whether the Session Request protocol detection-
        data pulsing detection is enabled.
        TRUE : OTG controller treats a D+ or D- pulse of appropriate minimum duration as an SRP request.
        FALSE: OTG controller does not consider the D+ or D- pulse as an SRP requests.
     */
    Bool srp_data;
	/** This field determines whether the Session Request protocol detection-
        VBUS pulsing detection is enabled.
        TRUE : OTG controller treats a VBUS pulse of appropriate minimum duration as an SRP request.
        FALSE: OTG controller does not consider VBUS pulse as an SRP requests.
     */
    Bool srp_vbus;

    /** This is the offset for B_ASE0_BRST timer. These bits controls the USB OTG
        controller manages disabling the D+ pullup when acting as a default-B OTG
        dual-role device and transitioning from state b_peripheral to b_wait_acon
        and when acting as a default-A OTG dual role device and transitioning
        from state a_peripheral to a_wait_bcon.
        The ONLY allowed setting for this on OMAP1610 is 0x4.
     */
    Uint16 b_ase0_brst;
    /** This field contains the OTG_CTRL[20-16] read from the current OTG transceiver
        status.
        Only the lower 5 bits of this field are used with the following bit ordering
        ASESSVLD|BSESSEND|BSESSVLD|VBUSVLD|ID.
        Values submitted not following this bit ordering will lead to unexpected behaviour
        of the OTG module.
        IMPORTANT: The Default Setup setting is 00000b (Reset value).
        This field must be passed appropriately by software after reading the transceiver status.
        If not the behavior of the module is unpredictable.
     */

    CSL_BitMask16 ctrlFlag;

    /** This field determines the Session Request protocol detection-pulse width
     */
    CSL_UsbotgSrp_dpw srp_dpw;
    /** Offset for the A_WAIT_VRISE timer. These bits define the maximum duration
        that the OTG controller must wait for VBUS to rise above the A-device.
      */
    CSL_UsbotgAwaitvrise a_wait_vrise;

}CSL_UsbotgHwDefaultBSetup;

/** @brief CSL_usbotgHwSetup has all the fields required to configure USB OTG Module.
*
* This structure has the substructures required to configure Usbotg for the
* Default-A device or the Default-B device  at Power Up(After a Hardware Reset) or a Soft Reset.
*
*/

typedef struct CSL_UsbotgHwSetup {
	/** Configuration parameters to be programmed at before the usage of the
	    USB OTG Module */
    CSL_UsbotgHwCtrlSetup* hwCtrlSetup;
    /** Configuration parameters for the Default-A device
     */
    CSL_UsbotgHwDefaultASetup* hwDefaultASetupParams;
    /** Configuration parameters for the Default-B device
     */
    CSL_UsbotgHwDefaultBSetup* hwDefaultBSetupParams;
}CSL_UsbotgHwSetup;

/* Default Configurations */
/* Macros for Default settings of CSL_USBOTG_HWCONTROLSETUP_DUALROLE_DEFAULTS */

/**
 * Default values for the hwcontrol setup 
 */
#define CSL_USBOTG_HWCONTROLSETUP_DUALROLE_DEFAULTS {  \
           (Bool)FALSE,  \
           (Bool)FALSE,       \
           (Bool)FALSE,  \
           (Bool)TRUE,  \
           (Bool)TRUE,  \
           (Bool)FALSE,  \
           (Bool)FALSE,  \
           (Bool)TRUE,  \
           (Bool)FALSE, \
           (CSL_BitMask16)(CSL_USBOTG_EVENT_DRIVER_SWITCH|CSL_USBOTG_EVENT_A_VBUS_ERROR| \
           CSL_USBOTG_EVENT_A_REQ_TIMEOUT|CSL_USBOTG_EVENT_A_SRP_DETECT| \
           CSL_USBOTG_EVENT_B_HNP_FAIL|CSL_USBOTG_EVENT_B_SRP_TIMEOUT| \
           CSL_USBOTG_EVENT_B_SRP_DONE|CSL_USBOTG_EVENT_B_SRP_STARTED| \
           CSL_USBOTG_EVENT_OPORT_CHG), \
           (CSL_UsbotgTllspeed)CSL_USBOTG_TLLSPEED_FULL,  \
           (CSL_UsbotgHmcMode)CSL_USBOTG_HMCMODE_0, \
           (CSL_UsbotgTransceiverMode)CSL_USBOTG_TRANSCEIVERMODE_3PINDATSE0_BI \
           }
/**
 * Default values for the hardware setup of  default A  device 
 */

#define CSL_USBOTG_HWDEFAULTA_DUALROLE_SETUP_DEFAULTS {  \
           (Bool)TRUE,  \
           (CSL_UsbotgSrp_gpdata)CSL_USBOTG_SRP_GPDATA_9MS, \
           (CSL_UsbotgSrp_gpuvbus)CSL_USBOTG_SRP_GPUVBUS_SRP_4MS \
           }
/**
 * Default values for the hardware setup of default B  device 
 */
#define CSL_USBOTG_HWDEFAULTB_DUALROLE_SETUP_DEFAULTS {  \
           (Bool)TRUE, \
           (Bool)TRUE, \
           (Uint16)0x4, \
           (CSL_BitMask16)0x0, \
           (CSL_UsbotgSrp_dpw)CSL_USBOTG_SRP_DPW_1MS, \
           (CSL_UsbotgAwaitvrise)CSL_USBOTG_AWAITRISE_287MS \
           }

/**
 * @brief   The config-structure
 *
 * Used to configure the usbotg using CSL_usbotgHwSetupRaw(..)
 */