csl_usbotg.h

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/** @mainpage USB OTG Module
*
* @section Introduction
*
* @subsection xxx Purpose and Scope
* The purpose of this document is to identify a set of common CSL APIs for
* the USB OTG Module across various modules. The CSL developer is expected
* to refer to this document while implementing APIs for these
* modules . Some of the listed APIs may not be applicable to a given USB
* OTG Module. While in other cases this list of APIs may not be
* sufficient to cover all the features of a particular USB OTG Module.
* The CSL developer should use his/her discretion in
* designing new APIs or extending the existing ones to cover these. However, much
* deviation is not expected.
*
*
*
* @subsection aaa Terms and Abbreviations
*   -# CSL  :  Chip Support Library
*   -# API  :  Application Programmer Interface
*   -# USB  :  Universal Serial Bus
*   -# HC   :  Host Controller
*   -# OTG  :  On-The-Go
*   -# USBOTG :  USB On-The-Go Module
*   -# TLL    : Transceiverless logic
*
* @subsection References
*    -# CSL 3.x Technical Requirements Specifications Version 0.5, dated
*       May 14th, 2003
*    -# The OMAP 1610 Technical Reference Manual (SWPU062B)
*    -# On-The-Go Supplement to the USB 2.0 Specification, Revision 1.0a.
*
*
* @subsection Assumptions
*     The abbreviations USB, OTG, USBOTG have been used throughout this
*     document to refer to the OMAP 1610 USB OTG Module
*/

/** @file csl_usbotg.h
*
*  @brief    Header file for functional layer of CSL
*
*  Description
*    - The different enumerations, structure definitions
*      and function declarations
*  @date 5th Jan, 2004
*  @author Ruchika Kharwar
*/

#ifndef _CSL_USBOTG_H_
#define _CSL_USBOTG_H_

#ifdef __cplusplus
extern "C" {
#endif

#include <csl.h>
#include <cslr_usbotg.h>

/**************************************************************************\
* USBOTG global macro declarations
\**************************************************************************/
/* Macros - events, OR'd combination of these can be used for
*  a. Interrupt Enable Command
*  b. Interrupt Clear  Command
*  c. Interrupt Status Intepretation
*/
/** Driver switch interrupt */
#define CSL_USBOTG_EVENT_DRIVER_SWITCH 			  	 0x8000   
/** A-device Vbus errorinterrupt */
#define CSL_USBOTG_EVENT_A_VBUS_ERROR    		  	 0x2000   
/** A-device request time-out interrupt */
#define CSL_USBOTG_EVENT_A_REQ_TIMEOUT   		  	 0x1000   
/** A-device SRP detection interrupt */
#define CSL_USBOTG_EVENT_A_SRP_DETECT    		  	 0x0800   
/** B-device HNP failed interrupt */
#define CSL_USBOTG_EVENT_B_HNP_FAIL      		  	 0x0400   
/** B-device SRP time-out interrupt */
#define CSL_USBOTG_EVENT_B_SRP_TIMEOUT   		 	 0x0200   
/** B-device SRP done interrupt */
#define CSL_USBOTG_EVENT_B_SRP_DONE      		 	 0x0100   
/** B-device SRP started interrupt */
#define CSL_USBOTG_EVENT_B_SRP_STARTED   		  	 0x0080   
/** OTG output port status change interrupt */
#define CSL_USBOTG_EVENT_OPORT_CHG       		  	 0x0001   

/* Macros - OTG control values, these masks can be used for
*  intepretation of the CSL_USBOTG_QUERY_CONTROL Query Response
*  When the Response has the following bit set the description applies
*  else if the bit is not set the negation of the description is understood
*/
/** VBUS voltage is above VA_SESS_VLD */
#define CSL_USBOTG_CONTROL_ASESSVLD             0x00100000    
/** VBUS voltage is below VB_SESS_END */
#define CSL_USBOTG_CONTROL_BSESSEND             0x00080000    
/** VBUS voltage is above VB_SESS_VLD */
#define CSL_USBOTG_CONTROL_BSESSVLD             0x00040000    
/** VBUS voltage is above VA_VBUS_VLD */
#define CSL_USBOTG_CONTROL_VBUSVLD              0x00020000    
/** ID pin is high impedance */
#define CSL_USBOTG_CONTROL_ID    		        0x00010000    
/** Device driver has control of the OTG link */
#define CSL_USBOTG_CONTROL_DRIVERSEL            0x00008000    
/** B-device HNP indication */
#define CSL_USBOTG_CONTROL_A_SETB_HNPEN   	    0x00001000    
/** A-device requests host role on the bus */
#define CSL_USBOTG_CONTROL_A_BUSREQ             0x00000800    
/** B-device HNP enable */
#define CSL_USBOTG_CONTROL_B_HNPEN              0x00000200    
/** B-device requests bus  */
#define CSL_USBOTG_CONTROL_B_BUSREQ             0x00000100    
/** OTG session to be ended */
#define CSL_USBOTG_CONTROL_BUSDROP              0x00000080    
/** OTG transceiver activates the D+ pulldown */
#define CSL_USBOTG_CONTROL_PD                   0x00000020    
/** OTG transceiver activates the D+ pullup */
#define CSL_USBOTG_CONTROL_PU                   0x00000010    
/** OTG transeiver drives VBUS */
#define CSL_USBOTG_CONTROL_DRV_VBUS             0x00000008    
/** OTG transceiver discharges the VBUS */
#define CSL_USBOTG_CONTROL_PD_VBUS              0x00000004    
/** OTG transceiver charges VBUS */
#define CSL_USBOTG_CONTROL_PU_VBUS              0x00000002    
/** OTG transceiver applies a pullup to ID */
#define CSL_USBOTG_CONTROL_PU_ID                0x00000001    

/**************************************************************************\
* USBOTG global typedef declarations
\**************************************************************************/

/** @brief Enumeration of the possible OTG transceiver modes.
*
* The USB ports can be configured to the particular transceiver signaling type
* used by the USB host, device and OTG controller */

typedef enum {
	/** 6-pin DAT/SE0 mode unidirectional signaling */
    CSL_USBOTG_TRANSCEIVERMODE_6PINDATSE0_UNI,
	/** 4-pin VP/VM mode bidirectional signaling */
	CSL_USBOTG_TRANSCEIVERMODE_4PINVPVM_BI,
 	/** 3-pin DAT/SE0 mode bidirectional signaling*/
	CSL_USBOTG_TRANSCEIVERMODE_3PINDATSE0_BI
}CSL_UsbotgTransceiverMode;

/** @brief Enumeration of the possible OTG TLL Speed Configuration.
*
* This needs to be configured at setup time and is done so as part of the Setup structure time
*/

typedef enum {
	/** TLL modelling a low speed link */
    CSL_USBOTG_TLLSPEED_LOW,
    /** TLL modelling a full speed link */
    CSL_USBOTG_TLLSPEED_FULL
}CSL_UsbotgTllspeed;

/** @brief Enumeration of the Session request protocol generation pulse width on D+.
*
* This is specified as part of the Setup structure */

typedef enum {
	/** Data line pulse during SRP is 6 ms( nominal) */
   CSL_USBOTG_SRP_GPDATA_6MS,
   /** Data line pulse during SRP is 9 ms( nominal) */
   CSL_USBOTG_SRP_GPDATA_9MS
}CSL_UsbotgSrp_gpdata;

/** @brief Enumeration of the Session request protocol generation charge VBUS duration.
*
* This is specified as part of the Setup structure */
typedef enum {
   /** No issue of VBUS charge pulse as part of its SRP generation sequence */
   CSL_USBOTG_SRP_GPUVBUS_NONE,
   /** VBUS charged for 0.5ms nominal */
   CSL_USBOTG_SRP_GPUVBUS_VBUS0_5MS,
   /** During SRP generation, VBUS charged for 0.5ms nominal */
   CSL_USBOTG_SRP_GPUVBUS_SRP0_5MS,
   /** During SRP generation, VBUS charged for 2ms nominal */
   CSL_USBOTG_SRP_GPUVBUS_SRP_2MS,
   /** During SRP generation, VBUS charged for 4ms nominal */
   CSL_USBOTG_SRP_GPUVBUS_SRP_4MS,
   /** During SRP generation, VBUS charged for 6ms nominal */
   CSL_USBOTG_SRP_GPUVBUS_SRP_6MS,
   /** During SRP generation, VBUS charged for 10ms nominal */
   CSL_USBOTG_SRP_GPUVBUS_SRP_10MS,
   /** During SRP generation, VBUS charged for 40ms nominal */
   CSL_USBOTG_SRP_GPUVBUS_SRP_40MS
}CSL_UsbotgSrp_gpuvbus;

/** @brief Enumeration of the Maximum delay in the A_WAIT_VRISE state.
*
* This is specified as part of the Setup structure */

typedef enum {
   /** Maximum delay in A_WAIT_VRISE is 200ms nominal */
   CSL_USBOTG_AWAITRISE_200MS,
   /** Maximum delay in A_WAIT_VRISE is 287.04ms nominal */
   CSL_USBOTG_AWAITRISE_287MS,
   /** Maximum delay in A_WAIT_VRISE is 374.08ms nominal */
   CSL_USBOTG_AWAITRISE_374MS,
   /** Maximum delay in A_WAIT_VRISE is 548.16ms nominal */
   CSL_USBOTG_AWAITRISE_548MS
}CSL_UsbotgAwaitvrise;

/** @brief Enumeration of the Session Request Protocol detection - pulse width.
*
* This is specified as part of the Setup structure
*/
typedef enum {
   /** SRP pulse width must be greater than 1ms to be sensed
       as a valid D+,D- or VBUS SRP pulse */
   CSL_USBOTG_SRP_DPW_1MS,
   /** SRP pulse width must be greater than 167ns to be sensed
       as a valid D+,D- or VBUS SRP pulse */
   CSL_USBOTG_SRP_DPW_167NS
}CSL_UsbotgSrp_dpw;

/** @brief Enumeration of the HMC modes.
*
* The HMC mode configuration bits control the OMAP USB signal multiplexing selection.
*/
typedef enum {
   /** Only mode 0 is allowed with the dual role OTG device */
   CSL_USBOTG_HMCMODE_0 = 0x0
}CSL_UsbotgHmcMode;
/** @brief Enumeration for control commands passed to @a
CSL_usbotgHwControl()
*
* This is the set of commands that are passed to the @a CSL_usbotgHwControl()
* with an optional argument type-casted to @a void* .
* The arguments to be passed with each enumeration (if any) are specified
* next to them respectively.
*/

typedef enum {
    /** Arg = None, OTG controller is idled by disabling the OTG controller, access to
        controller registers not allowed */
    CSL_USBOTG_CMD_IDLE_ENABLE,
    /** Arg = None, OTG controller clock is not gated */
    CSL_USBOTG_CMD_IDLE_DISABLE,
    /** Arg = None, Host power management circuitry is enabled */
    CSL_USBOTG_CMD_HOSTIDLE_ENABLE,
    /** Arg = None, Host power management circuitry is disabled */
    CSL_USBOTG_CMD_HOSTIDLE_DISABLE,
    /** Arg = None, Device Controller clock is disabled if the USB device controller
        does not need an active clock */
    CSL_USBOTG_CMD_DEVIDLE_ENABLE,
    /** Arg = None, Device Controller clock is not gated */
    CSL_USBOTG_CMD_DEVIDLE_DISABLE,
    /** Arg = None, Software reset for the OTG, device, and host controllers */
    CSL_USBOTG_CMD_RESET,
    /** Arg = None, OTG controller circuitry is activated */
    CSL_USBOTG_CMD_ENABLE,
    /** Arg = None, OTG controller circuitry is not activated */
    CSL_USBOTG_CMD_DISABLE,
    /** Arg = None, USB Host Controller clock is not held inactive and a USB Host
    controller hardware reset is not forced */
    CSL_USBOTG_CMD_HOST_ENABLE,
    /** Arg = None, USB Host Controller is not clocked and is held in hardware reset */
    CSL_USBOTG_CMD_HOST_DISABLE,
    /** Arg = None, TLL models a low-speed link */
    CSL_USBOTG_CMD_TLLSPEED_LOW,
    /** Arg = None, TLL models a full-speed link */
    CSL_USBOTG_CMD_TLLSPEED_FULL,
    /** Arg = None, TLL models a detached link */
    CSL_USBOTG_CMD_TLLATTACH_DETACH,
    /** Arg = None, TLL models an attached link */
    CSL_USBOTG_CMD_TLLATTACH_ATTACH,
    /** Arg = (CSL_BitMask16*), BitMask of the ASESSVLD,BSESSEND,BSESSVLD,VBUSVLD,ID.
        Only the lower 5 bits of this field are used with the following bit ordering
        ASESSVLD|BSESSEND|BSESSVLD|VBUSVLD|ID.
        Values submitted not following this bit ordering will lead to unexpected behaviour
        of the OTG module.*/
    CSL_USBOTG_CMD_CTRLSIG_UPDATE,
    /** Arg = None, B-device has been enabled to issue HNP, relevant when OMAP1610 acts
    as a default-A device */
    CSL_USBOTG_CMD_A_BHNP_ENABLE,
    /** Arg = None, B-device is not enabled to issue HNP, relevant when OMAP1610 acts
    as a default-A device */
    CSL_USBOTG_CMD_A_BHNP_DISABLE,
    /** Arg = None, Bus Requested when OMAP1610 acting as a default-A device */
    CSL_USBOTG_CMD_A_BUSREQ,
    /** Arg = None, Bus not requested when OMAP1610 acting as a default-A device */
    CSL_USBOTG_CMD_A_BUSREQ_NONE,
    /** Arg = None, B-device has been enabled to issue HNP, relevant when OMAP1610 acts
    as a default-B device */
    CSL_USBOTG_CMD_B_BHNP_ENABLE,
    /** Arg = None, B-device has been not been enabled to issue HNP, relevant when OMAP1610 acts
    as a default-B device */
    CSL_USBOTG_CMD_B_BHNP_DISABLE,
    /** Arg = None, Bus Requested when OMAP1610 acting as a default-B device */
    CSL_USBOTG_CMD_B_BUSREQ,
    /** Arg = None, Bus not requested when OMAP1610 acting as a default-B device */
    CSL_USBOTG_CMD_B_BUSREQ_NONE,
    /** Arg = None, OTG Bus Drop Request, system software desires the end of a session */
    CSL_USBOTG_CMD_A_SESSION_END,
    /** Arg = (CSL_BitMask16*), OR'd Interrupt Enable masks of those to be enabled */
    CSL_USBOTG_CMD_INTERRUPT_ENABLE,
    /** Arg = (CSL_BitMask16*), OR'd Interrupt masks of those to be cleared */
    CSL_USBOTG_CMD_INTERRUPT_CLEAR
}CSL_UsbotgHwControlCmd;

/** @brief Enumeration for queries passed to @a CSL_usbotgGetHwStatus()