csl_cacheaux.h

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/** ===========================================================================
 *   @file  csl_cacheAux.h
 *
 *   @path  $(CSLPATH)\arm\cache\src
 *
 *   @desc  Auxillary API header file for CACHE 
 *
 */

/*  ===========================================================================
 *   Copyright (c) Texas Instruments Inc 2002, 2003, 2004
 *
 *   Use of this software is controlled by the terms and conditions found in 
 *   the license agreement under which this software has been supplied.
 *   ==========================================================================
 */

/*  @(#) PSP/CSL 3.00.01.00[5912] (2004-04-18)  */

/* ============================================================================
 *  Revision History
 *  ===============
 *  06-Jul-2004 rr Created for supporting modifications to CSL architecture
 * =============================================================================
 */

#ifndef CSL_CACHEAUX_H_
#define CSL_CACHEAUX_H_

#ifdef __cplusplus
extern "C" {
#endif

#include <csl_cache.h>
/** ============================================================================
 *   @n@b CSL_cacheGetInfo 
 *
 *   @b Description
 *   @n This routine gets the information about cache
 *
 *   @b Arguments
 *   @verbatim
            None
     @endverbatim
 *   <b> Return Value </b>  Value in the cache type register will be returned
 *
 *   <b> Pre Condition </b>
 *   @n  Should be in privileged mode
 *
 *   <b> Post Condition </b>
 *   @n  None
 *
 *   @b Modifies
 *   @n None
 *
 *   @b Example
 *   @verbatim
            Uint32 cacheInfo;
            cacheInfo = CSL_cacheGetInfo ();
     @endverbatim
 * ===========================================================================
 */

extern Uint32 CSL_cacheGetInfo (
    void
);

/** ============================================================================
 *   @n@b CSL_cacheEnable 
 *
 *   @b Description
 *   @n This routine enables the specified cache/caches
 *
 *   @b Arguments
 *   @verbatim
            type   CSL_CACHE_TYPE_INSTR          - To enable instruction cache
                   CSL_CACHE_TYPE_DATA           - To enable data cache
                   CSL_CACHE_TYPE_INSTR_AND_DATA - To enable both the caches
     @endverbatim
 *    
 *   <b> Return Value </b>  None
 *
 *   <b> Pre Condition </b>
 *   @n  Should be in privileged mode
 *
 *   <b> Post Condition </b>
 *   @n  Instruction cache, data cache or both will be enabled as specified
 *
 *   @b Modifies
 *   @n Control register (C1) of system control coprocessor registers.
 *
 *   @b Example
 *   @verbatim
 		CSL_cacheEnable (CSL_CACHE_TYPE_INSTR_AND_DATA);
     @endverbatim
 * ===========================================================================
 */

extern void  CSL_cacheEnable(
    CSL_CacheType   type
);

/** ============================================================================
 *   @n@b CSL_cacheDisable  
 *
 *   @b Description
 *   @n This routine disable the specified cache/caches
 *
 *   @b Arguments
 *   @verbatim
             type   CSL_CACHE_TYPE_INSTR          - To disable instruction cache
                    CSL_CACHE_TYPE_DATA           - To disable data cache
                    CSL_CACHE_TYPE_INSTR_AND_DATA - To disable both the caches
     @endverbatim
 *     
 *   <b> Return Value </b>  None
 *
 *   <b> Pre Condition </b>
 *   @n  Should be in privileged mode
 *
 *   <b> Post Condition </b>
 *   @n  Instruction cache, data cache or both will be disabled as specified
 *
 *   @b Modifies
 *   @n Control register (C1) of system control coprocessor registers.
 *
 *   @b Example
 *   @verbatim
 		CSL_cacheDisable (CSL_CACHE_TYPE_DATA);
     @endverbatim
 * ===========================================================================
 */

extern void  CSL_cacheDisable(
    CSL_CacheType   type
);

/** ============================================================================
 *   @n@b CSL_cacheGetStatus  
 *
 *   @b Description
 *   @n This routine queries the status of cache
 *
 *   @b Arguments
 *   @verbatim
            type 	CSL_CACHE_TYPE_INSTR  - To check status of instruction cache
 	                CSL_CACHE_TYPE_DATA   - To check status of data cache

     @endverbatim
 *     
 *   <b> Return Value </b>  Bool
 *   @li			        True  - if specified cache is enabled
 *   @li			        False - otherwise
 *
 *   <b> Pre Condition </b>
 *   @n  Should be in privileged mode
 *
 *   <b> Post Condition </b>
 *   @n  None
 *
 *   @b Modifies
 *   @n None
 *
 *   @b Example
 *   @verbatim
            Bool enabled;
            enabled  = CSL_cacheGetStatus (CSL_CACHE_TYPE_DATA);
     @endverbatim
 * ===========================================================================
 */

extern Bool CSL_cacheGetStatus(
    CSL_CacheType	 type
);   

/** ============================================================================
 *   @n@b CSL_cacheInvalidate   
 *
 *   @b Description
 *   @n This routine invalidates the cache/caches specified
 *
 *   @b Arguments
 *   @verbatim
             type CSL_CACHE_TYPE_INSTR           - To invalidate instruction cache
                  CSL_CACHE_TYPE_DATA            - To invalidate data cache
                  CSL_CACHE_TYPE_INSTR_AND_DATA  - To invalidate both the caches

     @endverbatim
 *     
 *   <b> Return Value </b>  None
 *   <b> Pre Condition </b>
 *   @n  Should be in privileged mode
 *
 *   <b> Post Condition </b>
 *   @n  Instruction cache, data cache or both are invalidated
 *
 *   @b Modifies
 *   @n None
 *
 *   @b Example
 *   @verbatim
 		CSL_cacheInvalidate (CSL_CACHE_TYPE_INSTR);
     @endverbatim
 * ===========================================================================
 */

extern void CSL_cacheInvalidate(
    CSL_CacheType  type
);

/** ============================================================================
 *   @n@b CSL_cacheInvICacheEntryMVA    
 *
 *   @b Description
 *   @n This routine invalidates the instruction cache line specified
 *
 *   @b Arguments
 *   @verbatim
            virtAddress	Modified virtual address of the entry to be invalidated
     @endverbatim
 *     
 *   <b> Return Value </b>  None
 *
 *   <b> Pre Condition </b>
 *   @n  Should be in privileged mode
 *
 *   <b> Post Condition </b>
 *   @n  The specified entry is invalidated 
 *
 *   @b Modifies
 *   @n None
 *
 *   @b Example
 *   @verbatim
 		void CSL_cacheInvICacheEntryMVA (0x20000000);
     @endverbatim
 * ===========================================================================
 */

extern void  CSL_cacheInvICacheEntryMVA (
    Uint32  virtAddr
);

/** ============================================================================
 *   @n@b CSL_cacheInvICacheEntrySetWay      
 *
 *   @b Description
 *   @n This routine invalidates the instruction cache line specified
 *
 *   @b Arguments
 *   @verbatim
            way   Specifies the cache way. Value should be in the range 0 to 3 
            set   Specifies the set way. Value should be in the range 0 to 127
     @endverbatim
 *    
 *   <b> Return Value </b>  None
 *
 *   <b> Pre Condition </b>
 *   @n  Should be in privileged mode
 *
 *   <b> Post Condition </b>
 *   @n  Entry in the specified Set/way of instruction cache is invalidated
 *
 *   @b Modifies
 *   @n None
 *
 *   @b Example
 *   @verbatim
 		CSL_cacheInvICacheEntrySetWay(2,100);
     @endverbatim
 * ===========================================================================
 */

extern void CSL_cacheInvICacheEntrySetWay (
    Uint16 way, 
    Uint16 set
);

/** ============================================================================
 *   @n@b CSL_cacheInvDcacheEntryMVA      
 *
 *   @b Description
 *   @n This routine invalidates the data cache line specified
 *
 *   @b Arguments
 *   @verbatim
            virtAddress  Modified virtual address of the entry to be invalidated
     @endverbatim
 *     
 *   <b> Return Value </b>  None
 *
 *   <b> Pre Condition </b>
 *   @n  Should be in privileged mode
 *
 *   <b> Post Condition </b>
 *   @n  The specified entry is invalidated
 *
 *   @b Modifies
 *   @n None
 *
 *   @b Example
 *   @verbatim
 		CSL_cacheInvDcacheEntryMVA (0x2000000);
     @endverbatim
 * ===========================================================================
 */

extern void  CSL_cacheInvDCacheEntryMVA (
    Uint32  virtAddr
);

/** ============================================================================
 *   @n@b CSL_cacheInvDCacheEntrySetWay       
 *
 *   @b Description
 *   @n This routine invalidates the data cache line specified
 *
 *   @b Arguments
 *   @verbatim
             way    Specifies the cache way. Value should be in the range 0 to 3 
             set   Specifies the set way. Value should be in the range 0 to 63

     @endverbatim
 *     
 *   <b> Return Value </b>  None
 *
 *   <b> Pre Condition </b>
 *   @n  Should be in privileged mode
 *
 *   <b> Post Condition </b>
 *   @n  The specified entry is invalidated
 *
 *   @b Modifies
 *   @n None
 *
 *   @b Example
 *   @verbatim
 		CSL_cacheInvDCacheEntrySetWay(2,50);
     @endverbatim
 * ===========================================================================
 */

extern void CSL_cacheInvDCacheEntrySetWay (
    Uint16 way, 
    Uint16 set
);

/** ============================================================================
 *   @n@b CSL_cacheCleanDCacheEntryMVA        
 *
 *   @b Description
 *   @n This routine cleans the data cache line specified
 *
 *   @b Arguments
 *   @verbatim
            virtAddress	Modified virtual address of the entry to be cleaned
     @endverbatim
 *     
 *   <b> Return Value </b>  None
 *
 *   <b> Pre Condition </b>
 *   @n  Should be in privileged mode
 *
 *   <b> Post Condition </b>
 *   @n  The memory is updated from the specified data cache entry
 *
 *   @b Modifies
 *   @n None
 *
 *   @b Example
 *   @verbatim
 		CSL_cacheCleanDCacheEntryMVA (0x20000000);
     @endverbatim
 * ===========================================================================
 */

extern void CSL_cacheCleanDCacheEntryMVA (
    Uint32 virtAddress
);

/** ============================================================================
 *   @n@b CSL_cacheCleanDCacheEntrySetWay         
 *
 *   @b Description
 *   @n This routine cleans the data cache line specified
 *
 *   @b Arguments
 *   @verbatim
            way       Specifies the cache way. Value should be in the range 0 to 3 
            set       Specifies the set way. Value should be in the range 0 to 63

     @endverbatim
 *     
 *   <b> Return Value </b>  None
 *
 *   <b> Pre Condition </b>
 *   @n  Should be in privileged mode
 *
 *   <b> Post Condition </b>
 *   @n  The memory is updated from the specified data cache entry
 *
 *   @b Modifies
 *   @n None
 *
 *   @b Example
 *   @verbatim
 		CSL_cacheCleanDCacheEntrySetWay(2,50);
     @endverbatim
 * ===========================================================================
 */

extern void CSL_cacheCleanDCacheEntrySetWay (
    Uint16 way, 
    Uint16 set
);

/** ============================================================================
 *   @n@b CSL_cachePrefetchIns          
 *
 *   @b Description
 *   @n This routine fteches the instruction into the cache
 *
 *   @b Arguments
 *   @verbatim
            insAddress	Virtual address of the Instruction
     @endverbatim
 *      
 *   <b> Return Value </b>  None
 *
 *   <b> Pre Condition </b>
 *   @n  Should be in privileged mode
 *
 *   <b> Post Condition </b>
 *   @n  The instruction is prefetched into the instruction cache 
 *
 *   @b Modifies
 *   @n None
 *
 *   @b Example
 *   @verbatim
 		CSL_cachePrefetchIns (0x02000000);
     @endverbatim
 * ===========================================================================
 */

extern void CSL_cachePrefetchIns (
    Uint32 insAddress
);

/** ============================================================================
 *   @n@b CSL_cacheTestDCache           
 *
 *   @b Description
 *   @n This routine tests a number of data cache lines and
 *      cleans the first dirty line.If no dirty line was found
 *      FALSE will be returned 
 *