csl_dma_global.h

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  CSL_DMA_SRC_POST_INC_DISABLE = 0,          /**< Does not support post increment mode at source port */
  CSL_DMA_SRC_POST_INC_ENABLE = 1            /**< Supports post increment mode at source port */
} CSL_DmaSrcPostIncAddr;

/** @brief Ability to support single index addressing at source port */ 
typedef enum {
  CSL_DMA_SRC_SNGL_INDEX_DISABLE = 0,        /**< Does not support single indexing mode at source port */
  CSL_DMA_SRC_SNGL_INDEX_ENABLE = 1          /**< Supports single indexing mode at source port */
} CSL_DmaSrcSnglIndexAddr;

/** @brief Ability to support double index addressing at source port */ 
typedef enum {
  CSL_DMA_SRC_DBL_INDEX_DISABLE = 0,         /**< Does not support double indexing mode at source port */
  CSL_DMA_SRC_DBL_INDEX_ENABLE = 1           /**< Supports double indexing mode at source port */
} CSL_DmaSrcDblIndexAddr;

/** @brief Ability to support constant addressing at destination port */ 
typedef enum {
  CSL_DMA_DST_CONST_DISABLE = 0,             /**< Does not support constant addressing mode at destination port */
  CSL_DMA_DST_CONST_ENABLE = 1               /**< Supports constant addressing mode at destination port */
} CSL_DmaDstConstAddr;

/** @brief Ability to support post increment addressing at destination port */ 
typedef enum {
  CSL_DMA_DST_POST_INC_DISABLE = 0,          /**< Does not support post increment mode at destination port */
  CSL_DMA_DST_POST_INC_ENABLE = 1            /**< Supports post increment mode at destination port */
} CSL_DmaDstPostIncAddr;

/** @brief Ability to support single index addressing at destination port */ 
typedef enum {
  CSL_DMA_DST_SNGL_INDEX_DISABLE = 0,        /**< Does not support single index mode at destination port */
  CSL_DMA_DST_SNGL_INDEX_ENABLE = 1          /**< Supports single index mode at destination port */
} CSL_DmaDstSnglIndexAddr;

/** @brief Ability to support double index addressing at destination port */ 
typedef enum {
  CSL_DMA_DST_DBL_INDEX_DISABLE = 0,         /**< Does not support double index mode at destination port */
  CSL_DMA_DST_DBL_INDEX_ENABLE = 1           /**< Supports double index mode at destination port */
} CSL_DmaDstDblIndexAddr;

/** @brief Ability to support separate source destination index for 2-D addressing  */
typedef enum {
  CSL_DMA_SEPARATE_SRC_DST_INDEX_DISABLE = 0,  /**< Does not support separate source destination index for 2-D addressing */
  CSL_DMA_SEPARATE_SRC_DST_INDEX_ENABLE = 1    /**< Supports separate source destination index for 2-D addressing */
} CSL_DmaSeparateSrcDstIndex;

/** @brief Ability of the Graphical Channels to do 1-Bit Colour Expansion */
typedef enum {
  CSL_DMA_1BIT_COLOUR_EXP_DISABLE = 0,         /**< PCh-G cannot do 1-bit colour expansion */
  CSL_DMA_1BIT_COLOUR_EXP_ENABLE = 1           /**< PCh-G can do 1-bit colour expansion */
} CSL_Dma1BitColourExp;

/** @brief Ability of the Graphical Channels to do Origin Co-ordinate Calculation     */
typedef enum {
  CSL_DMA_ORIGIN_COORDINATE_CALC_DISABLE = 0,   /**< PCh-G cannot do origin coordinate calculation */
  CSL_DMA_ORIGIN_COORDINATE_CALC_ENABLE = 1     /**< PCh-G can do origin coordinate calculation */
} CSL_DmaOriginCoordinateCalc;

/** @brief Ability of the Graphical Channels to do Sub-Byte Adjustment for Expansion   */
typedef enum {
  CSL_DMA_SUB_BYTE_ADJUSTMENT_DISABLE = 0,      /**< PCh-G cannot do sub-byte adjust for expansion */
  CSL_DMA_SUB_BYTE_ADJUSTMENT_ENABLE = 1        /**< PCh-G can do sub-byte adjust for expansion */
} CSL_DmaSubByteAdjustment;

/** @brief Ability of the Graphical Channels to do Directional BLT Copy */
typedef enum {
  CSL_DMA_DIRECTIONAL_BLT_COPY_DISABLE = 0,     /**< PCh-G cannot do bi-directional BLT copy */
  CSL_DMA_DIRECTIONAL_BLT_COPY_ENABLE = 1       /**< PCh-G can do bi-directional BLT copy */
} CSL_DmaDirectionalBLTCopy;

/** @brief Ability of the Graphical Channels to do Overlap Detection */
typedef enum {
  CSL_DMA_OVERLAP_DETECTION_DISABLE = 0,        /**< PCh-G cannot do overlap detection */ 
  CSL_DMA_OVERLAP_DETECTION_ENABLE = 1          /**< PCh-G can do overlap detection */
} CSL_DmaOverlapDetection;

/** @brief Ability of the Graphical and Memory Channels to do Transparent BLT Copy */
typedef enum {
  CSL_DMA_TRANSPARENT_BLT_COPY_DISABLE = 0,     /**< PCh-G/PCh-0 or -1 cannot do tranparent BLT copy */
  CSL_DMA_TRANSPARENT_BLT_COPY_ENABLE = 1       /**< PCh-G/PCh-0 or -1 can do transparent BLT copy */
} CSL_DmaTransparentBLTCopy;

/** @brief Ability of the Graphical and Memory Channels to do Constant Fill Copy */
typedef enum {
  CSL_DMA_CONSTANTFILL_COPY_DISABLE = 0,        /**< PCh-G/PCh-0 or -1 cannot do constant fill copy */
  CSL_DMA_CONSTANTFILL_COPY_ENABLE = 1          /**< PCh-G/PCh-0 or -1 can do constant fill copy */
} CSL_DmaConstFillCopy;

/** @brief DMA Capability 
 *
 */
typedef struct CSL_DmaCapability {
    CSL_DmaConstFillCopy                constFillCopy;                 /**< Constant Fill Copy Ability */
    CSL_DmaTransparentBLTCopy           transparentBltCopy;            /**< Transparent BLT Copy Ability */
    CSL_DmaOverlapDetection             overlapDetection;              /**< Overlap detection ability */
    CSL_DmaDirectionalBLTCopy           directionalBltCopy;            /**< Directional BLT Copy ability */
    CSL_DmaSubByteAdjustment            subByteAdjustment;             /**< Sub Byte Adjustment Ability */
    CSL_DmaOriginCoordinateCalc         originCoordinateCalc;          /**< Origin Co-ordinate Calc Ability */
    CSL_Dma1BitColourExp                bitColourExp;                  /**< 1-bit Colour expansion Ability */
    CSL_DmaSeparateSrcDstIndex          separateSrcDstIndex;           /**< Separate Source Destination Index Ability */
    CSL_DmaDstDblIndexAddr              dstDblIndexAddr;               /**< Destination Double Index Addressing Ability */
    CSL_DmaDstSnglIndexAddr             dstSnglIndexAddr;              /**< Destination Single Index Addressing Ability */
    CSL_DmaDstPostIncAddr               dstPostIncAddr;                /**< Destination Post Increment Addressing Ability */
    CSL_DmaDstConstAddr                 dstConstAddr;                  /**< Destination Constant Addressing Ability */
    CSL_DmaSrcDblIndexAddr              srcDblIndexAddr;               /**< Source Double Index Addressing Ability */ 
    CSL_DmaSrcSnglIndexAddr             srcSnglIndexAddr;              /**< Source Single Index Addressing Ability */
    CSL_DmaSrcPostIncAddr               srcPostIncAddr;                /**< Source Post Increment Addressing Ability */
    CSL_DmaSrcConstAddr                 srcConstAddr;                  /**< Source Constant Addressing Ability */
    CSL_DmaChannelChaining              channelChaining;               /**< Channel Chaining Ability */
    CSL_DmaChannelInterleave            channelInterleave;             /**< Channel Interleaving Ability */
    CSL_DmaAutoinitRepeat               autoinitRepeat;                /**< Repeat feature in Auto-Init Mode */
    CSL_DmaAutoinitEndProg              autoinitEndProg;               /**< End Prog feature in Auto-Init Mode */
    CSL_DmaFrameSync                    frameSync;                     /**< Frame Sync feature support ability */
    CSL_DmaElementSync                  elementSync;                   /**< Element Sync feature support ability */
    CSL_DmaSyncTransferStatus           syncTransferStatus;            /**< Sync Status Capability */
    CSL_DmaBlockInt                     blockInt;                      /**< Block Interrupt Generation Capability */
    CSL_DmaLastFrame                    lastFrame;                     /**< Last Frame Interrupt Generation Ability */
    CSL_DmaFrame                        frame;                         /**< Frame Interrupt Generation Ability */
    CSL_DmaHalfFrame                    halfFrame;                     /**< Half Frame Interrupt Generation Ability */
    CSL_DmaEventDrop                    eventDrop;                     /**< Even Drop Interrupt Generation Ability */
    CSL_DmaTimeout                      timeout;                       /**< Timeout Interrupt Generation Ability */
} CSL_DmaCapability;

/** @brief SoftWare Reset of DMA                                  */
typedef enum {
    CSL_DMA_SOFTWARE_RESET_DISABLE  = 0,
    CSL_DMA_SOFTWARE_RESET_ENABLE   = 1                                /**< Resets the whole DMA */
} CSL_DmaSwReset;

/** @brief OMAP Compatibility Modes                                */
typedef enum {
    CSL_DMA_OMAP31_COMPAT_MODE  = 0, /**< Compatible with OMAP3.0/3.1 DMA int line mapping and channel configuration */
    CSL_DMA_OMAP32_COMPAT_MODE  = 1  /**< Compatible with OMAP3.2 DMA int line mapping and channel configuration */
} CSL_DmaOmapCompatMode;

/** @brief Physical Channel Scheduling Scheme                       */
typedef enum {
    CSL_DMA_PCH_ROUND_ROBIN  = 0,    /**< DMA physical channel scheduler uses round robin scheduling scheme */
    CSL_DMA_PCH_FIXED_WEIGHT = 1     /**< DMA physical channel scheduler uses fixed weight scheduling scheme */
} CSL_DmaPchScheduling;

/** @brief Reaction to suspend Signal                                */
typedef enum {
    CSL_DMA_SUSPEND          = 0,    /**< DMA suspends all the current transfers on receiving suspend signal */
    CSL_DMA_IGNORE_SUSPEND   = 1     /**< DMA continues running when it receives suspend signal */ 
} CSL_DmaFree;

/** @brief Autogating feature On/Off                                 */
typedef enum {
    CSL_DMA_AUTOGATING_OFF   = 0,    /**< DMA Clock are always on */
    CSL_DMA_AUTOGATING_ON    = 1     /**< DMA cuts its clocks off according to its activity */
} CSL_DmaAutogating;

/** @brief Global Control Setup Structure
 *
 */
typedef struct CSL_DmaSetupGlobalControl {
    CSL_DmaAutogating	    autogating;    /**< Autogating Feature */
    CSL_DmaFree		    free;          /**< Reaction to suspend Signal */
    CSL_DmaPchScheduling    pChScheduling; /**< Physical Channel Scheduling */
} CSL_DmaSetupGlobalControl;

/** @brief Global Id Structure
 *
 */
typedef struct CSL_DmaGlobalId {
    Uint16              hwId;           /**< DMA Version ID Number */
    Uint16              pChPeriphId;    /**< DMA PCh-2 Version ID Number */
    Uint16              pChMem0Id;      /**< DMA PCh-0 Version ID Number */ 
    Uint16              pChMem1Id;      /**< DMA PCh-1 Version ID Number */
    Uint16              pChGraphicId;   /**< DMA PCh-G Version ID Number */
    Uint16              pChLcdId;       /**< DMA PCh-D Version ID Number */
} CSL_DmaGlobalId;

/** @brief Physical Channel Status
 *
 */
typedef struct CSL_DmaPchStatus {
    Uint16              memPch0;        /**< Active Logical Channel for PCh-0 */
    Uint16              memPch1;        /**< Active Logical Channel for PCh-1 */
    Uint16              lcdPch0;        /**< Active Logical Channel for PCh-D */
    Uint16              periphPch0;     /**< Active Logical Channel for PCh-2 */
} CSL_DmaPchStatus;

/** @brief Global Setup Structure
 *
 */
typedef struct CSL_DmaSetupGlobal {
    CSL_DmaSetupGlobalControl   *glbCtrlSetup;     /**< Pointer to Global Control Setup Structure */
    CSL_DmaOmapCompatMode        omapCompatMode;   /**< OMAP Compatibility Modes */
    CSL_DmaSwReset               swReset;          /**< Software Reset of DMA */
} CSL_DmaSetupGlobal;

#ifdef _cplusplus
}
#endif

#endif