csl_dma_global.h

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/*****************************************************\
 *  Copyright 2003, Texas Instruments Incorporated.  *
 *  All rights reserved.                             *
 *  Restricted rights to use, duplicate or disclose  *
 *  this   code   are  granted   through  contract.  *
 *                                                   *
 * "@(#) PSP/CSL  3.0.0.0  (2003-09-30)              *
\*****************************************************/

#ifndef _CSL_GLOBAL_DMA_H_
#define _CSL_GLOBAL_DMA_H_

#ifdef _cplusplus
extern "C" {
#endif

#include <csl_types.h>
#include <tistdtypes.h>
#include <cslr_dma.h>

/**************************************************************************\
* DMA global macro declarations
\**************************************************************************/
/** The default value for @a CSL_DmaCapability structure */
#define CSL_DMA_CAPABILITY_DEFAULTS {       \
   CSL_DMA_CONSTANTFILL_COPY_ENABLE,        \
   CSL_DMA_TRANSPARENT_BLT_COPY_ENABLE,     \
   CSL_DMA_OVERLAP_DETECTION_DISABLE,       \
   CSL_DMA_DIRECTIONAL_BLT_COPY_DISABLE,    \
   CSL_DMA_SUB_BYTE_ADJUSTMENT_DISABLE,     \
   CSL_DMA_ORIGIN_COORDINATE_CALC_DISABLE,  \
   CSL_DMA_1BIT_COLOUR_EXP_DISABLE,         \
   CSL_DMA_SEPARATE_SRC_DST_INDEX_ENABLE,   \
   CSL_DMA_DST_DBL_INDEX_ENABLE,            \
   CSL_DMA_DST_SNGL_INDEX_ENABLE,           \
   CSL_DMA_DST_POST_INC_ENABLE,             \
   CSL_DMA_DST_CONST_ENABLE,                \
   CSL_DMA_SRC_DBL_INDEX_ENABLE,            \
   CSL_DMA_SRC_SNGL_INDEX_ENABLE,           \
   CSL_DMA_SRC_POST_INC_ENABLE,             \
   CSL_DMA_SRC_CONST_ENABLE,                \
   CSL_DMA_CHANNEL_CHAINING_ENABLE,         \
   CSL_DMA_CHANNEL_INTERLEAVE_ENABLE,       \
   CSL_DMA_AUTOINIT_REPEAT_ENABLE,          \
   CSL_DMA_AUTOINIT_ENDPROG_ENABLE,         \
   CSL_DMA_FRAME_SYNC_ENABLE,               \
   CSL_DMA_ELEMENT_SYNC_ENABLE,             \
   CSL_DMA_SYNC_TRANSFER_STATUS_ENABLE,     \
   CSL_DMA_BLOCK_INT_ENABLE,                \
   CSL_DMA_LAST_FRAME_ENABLE,               \
   CSL_DMA_FRAME_ENABLE,                    \
   CSL_DMA_HALF_FRAME_ENABLE,               \
   CSL_DMA_EVENT_DROP_ENABLE,               \
   CSL_DMA_TIMEOUT_ENABLE                   \
}

/** The default value for @a CSL_DmaSetupGlobalControl structure */
#define CSL_DMA_SETUPGLOBALCONTROL_DEFAULTS {     \
   CSL_DMA_AUTOGATING_ON,                         \
   CSL_DMA_SUSPEND,                               \
   CSL_DMA_PCH_ROUND_ROBIN                        \
}

/** The default value for @a CSL_DmaSetupGlobal structure */
#define CSL_DMA_SETUPGLOBAL_DEFAULTS {            \
   NULL,                                          \
   CSL_DMA_OMAP31_COMPAT_MODE,                    \
   CSL_DMA_SOFTWARE_RESET_DISABLE                 \
}
/*
#define CSL_DMA_GLOBALID_DEFAULTS {         \
   CSL_DMA_HWID_HWID_RESETVAL,              \ 
   CSL_DMA_PCHPID_PCHPID_RESETVAL,          \ 
   CSL_DMA_PCHM0ID_PCHM0ID_RESETVAL,        \ 
   CSL_DMA_PCHM1ID_PCHM1ID_RESETVAL,        \ 
   CSL_DMA_PCHGID_PCHGID_RESETVAL,          \ 
   CSL_DMA_PCHDID_PCHDID_RESETVAL           \ 
}
*/

/** The default value for @a CSL_DmaGlobalId structure */
#define CSL_DMA_GLOBALID_DEFAULTS {         \
    0,                                      \
    0,                                      \
    0,                                      \
    0,                                      \
    0,                                      \
    0                                       \
}
 
/** The default value for @a CSL_DmaPchStatus structure */
#define CSL_DMA_PCHSTATUS_DEFAULTS {        \
   CSL_DMA_PCHSRM0_PCHSRM0_RESETVAL,        \
   CSL_DMA_PCHSRM1_PCHSRM1_RESETVAL,        \
   CSL_DMA_PCHSRD0_PCHSRD0_RESETVAL,        \
   CSL_DMA_PCHSRP0_PCHSRP0_RESETVAL         \
}

/**************************************************************************\
* DMA global typedef declarations
\**************************************************************************/

/* @brief Ability to support timeout interrupt
 *        generation capability 
 */
typedef enum {
  CSL_DMA_TIMEOUT_DISABLE = 0,             /**< Does not support time-out interrupt generation */
  CSL_DMA_TIMEOUT_ENABLE = 1               /**< Supports time-out interrupt generation */
} CSL_DmaTimeout;

/** @brief Ability to support event drop interrupt
 *         generation capability
 */ 
typedef enum {
  CSL_DMA_EVENT_DROP_DISABLE = 0,          /**< Does not support event drop interrupt generation */
  CSL_DMA_EVENT_DROP_ENABLE = 1            /**< Supports event drop interrupt generation */
} CSL_DmaEventDrop;

/** @brief Ability to support half frame interrupt
 *   generation capability
 */ 
typedef enum {
  CSL_DMA_HALF_FRAME_DISABLE = 0,          /**< Does not support half-frame interrupt generation */
  CSL_DMA_HALF_FRAME_ENABLE = 1            /**< Supports half-frame interrupt generation */
} CSL_DmaHalfFrame;

/** @brief Ability to support frame interrupt
 *         generation capability
 */ 
typedef enum {
  CSL_DMA_FRAME_DISABLE = 0,               /**< Does not support frame interrupt generation */
  CSL_DMA_FRAME_ENABLE = 1                 /**< Supports frame interrupt generation */
} CSL_DmaFrame;

/** @brief Ability to support last frame interrupt
 *   generation capability
 */ 
typedef enum {
  CSL_DMA_LAST_FRAME_DISABLE = 0,          /**< Does not support last frame interrupt generation */
  CSL_DMA_LAST_FRAME_ENABLE = 1            /**< Supports last frame interrupt generation */
} CSL_DmaLastFrame;

/** @brief Ability to support block interrupt
 *   generation capability
 */ 
typedef enum {
  CSL_DMA_BLOCK_INT_DISABLE = 0,           /**< Does not support block interrupt generation */
  CSL_DMA_BLOCK_INT_ENABLE = 1             /**< Supports block interrupt generation */
} CSL_DmaBlockInt;

/** @brief Ability to support sync status capability */ 
typedef enum {
  CSL_DMA_SYNC_TRANSFER_STATUS_DISABLE = 0,  /**< Does not support sync transfer status bit generation */
  CSL_DMA_SYNC_TRANSFER_STATUS_ENABLE = 1    /**< Supports sync transfer status bit generation */
} CSL_DmaSyncTransferStatus;

/** @brief Ability to support element-sync feature   */ 
typedef enum {
  CSL_DMA_ELEMENT_SYNC_DISABLE = 0,          /**< Does not support sync transfer on element boundary */
  CSL_DMA_ELEMENT_SYNC_ENABLE = 1            /**< Supports sync transfer on element boundary */
} CSL_DmaElementSync;

/** @brief Ability to support frame-sync feature      */ 
typedef enum {
  CSL_DMA_FRAME_SYNC_DISABLE = 0,            /**< Does not support sync transfer on frame boundary */
  CSL_DMA_FRAME_SYNC_ENABLE = 1              /**< Supports sync transfer on frame boundar */
} CSL_DmaFrameSync;

/** @brief Ability to support end-prog feature in autoinit mode */ 
typedef enum {
  CSL_DMA_AUTOINIT_ENDPROG_DISABLE = 0,      /**< Does not support end_prog feature in auto-init mode */
  CSL_DMA_AUTOINIT_ENDPROG_ENABLE = 1        /**< Supports end_prog feature in auto-init mode */
} CSL_DmaAutoinitEndProg;

/** @brief Ability to support repeat feature in autoinit mode */ 
typedef enum {
  CSL_DMA_AUTOINIT_REPEAT_DISABLE = 0,       /**< Does not support repeat feature in auto-init mode */
  CSL_DMA_AUTOINIT_REPEAT_ENABLE = 1         /**< Supports repeat feature in auto-init mode */
} CSL_DmaAutoinitRepeat;

/** @brief Ability to support logical channel interleaving */ 
typedef enum {
  CSL_DMA_CHANNEL_INTERLEAVE_DISABLE = 0,    /**< Does not support logical channel interleave capability */
  CSL_DMA_CHANNEL_INTERLEAVE_ENABLE = 1      /**< Supports logical channel interleave capability */
} CSL_DmaChannelInterleave;

/** @brief Ability to support logical channel chaining */ 
typedef enum {
  CSL_DMA_CHANNEL_CHAINING_DISABLE = 0,      /**< Does not support logical channel chaining capability */
  CSL_DMA_CHANNEL_CHAINING_ENABLE = 1        /**< Supports logical channel chaining capability */
} CSL_DmaChannelChaining;

/** @brief Ability to support constant addressing at source port */ 
typedef enum {
  CSL_DMA_SRC_CONST_DISABLE = 0,             /**< Does not support constant addressing at source port */
  CSL_DMA_SRC_CONST_ENABLE = 1               /**< Supports constant addressing at source port */
} CSL_DmaSrcConstAddr;

/** @breif Ability to support post increment addressing at source port */ 
typedef enum {