📄 cslr_vlynq.h
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/* RAMO3 */
#define CSL_VLYNQ_RAMO3_RXADROFFSET3_MASK (0xFFFFFFFCu)
#define CSL_VLYNQ_RAMO3_RXADROFFSET3_SHIFT (0x00000002u)
#define CSL_VLYNQ_RAMO3_RXADROFFSET3_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RAMO3_RESETVAL (0x00000000u)
/* RAMS4 */
#define CSL_VLYNQ_RAMS4_RXADRSIZE4_MASK (0xFFFFFFFCu)
#define CSL_VLYNQ_RAMS4_RXADRSIZE4_SHIFT (0x00000002u)
#define CSL_VLYNQ_RAMS4_RXADRSIZE4_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RAMS4_RESETVAL (0x00000000u)
/* RAMO4 */
#define CSL_VLYNQ_RAMO4_RXADROFFSET4_MASK (0xFFFFFFFCu)
#define CSL_VLYNQ_RAMO4_RXADROFFSET4_SHIFT (0x00000002u)
#define CSL_VLYNQ_RAMO4_RXADROFFSET4_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RAMO4_RESETVAL (0x00000000u)
/* CHIPVER */
#define CSL_VLYNQ_CHIPVER_DEVREV_MASK (0xFFFF0000u)
#define CSL_VLYNQ_CHIPVER_DEVREV_SHIFT (0x00000010u)
#define CSL_VLYNQ_CHIPVER_DEVREV_RESETVAL (0x00000000u)
#define CSL_VLYNQ_CHIPVER_DEVID_MASK (0x0000FFFFu)
#define CSL_VLYNQ_CHIPVER_DEVID_SHIFT (0x00000000u)
#define CSL_VLYNQ_CHIPVER_DEVID_RESETVAL (0x00000000u)
#define CSL_VLYNQ_CHIPVER_RESETVAL (0x00000000u)
/* RREVID */
#define CSL_VLYNQ_RREVID_ID_MASK (0xFFFF0000u)
#define CSL_VLYNQ_RREVID_ID_SHIFT (0x00000010u)
#define CSL_VLYNQ_RREVID_ID_RESETVAL (0x00000001u)
#define CSL_VLYNQ_RREVID_REVMAJ_MASK (0x0000FF00u)
#define CSL_VLYNQ_RREVID_REVMAJ_SHIFT (0x00000008u)
#define CSL_VLYNQ_RREVID_REVMAJ_RESETVAL (0x00000002u)
#define CSL_VLYNQ_RREVID_REVMIN_MASK (0x000000FFu)
#define CSL_VLYNQ_RREVID_REVMIN_SHIFT (0x00000000u)
#define CSL_VLYNQ_RREVID_REVMIN_RESETVAL (0x00000005u)
#define CSL_VLYNQ_RREVID_RESETVAL (0x00010205u)
/* RCTRL */
#define CSL_VLYNQ_RCTRL_CLKDIV_MASK (0x00070000u)
#define CSL_VLYNQ_RCTRL_CLKDIV_SHIFT (0x00000010u)
#define CSL_VLYNQ_RCTRL_CLKDIV_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RCTRL_CLKDIV_ONE (0x00000000u)
#define CSL_VLYNQ_RCTRL_CLKDIV_TWO (0x00000001u)
#define CSL_VLYNQ_RCTRL_CLKDIV_THREE (0x00000002u)
#define CSL_VLYNQ_RCTRL_CLKDIV_FOUR (0x00000003u)
#define CSL_VLYNQ_RCTRL_CLKDIV_FIVE (0x00000004u)
#define CSL_VLYNQ_RCTRL_CLKDIV_SIX (0x00000005u)
#define CSL_VLYNQ_RCTRL_CLKDIV_SEVEN (0x00000006u)
#define CSL_VLYNQ_RCTRL_CLKDIV_EIGHT (0x00000007u)
#define CSL_VLYNQ_RCTRL_CLKDIR_MASK (0x00008000u)
#define CSL_VLYNQ_RCTRL_CLKDIR_SHIFT (0x0000000Fu)
#define CSL_VLYNQ_RCTRL_CLKDIR_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RCTRL_CLKDIR_INPUT (0x00000000u)
#define CSL_VLYNQ_RCTRL_CLKDIR_OUTPUT (0x00000001u)
#define CSL_VLYNQ_RCTRL_INTLOCAL_MASK (0x00004000u)
#define CSL_VLYNQ_RCTRL_INTLOCAL_SHIFT (0x0000000Eu)
#define CSL_VLYNQ_RCTRL_INTLOCAL_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RCTRL_INTLOCAL_REMOTE (0x00000000u)
#define CSL_VLYNQ_RCTRL_INTLOCAL_LOCAL (0x00000001u)
#define CSL_VLYNQ_RCTRL_INTENABLE_MASK (0x00002000u)
#define CSL_VLYNQ_RCTRL_INTENABLE_SHIFT (0x0000000Du)
#define CSL_VLYNQ_RCTRL_INTENABLE_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RCTRL_INTENABLE_DISABLE (0x00000000u)
#define CSL_VLYNQ_RCTRL_INTENABLE_ENABLE (0x00000001u)
#define CSL_VLYNQ_RCTRL_INTVEC_MASK (0x00001F00u)
#define CSL_VLYNQ_RCTRL_INTVEC_SHIFT (0x00000008u)
#define CSL_VLYNQ_RCTRL_INTVEC_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RCTRL_INT2CFG_MASK (0x00000080u)
#define CSL_VLYNQ_RCTRL_INT2CFG_SHIFT (0x00000007u)
#define CSL_VLYNQ_RCTRL_INT2CFG_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RCTRL_INT2CFG_DISABLE (0x00000000u)
#define CSL_VLYNQ_RCTRL_INT2CFG_ENABLE (0x00000001u)
#define CSL_VLYNQ_RCTRL_ILOOP_MASK (0x00000002u)
#define CSL_VLYNQ_RCTRL_ILOOP_SHIFT (0x00000001u)
#define CSL_VLYNQ_RCTRL_ILOOP_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RCTRL_ILOOP_DISABLE (0x00000000u)
#define CSL_VLYNQ_RCTRL_ILOOP_ENABLE (0x00000001u)
#define CSL_VLYNQ_RCTRL_RESETVAL (0x00000000u)
/* RSTAT */
#define CSL_VLYNQ_RSTAT_SWIDTH_MASK (0x07000000u)
#define CSL_VLYNQ_RSTAT_SWIDTH_SHIFT (0x00000018u)
#define CSL_VLYNQ_RSTAT_SWIDTH_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RSTAT_MODESUP_MASK (0x00E0000u)
#define CSL_VLYNQ_RSTAT_MODESUP_SHIFT (0x00000015u)
#define CSL_VLYNQ_RSTAT_MODESUP_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RSTAT_IFLOW_MASK (0x00000400u)
#define CSL_VLYNQ_RSTAT_IFLOW_SHIFT (0x0000000Au)
#define CSL_VLYNQ_RSTAT_IFLOW_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RSTAT_OFLOW_MASK (0x00000200u)
#define CSL_VLYNQ_RSTAT_OFLOW_SHIFT (0x00000009u)
#define CSL_VLYNQ_RSTAT_OFLOW_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RSTAT_RERROR_MASK (0x00000100u)
#define CSL_VLYNQ_RSTAT_RERROR_SHIFT (0x00000008u)
#define CSL_VLYNQ_RSTAT_RERROR_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RSTAT_LERROR_MASK (0x00000080u)
#define CSL_VLYNQ_RSTAT_LERROR_SHIFT (0x00000007u)
#define CSL_VLYNQ_RSTAT_LERROR_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RSTAT_NFEMPTY3_MASK (0x00000040u)
#define CSL_VLYNQ_RSTAT_NFEMPTY3_SHIFT (0x00000006u)
#define CSL_VLYNQ_RSTAT_NFEMPTY3_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RSTAT_NFEMPTY2_MASK (0x00000020u)
#define CSL_VLYNQ_RSTAT_NFEMPTY2_SHIFT (0x00000005u)
#define CSL_VLYNQ_RSTAT_NFEMPTY2_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RSTAT_NFEMPTY1_MASK (0x00000010u)
#define CSL_VLYNQ_RSTAT_NFEMPTY1_SHIFT (0x00000004u)
#define CSL_VLYNQ_RSTAT_NFEMPTY1_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RSTAT_NFEMPTY0_MASK (0x00000008u)
#define CSL_VLYNQ_RSTAT_NFEMPTY0_SHIFT (0x00000003u)
#define CSL_VLYNQ_RSTAT_NFEMPTY0_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RSTAT_SPEND_MASK (0x00000004u)
#define CSL_VLYNQ_RSTAT_SPEND_SHIFT (0x00000002u)
#define CSL_VLYNQ_RSTAT_SPEND_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RSTAT_MPEND_MASK (0x00000002u)
#define CSL_VLYNQ_RSTAT_MPEND_SHIFT (0x00000001u)
#define CSL_VLYNQ_RSTAT_MPEND_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RSTAT_LINK_MASK (0x00000001u)
#define CSL_VLYNQ_RSTAT_LINK_SHIFT (0x00000000u)
#define CSL_VLYNQ_RSTAT_LINK_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RSTAT_RESETVAL (0x00000000u)
/* RINTSTATCLR */
#define CSL_VLYNQ_RINTSTATCLR_INTCLR_MASK (0xFFFFFFFFu)
#define CSL_VLYNQ_RINTSTATCLR_INTCLR_SHIFT (0x00000000u)
#define CSL_VLYNQ_RINTSTATCLR_INTCLR_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RINTSTATCLR_RESETVAL (0x00000000u)
/* RINTPENDSET */
#define CSL_VLYNQ_RINTPENDSET_INTSET_MASK (0xFFFFFFFFu)
#define CSL_VLYNQ_RINTPENDSET_INTSET_SHIFT (0x00000000u)
#define CSL_VLYNQ_RINTPENDSET_INTSET_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RINTPENDSET_RESETVAL (0x00000000u)
/* RINTPTR */
#define CSL_VLYNQ_RINTPTR_INTPTR_MASK (0xFFFFFFFCu)
#define CSL_VLYNQ_RINTPTR_INTPTR_SHIFT (0x00000002u)
#define CSL_VLYNQ_RINTPTR_INTPTR_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RINTPTR_RESETVAL (0x00000000u)
/* RXAM */
#define CSL_VLYNQ_RXAM_TXADRMAP_MASK (0xFFFFFFFCu)
#define CSL_VLYNQ_RXAM_TXADRMAP_SHIFT (0x00000002u)
#define CSL_VLYNQ_RXAM_TXADRMAP_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RXAM_RESETVAL (0x00000000u)
/* RRAMS1 */
#define CSL_VLYNQ_RRAMS1_RXADRSIZE1_MASK (0xFFFFFFFCu)
#define CSL_VLYNQ_RRAMS1_RXADRSIZE1_SHIFT (0x00000002u)
#define CSL_VLYNQ_RRAMS1_RXADRSIZE1_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RRAMS1_RESETVAL (0x00000000u)
/* RRAMO1 */
#define CSL_VLYNQ_RRAMO1_RXADROFFSET1_MASK (0xFFFFFFFCu)
#define CSL_VLYNQ_RRAMO1_RXADROFFSET1_SHIFT (0x00000002u)
#define CSL_VLYNQ_RRAMO1_RXADROFFSET1_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RRAMO1_RESETVAL (0x00000000u)
/* RRAMS2 */
#define CSL_VLYNQ_RRAMS2_RXADRSIZE2_MASK (0xFFFFFFFCu)
#define CSL_VLYNQ_RRAMS2_RXADRSIZE2_SHIFT (0x00000002u)
#define CSL_VLYNQ_RRAMS2_RXADRSIZE2_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RRAMS2_RESETVAL (0x00000000u)
/* RRAMO2 */
#define CSL_VLYNQ_RRAMO2_RXADROFFSET2_MASK (0xFFFFFFFCu)
#define CSL_VLYNQ_RRAMO2_RXADROFFSET2_SHIFT (0x00000002u)
#define CSL_VLYNQ_RRAMO2_RXADROFFSET2_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RRAMO2_RESETVAL (0x00000000u)
/* RRAMS3 */
#define CSL_VLYNQ_RRAMS3_RXADRSIZE3_MASK (0xFFFFFFFCu)
#define CSL_VLYNQ_RRAMS3_RXADRSIZE3_SHIFT (0x00000002u)
#define CSL_VLYNQ_RRAMS3_RXADRSIZE3_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RRAMS3_RESETVAL (0x00000000u)
/* RRAMO3 */
#define CSL_VLYNQ_RRAMO3_RXADROFFSET3_MASK (0xFFFFFFFCu)
#define CSL_VLYNQ_RRAMO3_RXADROFFSET3_SHIFT (0x00000002u)
#define CSL_VLYNQ_RRAMO3_RXADROFFSET3_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RRAMO3_RESETVAL (0x00000000u)
/* RRAMS4 */
#define CSL_VLYNQ_RRAMS4_RXADRSIZE4_MASK (0xFFFFFFFCu)
#define CSL_VLYNQ_RRAMS4_RXADRSIZE4_SHIFT (0x00000002u)
#define CSL_VLYNQ_RRAMS4_RXADRSIZE4_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RRAMS4_RESETVAL (0x00000000u)
/* RRAMO4 */
#define CSL_VLYNQ_RRAMO4_RXADROFFSET4_MASK (0xFFFFFFFCu)
#define CSL_VLYNQ_RRAMO4_RXADROFFSET4_SHIFT (0x00000002u)
#define CSL_VLYNQ_RRAMO4_RXADROFFSET4_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RRAMO4_RESETVAL (0x00000000u)
/* RCHIPVER */
#define CSL_VLYNQ_RCHIPVER_DEVREV_MASK (0xFFFF0000u)
#define CSL_VLYNQ_RCHIPVER_DEVREV_SHIFT (0x00000010u)
#define CSL_VLYNQ_RCHIPVER_DEVREV_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RCHIPVER_DEVID_MASK (0x0000FFFFu)
#define CSL_VLYNQ_RCHIPVER_DEVID_SHIFT (0x00000000u)
#define CSL_VLYNQ_RCHIPVER_DEVID_RESETVAL (0x00000000u)
#define CSL_VLYNQ_RCHIPVER_RESETVAL (0x00000000u)
/* CONFIG */
#define CSL_VLYNQ_CONFIG_IE_MASK (0x00000010u)
#define CSL_VLYNQ_CONFIG_IE_SHIFT (0x00000004u)
#define CSL_VLYNQ_CONFIG_IE_RESETVAL (0x00000000u)
#define CSL_VLYNQ_CONFIG_BSWTH_MASK (0x00000002u)
#define CSL_VLYNQ_CONFIG_BSWTH_SHIFT (0x00000001u)
#define CSL_VLYNQ_CONFIG_BSWTH_RESETVAL (0x00000000u)
#define CSL_VLYNQ_CONFIG_SW_RST_MASK (0x00000001u)
#define CSL_VLYNQ_CONFIG_SW_RST_SHIFT (0x00000000u)
#define CSL_VLYNQ_CONFIG_SW_RST_RESETVAL (0x00000001u)
#define CSL_VLYNQ_CONFIG_RESETVAL (0x00000001u)
/* ADDR_FAULT */
#define CSL_VLYNQ_ADDR_FAULT_ADDR_MASK (0xFFFFFFFCu)
#define CSL_VLYNQ_ADDR_FAULT_ADDR_SHIFT (0x00000002u)
#define CSL_VLYNQ_ADDR_FAULT_ADDR_RESETVAL (0x00000000u)
#define CSL_VLYNQ_ADDR_FAULT_ET_MASK (0x00000002u)
#define CSL_VLYNQ_ADDR_FAULT_ET_SHIFT (0x00000001u)
#define CSL_VLYNQ_ADDR_FAULT_ET_RESETVAL (0x00000000u)
#define CSL_VLYNQ_ADDR_FAULT_ERR_MASK (0x00000001u)
#define CSL_VLYNQ_ADDR_FAULT_ERR_SHIFT (0x00000000u)
#define CSL_VLYNQ_ADDR_FAULT_ERR_RESETVAL (0x00000000u)
#define CSL_VLYNQ_ADDR_FAULT_RESETVAL (0x00000000u)
/* BUSY */
#define CSL_VLYNQ_BUSY_PD_MASK (0x00000001u)
#define CSL_VLYNQ_BUSY_PD_SHIFT (0x00000000u)
#define CSL_VLYNQ_BUSY_PD_RESETVAL (0x00000000u)
#define CSL_VLYNQ_BUSY_RESETVAL (0x00000000u)
/* DMAREQ_EN */
#define CSL_VLYNQ_DMAREQ_EN_DR_MASK (0x00000001u)
#define CSL_VLYNQ_DMAREQ_EN_DR_SHIFT (0x00000000u)
#define CSL_VLYNQ_DMAREQ_EN_DR_RESETVAL (0x00000000u)
#define CSL_VLYNQ_DMAREQ_EN_RESETVAL (0x00000000u)
#endif /* _CSLR_VLYNQ_H_ */
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