📄 csl_hdq1waux.h
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/** ============================================================================
* @file csl_hdq1wAux.h
*
* @path $(CSLPATH)\arm\hdq1w\inc
*
* @desc API header for HDQ1W
*
*/
/* =============================================================================
* Copyright (c) Texas Instruments Inc 2002, 2003, 2004
*
* Use of this software is controlled by the terms and conditions found in the
* license agreement under which this software has been supplied.
* ============================================================================
*/
/* @(#) PSP/CSL 3.00.01.00[5912] (2004-08-04) */
/* =============================================================================
* Revision History
* ================
* 04-Aug-2004 sp File Created.
*
* =============================================================================
*/
#ifndef _CSL_HDQ1WAUX_H_
#define _CSL_HDQ1WAUX_H_
#include <csl_hdq1w.h>
#ifdef _cplusplus
extern "C" {
#endif
/**
* =============================================================================
* @n@b CSL_hdq1wGetGobitStatus
*
* @b Description
* @n This function fetches the status of the Go bit, which is used to send
* the appropriate command.
*
* @b Arguments
@verbatim
hHdq1w Handle to the HDQ1W instance
@endverbatim
*
* <b>Return Value </b> Bool
* @li TRUE - The set command has not completed
* @li FALSE - The previous command is completed
*
* <b>Pre Condition </b>
* @n Both CSL_hdq1wInit() and CSL_hdq1wOpen() must be called successfully in
* that order before calling this function.
*
* <b>Post Condition </b>
* @n None
*
* @b Modifies
* @n None
*
* @b Example
* @verbatim
Bool value;
value = CSL_hdq1wGetGobitStatus (hHdq1w);
@endverbatim
* =============================================================================
*/
static inline
Bool CSL_hdq1wGetGobitStatus (
CSL_Hdq1wHandle hHdq1w
)
{
Bool status;
status = (Bool)CSL_FEXT(hHdq1w->regs->HDQ1W_CTRL, HDQ1W_HDQ1W_CTRL_GB);
return status;
}
/**
* =============================================================================
* @n@b CSL_hdq1wGetInitPulseStatus
*
* @b Description
* @n This function fetches the status of the intialisation pulse bit.
*
* @b Arguments
@verbatim
hHdq1w Handle to the HDQ1W instance
@endverbatim
*
* <b>Return Value </b> Bool
* @li TRUE - The initialization pulse bit is set
* @li FALSE - The initialization pulse bit is reset
*
* <b>Pre Condition </b>
* @n Both CSL_hdq1wInit() and CSL_hdq1wOpen() must be called successfully in
* that order before calling this function.
*
* <b>Post Condition </b>
* @n None
*
* @b Modifies
* @n None
*
* @b Example
* @verbatim
Bool value;
value = CSL_hdq1wGetInitPulseStatus (hHdq1w);
@endverbatim
* =============================================================================
*/
static inline
Bool CSL_hdq1wGetInitPulseStatus (
CSL_Hdq1wHandle hHdq1w
)
{
Bool status;
status = (Bool)CSL_FEXT(hHdq1w->regs->HDQ1W_CTRL, HDQ1W_HDQ1W_CTRL_IP);
return status;
}
/**
* =============================================================================
* @n@b CSL_hdq1wGetSlvPresDetectStatus
*
* @b Description
* @n This function fetches the slave presence detect status.
*
* @b Arguments
@verbatim
hHdq1w Handle to the HDQ1W instance
@endverbatim
*
* <b>Return Value </b> Bool
* @li TRUE - Slave presence detected
* @li FALSE - Slave not detected
*
* <b>Pre Condition </b>
* @n Both CSL_hdq1wInit() and CSL_hdq1wOpen() must be called successfully in
* that order before calling this function.
*
* <b>Post Condition </b>
* @n None
*
* @b Modifies
* @n None
*
* @b Example
* @verbatim
Bool value;
value = CSL_hdq1wGetSlvPresDetectStatus (hHdq1w);
@endverbatim
* =============================================================================
*/
static inline
Bool CSL_hdq1wGetSlvPresDetectStatus (
CSL_Hdq1wHandle hHdq1w
)
{
Bool status;
status = (Bool) CSL_FEXT (hHdq1w->regs->HDQ1W_CTRL, HDQ1W_HDQ1W_CTRL_PD);
return status;
}
/**
* =============================================================================
* @n@b CSL_hdq1wGetTxIntrStatus
*
* @b Description
* @n This function fetches the status of the transmit interrupt.
*
* @b Arguments
@verbatim
hHdq1w Handle to the HDQ1W instance
@endverbatim
*
* <b>Return Value </b> Bool
* @li TRUE - Transmit complete
* @li FALSE - Transmit not complete
*
* <b>Pre Condition </b>
* @n Both CSL_hdq1wInit() and CSL_hdq1wOpen() must be called successfully in
* that order before calling this function.
*
* <b>Post Condition </b>
* @n None
*
* @b Modifies
* @n None
*
* @b Example
* @verbatim
Bool value;
value = CSL_hdq1wGetTxIntrStatus (hHdq1w);
@endverbatim
* =============================================================================
*/
static inline
Bool CSL_hdq1wGetTxIntrStatus (
CSL_Hdq1wHandle hHdq1w
)
{
Bool status;
status = (Bool) CSL_FEXT (hHdq1w->regs->HDQ1W_INTS, HDQ1W_HDQ1W_INTS_TC);
return status;
}
/**
* =============================================================================
* @n@b CSL_hdq1wGetRxIntrStatus
*
* @b Description
* @n This function fetches the status of the read interrupt.
*
* @b Arguments
@verbatim
hHdq1w Handle to the HDQ1W instance
@endverbatim
*
* <b>Return Value </b> Bool
* @li TRUE - Read complete
* @li FALSE - Read not complete
*
* <b>Pre Condition </b>
* @n Both CSL_hdq1wInit() and CSL_hdq1wOpen() must be called successfully in
* that order before calling this function.
*
* <b>Post Condition </b>
* @n None
*
* @b Modifies
* @n None
*
* @b Example
* @verbatim
Bool value;
value = CSL_hdq1wGetRxIntrStatus (hHdq1w);
@endverbatim
* =============================================================================
*/
static inline
Bool CSL_hdq1wGetRxIntrStatus (
CSL_Hdq1wHandle hHdq1w
)
{
Bool status;
status = (Bool) CSL_FEXT (hHdq1w->regs->HDQ1W_INTS, HDQ1W_HDQ1W_INTS_RC);
return status;
}
/**
* =============================================================================
* @n@b CSL_hdq1wGetDetectTimeoutStatus
*
* @b Description
* @n This function fetches the slave detect status in 1-Wire mode and
* timeout on read status in HDQ mode.
*
* @b Arguments
@verbatim
hHdq1w Handle to the HDQ1W instance
@endverbatim
*
* <b>Return Value </b> Bool
* @li TRUE - Slave detected in 1-Wire mode and timeout on read in HDQ
* mode
* @li FALSE - Slave not detected in 1-Wire mode and no timeout on read in
* HDW mode
*
* <b>Pre Condition </b>
* @n Both CSL_hdq1wInit() and CSL_hdq1wOpen() must be called successfully in
* that order before calling this function.
*
* <b>Post Condition </b>
* @n None
*
* @b Modifies
* @n None
*
* @b Example
* @verbatim
Bool value;
value = CSL_hdq1wGetDetectTimeoutStatus (hHdq1w);
@endverbatim
* =============================================================================
*/
static inline
Bool CSL_hdq1wGetDetectTimeoutStatus (
CSL_Hdq1wHandle hHdq1w
)
{
Bool status;
status = (Bool) CSL_FEXT (hHdq1w->regs->HDQ1W_INTS, HDQ1W_HDQ1W_INTS_DTO);
return status;
}
/**
* =============================================================================
* @n@b CSL_hdq1wGetRxData
*
* @b Description
* @n This function reads the data form the receive buffer register.
*
* @b Arguments
@verbatim
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