📄 cslr_irda.h
字号:
#define CSL_IRDA_RESUME_RESETVAL (0x00000000u)/* TXFLH */#define CSL_IRDA_TXFLH_TXFLH_MASK (0x0000000Fu)#define CSL_IRDA_TXFLH_TXFLH_SHIFT (0x00000000u)#define CSL_IRDA_TXFLH_TXFLH_RESETVAL (0x00000000u)#define CSL_IRDA_TXFLH_RESETVAL (0x00000000u)/* SFREGL_RXFLL */#define CSL_IRDA_SFREGL_RXFLL_SFREGL_RXFLL_MASK (0x000000FFu)#define CSL_IRDA_SFREGL_RXFLL_SFREGL_RXFLL_SHIFT (0x00000000u)#define CSL_IRDA_SFREGL_RXFLL_SFREGL_RXFLL_RESETVAL (0x00000000u)#define CSL_IRDA_SFREGL_RXFLL_RESETVAL (0x00000000u)/* SFREGL */#define CSL_IRDA_SFREGL_SFREGL_MASK (0x000000FFu)#define CSL_IRDA_SFREGL_SFREGL_SHIFT (0x00000000u)#define CSL_IRDA_SFREGL_SFREGL_RESETVAL (0x00000000u)#define CSL_IRDA_SFREGL_RESETVAL (0x00000000u)/* RXFLL */#define CSL_IRDA_RXFLL_RXFLL_MASK (0x000000FFu)#define CSL_IRDA_RXFLL_RXFLL_SHIFT (0x00000000u)#define CSL_IRDA_RXFLL_RXFLL_RESETVAL (0x00000000u)#define CSL_IRDA_RXFLL_RESETVAL (0x00000000u)/* SFREGH_RXFLH */#define CSL_IRDA_SFREGH_RXFLH_SFREGH_RXFLH_MASK (0x000000FFu)#define CSL_IRDA_SFREGH_RXFLH_SFREGH_RXFLH_SHIFT (0x00000000u)#define CSL_IRDA_SFREGH_RXFLH_SFREGH_RXFLH_RESETVAL (0x00000000u)#define CSL_IRDA_SFREGH_RXFLH_RESETVAL (0x00000000u)/* RXFLH */#define CSL_IRDA_RXFLH_RXFLH_MASK (0x0000000Fu)#define CSL_IRDA_RXFLH_RXFLH_SHIFT (0x00000000u)#define CSL_IRDA_RXFLH_RXFLH_RESETVAL (0x00000000u)#define CSL_IRDA_RXFLH_RESETVAL (0x00000000u)/* SFREGH */#define CSL_IRDA_SFREGH_SFREGH_MASK (0x0000000Fu)#define CSL_IRDA_SFREGH_SFREGH_SHIFT (0x00000000u)#define CSL_IRDA_SFREGH_SFREGH_RESETVAL (0x00000000u)#define CSL_IRDA_SFREGH_RESETVAL (0x00000000u)/* BLR */#define CSL_IRDA_BLR_STS_FIFO_RESET_MASK (0x00000080u)#define CSL_IRDA_BLR_STS_FIFO_RESET_SHIFT (0x00000007u)#define CSL_IRDA_BLR_STS_FIFO_RESET_RESETVAL (0x00000000u)#define CSL_IRDA_BLR_STS_FIFO_RESET_DISABLE (0x00000000u)#define CSL_IRDA_BLR_STS_FIFO_RESET_ENABLE (0x00000001u)#define CSL_IRDA_BLR_XBOF_TYPE_MASK (0x00000040u)#define CSL_IRDA_BLR_XBOF_TYPE_SHIFT (0x00000006u)#define CSL_IRDA_BLR_XBOF_TYPE_RESETVAL (0x00000001u)#define CSL_IRDA_BLR_XBOF_TYPE_0XFF (0x00000000u)#define CSL_IRDA_BLR_XBOF_TYPE_0XC0 (0x00000001u)#define CSL_IRDA_BLR_RESETVAL (0x00000040u)/* ACREG */#define CSL_IRDA_ACREG_PULSE_TYPE_MASK (0x00000080u)#define CSL_IRDA_ACREG_PULSE_TYPE_SHIFT (0x00000007u)#define CSL_IRDA_ACREG_PULSE_TYPE_RESETVAL (0x00000000u)#define CSL_IRDA_ACREG_PULSE_TYPE_3_16 (0x00000000u)#define CSL_IRDA_ACREG_PULSE_TYPE_16US (0x00000001u)#define CSL_IRDA_ACREG_SD_MOD_MASK (0x00000040u)#define CSL_IRDA_ACREG_SD_MOD_SHIFT (0x00000006u)#define CSL_IRDA_ACREG_SD_MOD_RESETVAL (0x00000000u)#define CSL_IRDA_ACREG_SD_MOD_HIGH (0x00000000u)#define CSL_IRDA_ACREG_SD_MOD_LOW (0x00000001u)#define CSL_IRDA_ACREG_DIS_IR_RX_MASK (0x00000020u)#define CSL_IRDA_ACREG_DIS_IR_RX_SHIFT (0x00000005u)#define CSL_IRDA_ACREG_DIS_IR_RX_RESETVAL (0x00000000u)#define CSL_IRDA_ACREG_DIS_IR_RX_DISABLE (0x00000000u)#define CSL_IRDA_ACREG_DIS_IR_RX_ENABLE (0x00000001u)#define CSL_IRDA_ACREG_DIS_TX_UNDERRUN_MASK (0x00000010u)#define CSL_IRDA_ACREG_DIS_TX_UNDERRUN_SHIFT (0x00000004u)#define CSL_IRDA_ACREG_DIS_TX_UNDERRUN_RESETVAL (0x00000000u)#define CSL_IRDA_ACREG_DIS_TX_UNDERRUN_DISABLE (0x00000000u)#define CSL_IRDA_ACREG_DIS_TX_UNDERRUN_ENABLE (0x00000001u)#define CSL_IRDA_ACREG_SEND_SIP_MASK (0x00000008u)#define CSL_IRDA_ACREG_SEND_SIP_SHIFT (0x00000003u)#define CSL_IRDA_ACREG_SEND_SIP_RESETVAL (0x00000000u)#define CSL_IRDA_ACREG_SEND_SIP_NONE (0x00000000u)#define CSL_IRDA_ACREG_SEND_SIP_SEND (0x00000001u)#define CSL_IRDA_ACREG_SCTX_EN_MASK (0x00000004u)#define CSL_IRDA_ACREG_SCTX_EN_SHIFT (0x00000002u)#define CSL_IRDA_ACREG_SCTX_EN_RESETVAL (0x00000000u)#define CSL_IRDA_ACREG_SCTX_EN_SET (0x00000001u)#define CSL_IRDA_ACREG_ABORT_EN_MASK (0x00000002u)#define CSL_IRDA_ACREG_ABORT_EN_SHIFT (0x00000001u)#define CSL_IRDA_ACREG_ABORT_EN_RESETVAL (0x00000000u)#define CSL_IRDA_ACREG_ABORT_EN_ABORT (0x00000001u)#define CSL_IRDA_ACREG_EOT_EN_MASK (0x00000001u)#define CSL_IRDA_ACREG_EOT_EN_SHIFT (0x00000000u)#define CSL_IRDA_ACREG_EOT_EN_RESETVAL (0x00000000u)#define CSL_IRDA_ACREG_EOT_EN_END (0x00000001u)#define CSL_IRDA_ACREG_RESETVAL (0x00000000u)/* SCR */#define CSL_IRDA_SCR_RX_TRIG_GRANU1_MASK (0x00000080u)#define CSL_IRDA_SCR_RX_TRIG_GRANU1_SHIFT (0x00000007u)#define CSL_IRDA_SCR_RX_TRIG_GRANU1_RESETVAL (0x00000000u)#define CSL_IRDA_SCR_RX_TRIG_GRANU1_DISABLE (0x00000000u)#define CSL_IRDA_SCR_RX_TRIG_GRANU1_ENABLE (0x00000001u)#define CSL_IRDA_SCR_TX_TRIG_GRANU1_MASK (0x00000040u)#define CSL_IRDA_SCR_TX_TRIG_GRANU1_SHIFT (0x00000006u)#define CSL_IRDA_SCR_TX_TRIG_GRANU1_RESETVAL (0x00000000u)#define CSL_IRDA_SCR_TX_TRIG_GRANU1_DISABLE (0x00000000u)#define CSL_IRDA_SCR_TX_TRIG_GRANU1_ENABLE (0x00000001u)#define CSL_IRDA_SCR_DSR_IT_MASK (0x00000020u)#define CSL_IRDA_SCR_DSR_IT_SHIFT (0x00000005u)#define CSL_IRDA_SCR_DSR_IT_RESETVAL (0x00000000u)#define CSL_IRDA_SCR_DSR_IT_DISABLE (0x00000000u)#define CSL_IRDA_SCR_DSR_IT_ENABLE (0x00000001u)#define CSL_IRDA_SCR_RX_CTS_DSR_WAKE_UP_ENABLE_MASK (0x00000010u)#define CSL_IRDA_SCR_RX_CTS_DSR_WAKE_UP_ENABLE_SHIFT (0x00000004u)#define CSL_IRDA_SCR_RX_CTS_DSR_WAKE_UP_ENABLE_RESETVAL (0x00000000u)#define CSL_IRDA_SCR_RX_CTS_DSR_WAKE_UP_ENABLE_DISABLE (0x00000000u)#define CSL_IRDA_SCR_RX_CTS_DSR_WAKE_UP_ENABLE_ENABLE (0x00000001u)#define CSL_IRDA_SCR_TX_EMPTY_CTL_IT_MASK (0x00000008u)#define CSL_IRDA_SCR_TX_EMPTY_CTL_IT_SHIFT (0x00000003u)#define CSL_IRDA_SCR_TX_EMPTY_CTL_IT_RESETVAL (0x00000000u)#define CSL_IRDA_SCR_TX_EMPTY_CTL_IT_DISABLE (0x00000000u)#define CSL_IRDA_SCR_TX_EMPTY_CTL_IT_ENABLE (0x00000001u)#define CSL_IRDA_SCR_DMA_MODE_2_MASK (0x00000006u)#define CSL_IRDA_SCR_DMA_MODE_2_SHIFT (0x00000001u)#define CSL_IRDA_SCR_DMA_MODE_2_RESETVAL (0x00000000u)#define CSL_IRDA_SCR_DMA_MODE_2_00 (0x00000000u)#define CSL_IRDA_SCR_DMA_MODE_2_01 (0x00000001u)#define CSL_IRDA_SCR_DMA_MODE_2_02 (0x00000002u)#define CSL_IRDA_SCR_DMA_MODE_2_03 (0x00000003u)#define CSL_IRDA_SCR_DMA_MODE_CTL_MASK (0x00000001u)#define CSL_IRDA_SCR_DMA_MODE_CTL_SHIFT (0x00000000u)#define CSL_IRDA_SCR_DMA_MODE_CTL_RESETVAL (0x00000000u)#define CSL_IRDA_SCR_DMA_MODE_CTL_DISABLE (0x00000000u)#define CSL_IRDA_SCR_DMA_MODE_CTL_ENABLE (0x00000001u)#define CSL_IRDA_SCR_RESETVAL (0x00000000u)/* SSR */#define CSL_IRDA_SSR_RX_CTS_DSR_WAKE_UP_STS_MASK (0x00000002u)#define CSL_IRDA_SSR_RX_CTS_DSR_WAKE_UP_STS_SHIFT (0x00000001u)#define CSL_IRDA_SSR_RX_CTS_DSR_WAKE_UP_STS_RESETVAL (0x00000000u)#define CSL_IRDA_SSR_TX_FIFO_FULL_MASK (0x00000001u)#define CSL_IRDA_SSR_TX_FIFO_FULL_SHIFT (0x00000000u)#define CSL_IRDA_SSR_TX_FIFO_FULL_RESETVAL (0x00000000u)#define CSL_IRDA_SSR_RESETVAL (0x00000000u)/* EBLR */#define CSL_IRDA_EBLR_EBLR_MASK (0x000000FFu)#define CSL_IRDA_EBLR_EBLR_SHIFT (0x00000000u)#define CSL_IRDA_EBLR_EBLR_RESETVAL (0x00000000u)#define CSL_IRDA_EBLR_RESETVAL (0x00000000u)/* MVR */#define CSL_IRDA_MVR_MAJOR_REV_MASK (0x000000F0u)#define CSL_IRDA_MVR_MAJOR_REV_SHIFT (0x00000004u)#define CSL_IRDA_MVR_MAJOR_REV_RESETVAL (0x00000001u)#define CSL_IRDA_MVR_MINOR_REV_MASK (0x0000000Fu)#define CSL_IRDA_MVR_MINOR_REV_SHIFT (0x00000000u)#define CSL_IRDA_MVR_MINOR_REV_RESETVAL (0x00000001u)#define CSL_IRDA_MVR_RESETVAL (0x00000011u)/* SYSC */#define CSL_IRDA_SYSC_IDLEMODE_MASK (0x00000018u)#define CSL_IRDA_SYSC_IDLEMODE_SHIFT (0x00000003u)#define CSL_IRDA_SYSC_IDLEMODE_RESETVAL (0x00000000u)#define CSL_IRDA_SYSC_IDLEMODE_FORCE (0x00000000u)#define CSL_IRDA_SYSC_IDLEMODE_NONE (0x00000001u)#define CSL_IRDA_SYSC_IDLEMODE_SMART (0x00000002u)#define CSL_IRDA_SYSC_ENAWAKEUP_MASK (0x00000004u)#define CSL_IRDA_SYSC_ENAWAKEUP_SHIFT (0x00000002u)#define CSL_IRDA_SYSC_ENAWAKEUP_RESETVAL (0x00000000u)#define CSL_IRDA_SYSC_ENAWAKEUP_DISABLE (0x00000000u)#define CSL_IRDA_SYSC_ENAWAKEUP_ENABLE (0x00000001u)#define CSL_IRDA_SYSC_SOFTRESET_MASK (0x00000002u)#define CSL_IRDA_SYSC_SOFTRESET_SHIFT (0x00000001u)#define CSL_IRDA_SYSC_SOFTRESET_RESETVAL (0x00000000u)#define CSL_IRDA_SYSC_SOFTRESET_DISABLE (0x00000000u)#define CSL_IRDA_SYSC_SOFTRESET_ENABLE (0x00000001u)#define CSL_IRDA_SYSC_AUTOIDLE_MASK (0x00000001u)#define CSL_IRDA_SYSC_AUTOIDLE_SHIFT (0x00000000u)#define CSL_IRDA_SYSC_AUTOIDLE_RESETVAL (0x00000000u)#define CSL_IRDA_SYSC_AUTOIDLE_CLKRUN (0x00000000u)#define CSL_IRDA_SYSC_AUTOIDLE_AUTO_OCP (0x00000001u)#define CSL_IRDA_SYSC_RESETVAL (0x00000000u)/* SYSS */#define CSL_IRDA_SYSS_RESETDONE_MASK (0x00000001u)#define CSL_IRDA_SYSS_RESETDONE_SHIFT (0x00000000u)#define CSL_IRDA_SYSS_RESETDONE_RESETVAL (0x00000000u)#define CSL_IRDA_SYSS_RESETVAL (0x00000000u)/* WER */#define CSL_IRDA_WER_RLS_MASK (0x00000040u)#define CSL_IRDA_WER_RLS_SHIFT (0x00000006u)#define CSL_IRDA_WER_RLS_RESETVAL (0x00000001u)#define CSL_IRDA_WER_RHR_MASK (0x00000020u)#define CSL_IRDA_WER_RHR_SHIFT (0x00000005u)#define CSL_IRDA_WER_RHR_RESETVAL (0x00000001u)#define CSL_IRDA_WER_RXIR_MASK (0x00000010u)#define CSL_IRDA_WER_RXIR_SHIFT (0x00000004u)#define CSL_IRDA_WER_RXIR_RESETVAL (0x00000001u)#define CSL_IRDA_WER_DCD_MASK (0x00000008u)#define CSL_IRDA_WER_DCD_SHIFT (0x00000003u)#define CSL_IRDA_WER_DCD_RESETVAL (0x00000001u)#define CSL_IRDA_WER_RI_MASK (0x00000004u)#define CSL_IRDA_WER_RI_SHIFT (0x00000002u)#define CSL_IRDA_WER_RI_RESETVAL (0x00000001u)#define CSL_IRDA_WER_DSR_MASK (0x00000002u)#define CSL_IRDA_WER_DSR_SHIFT (0x00000001u)#define CSL_IRDA_WER_DSR_RESETVAL (0x00000001u)#define CSL_IRDA_WER_CTS_MASK (0x00000001u)#define CSL_IRDA_WER_CTS_SHIFT (0x00000000u)#define CSL_IRDA_WER_CTS_RESETVAL (0x00000001u)#define CSL_IRDA_WER_RESETVAL (0x0000007Fu)#endif
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -