📄 csl_i2c.h
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/** @mainpage I2C CSL 3.x * * @section Introduction * * @subsection xxx Purpose and Scope * The purpose of this document is to describe the common API's and data * structures for the I2C module. * * @subsection aaa Terms and Abbreviations * -# CSL: Chip Support Library * -# API: Application Programmer Interface * * @subsection References * -# CSL-001-DES, CSL 3.x Design Specification DocumentVersion 1.02 * *//** @file csl_i2c.h * * @brief Header file for functional layer of CSL * * Description * - The different enumerations, structure definitions * and function declarations * * Modification 1 * - modified on: 29/01/2004 * - reason: Created the sources * * Modification 2 * - modified on: 01/03/2004 * - reason: Make changes as per review comments. * Remove "dlben" from Hwsetup * * Modification 3 * - modified on: 02/03/2004 * - reason: Added few symbolic constants. * * @date 29th Jan, 2004 * @author Amruth Tadas. * */#ifndef _CSL_I2C_H_#define _CSL_I2C_H_#ifdef __cplusplusextern "C" {#endif#include <csl.h>#include <cslr_i2c.h>/**************************************************************************\* I2C global macro declarations\**************************************************************************//** Constants for passing parameters to the functions. */#define CSL_I2C_BASEADDR 1/** For setting the SLAVE Mode for I2C */#define CSL_I2C_MODE_SLAVE (0)/** For setting the MASTER Mode for I2C */#define CSL_I2C_MODE_MASTER (1)/** For setting the RECEIVER Mode for I2C */#define CSL_I2C_DIR_RECEIVE (0)/** For setting the TRANSMITTER Mode for I2C */#define CSL_I2C_DIR_TRANSMIT (1)/** For setting the 7-bit Addressing Mode for I2C*/#define CSL_I2C_ADDRSZ_SEVEN (0)/** For setting the 10-bit Addressing Mode */#define CSL_I2C_ADDRSZ_TEN (1)/** For setting the Little Endian Mode for I2C */#define CSL_I2C_ENDIAN_LITTLE (0)/** For setting the Big Endian Mode for I2C */#define CSL_I2C_ENDIAN_BIG (1)/** For Disabling the Transmitter DMA for I2C */#define CSL_I2C_TX_DMA_DISABLE (0)/** For Enabling the Transmitter DMA for I2C */#define CSL_I2C_TX_DMA_ENABLE (1)/** For Disabling the Receiver DMA for I2C */#define CSL_I2C_RX_DMA_DISABLE (0)/** For Enabling the Receiver DMA for I2C */#define CSL_I2C_RX_DMA_ENABLE (1)/** For Disabling the Start Byte Mode for I2C(Normal Mode) */#define CSL_I2C_STB_DISABLE (0)/** For Enabling the Start Byte Mode for I2C */#define CSL_I2C_STB_ENABLE (1)/** For indicating the non-completion of Reset */#define CSL_I2C_RESET_NOT_DONE (0)/** For indicating the completion of Reset */#define CSL_I2C_RESET_DONE (1)/** For indicating that the bus is not busy */#define CSL_I2C_BUS_NOT_BUSY (0)/** For indicating that the bus is busy */#define CSL_I2C_BUS_BUSY (1)/** For indicating that the Receive ready signal is low */#define CSL_I2C_RX_NOT_READY (0)/** For indicating that the Receive ready signal is high */#define CSL_I2C_RX_READY (1)/** For indicating that the Transmit ready signal is low */#define CSL_I2C_TX_NOT_READY (0)/** For indicating that the Transmit ready signal is high */#define CSL_I2C_TX_READY (1)/** For indicating that the Access ready signal is low */#define CSL_I2C_ACS_NOT_READY (0)/** For indicating that the Access ready signal is high */#define CSL_I2C_ACS_READY (1)/** For indicating Single Byte Data signal is set */#define CSL_I2C_SINGLE_BYTE_DATA (1)/** For indicating Receive overflow signal is set */#define CSL_I2C_RECEIVE_OVERFLOW (1)/** For indicating Transmit underflow signal is set */#define CSL_I2C_TRANSMIT_UNDERFLOW (1)/** For indicating Arbitration Lost signal is set */#define CSL_I2C_ARBITRATION_LOST (1)/** Constants for status bit clear *//** Clear the Arbitration Lost status bit */#define CSL_I2C_CLEAR_AL 0x1/** Clear the No acknowledge status bit */#define CSL_I2C_CLEAR_NACK 0x2/** Clear the Register access ready status bit */#define CSL_I2C_CLEAR_ARDY 0x4/** Clear the Receive ready status bit */#define CSL_I2C_CLEAR_RRDY 0x8/** Clear the Transmit ready status bit */#define CSL_I2C_CLEAR_XRDY 0x10/** Clear the General call status bit */#define CSL_I2C_CLEAR_GC 0x20/**************************************************************************\* I2C global typedef declarations\**************************************************************************//** @brief This object contains the reference to the instance of I2C opened * using the @a CSL_i2cOpen(). * * The pointer to this, is passed to all I2C CSL APIs. */typedef struct CSL_I2cObj { /** This is a pointer to the registers of the instance of I2C * referred to by this object */ CSL_I2cRegsOvly regs; /** This is the instance of I2C being referred to by this object */ CSL_InstNum perNum;} CSL_I2cObj;typedef struct CSL_I2cObj *CSL_I2cHandle;/** @brief This will have the base-address information for the peripheral * instance */typedef struct { /** Base-address of the Configuration registers of the peripheral */ CSL_I2cRegsOvly regs;} CSL_I2cBaseAddress;/** @brief Module specific parameters. Present implementation doesn't have * any module specific parameters. */typedef struct{ /** Bit mask to be used for module specific parameters. * The below declaration is just a place-holder for future * implementation. */ CSL_BitMask16 flags;} CSL_I2cParam;/** @brief Module specific context information. Present implementation doesn't have * any Context information. */typedef struct { /** Context information of I2C. * The below declaration is just a place-holder for future * implementation. */ Uint16 contextInfo;} CSL_I2cContext;/** @brief This has all the fields required to configure the * I2C clock */typedef struct CSL_I2cClkSetup_{ /** Prescalar to the input clock */ Uint16 prescalar; /** Low time period of the clock */ Uint16 clklowdiv; /** High time period of the clock */ Uint16 clkhighdiv;}CSL_I2cClkSetup;/** @brief This has all the fields required to configure I2C at Power Up * (After a Hardware Reset) or a Soft Reset * * This structure is used to setup or obtain existing setup of * I2C using @a CSL_i2cHwSetup() & @a CSL_i2cGetHwSetup() functions * respectively. */typedef struct CSL_I2cHwSetup_ { /** Master or Slave Mode : 1==> Master Mode, 0==> Slave Mode */ Uint16 mode; /** Transmitter Mode or Receiver Mode: 1==> Transmitter Mode, * 0 ==> Receiver Mode */ Uint16 dir; /** Addressing Mode :0==> 7-bit Mode, 1==> 10-bit Mode */ Uint16 addrMode; /** Endianess : 0 ==> Little Endian, 1 ==> Big Endian. */ Uint16 endianess; /** Start Byte Mode : 1 ==> Start Byte Mode, 0 ==> Normal Mode */ Uint16 sttbyteen; /** Address of the own device */ Uint16 ownaddr; /** Transmission DMA Event : 1==> Enable the Transmission Event, * 0 ==> Disable the Transmission Event */ Uint16 txdmaen; /** Receive DMA Event : 1==> Enable the Receive DMA Event, * 0 ==> Disable the Receive DMA Event */ Uint16 rxdmaen; /** Interrupt Enable mask The mask can be for one interrupt or * OR of multiple interrupts. */ Uint16 inten; /** Prescalar, Clock Low Time and Clock High Time for Clock Setup */ CSL_I2cClkSetup *clksetup;}CSL_I2cHwSetup;/** * @brief The config-structure * * Used to configure the I2C using CSL_i2cHwSetupRaw(..) */typedef struct { Uint16 IE; /**< IE register */ Uint16 BUF; /**< BUF register */ Uint16 CNT; /**< CNT register */ Uint16 DATA; /**< DATA register */ Uint16 SYSC; /**< SYSC register */ Uint16 CON ; /**< CON register */ Uint16 OA ; /**< OA register */ Uint16 SA ; /**< SA reister */ Uint16 PSC ; /**< PSC register */ Uint16 SCLL; /**< SCLL register */ Uint16 SCLH; /**< SCLH register */ Uint16 SYSTEST; /** SYSTEST register */} CSL_I2cConfig;/** * @brief Default values for the config-structure */#define CSL_I2C_CONFIG_DEFAULTS { \ \ CSL_FMKT(I2C_IE_GC_IE, RESETVAL) | \ CSL_FMKT(I2C_IE_XRDY_IE, RESETVAL) | \ CSL_FMKT(I2C_IE_RRDY_IE, RESETVAL) | \ CSL_FMKT(I2C_IE_ARDY_IE, RESETVAL) | \ CSL_FMKT(I2C_IE_NACK_IE, RESETVAL) | \ CSL_FMKT(I2C_IE_AL_IE, RESETVAL) , \ CSL_FMKT(I2C_BUF_RDMA_EN,RESETVAL) | \ CSL_FMKT(I2C_BUF_XDMA_EN,RESETVAL) , \ CSL_FMKT(I2C_CNT_DCOUNT,RESETVAL) , \ CSL_FMKT(I2C_DATA_DATA,RESETVAL) , \ CSL_FMKT(I2C_SYSC_SRST,RESETVAL) , \ CSL_FMKT(I2C_CON_I2C_EN,RESETVAL) | \ CSL_FMKT(I2C_CON_BE,RESETVAL) | \ CSL_FMKT(I2C_CON_STB,RESETVAL) | \ CSL_FMKT(I2C_CON_MST,RESETVAL) | \ CSL_FMKT(I2C_CON_TRX,RESETVAL) | \ CSL_FMKT(I2C_CON_XA,RESETVAL) | \ CSL_FMKT(I2C_CON_STP,RESETVAL) | \ CSL_FMKT(I2C_CON_STT,RESETVAL) , \ CSL_FMKT(I2C_OA_OA,RESETVAL) , \ CSL_FMKT(I2C_SA_SA,RESETVAL) , \ CSL_FMKT(I2C_PSC_PSC,RESETVAL) , \ CSL_FMKT(I2C_SCLL_SCLL,RESETVAL) , \ CSL_FMKT(I2C_SCLH_SCLH,RESETVAL) , \ CSL_FMKT(I2C_SYSTEST_ST_EN,RESETVAL) | \ CSL_FMKT(I2C_SYSTEST_FREE,RESETVAL) | \ CSL_FMKT(I2C_SYSTEST_TMODE,RESETVAL) | \ CSL_FMKT(I2C_SYSTEST_SSB,RESETVAL) | \ CSL_FMKT(I2C_SYSTEST_SCL_O,RESETVAL) | \ CSL_FMKT(I2C_SYSTEST_SDA_O,RESETVAL) \ }/** @brief Enumeration for queries passed to @a CSL_i2cGetHwStatus() * * This is used to get the status of different operations or to get the * existing setup of I2C. */typedef enum { /** Get current clock setup parameters (response type:@a CSL_I2cClkSetup *) */ CSL_I2C_QUERY_CLOCK_SETUP = 1, /** Get the Bus Busy status information (response type: @a Uint16 *) */ CSL_I2C_QUERY_BUS_BUSY , /** Get the Receive Ready status information(response type: @a Uint16 *) */ CSL_I2C_QUERY_RX_RDY , /** Get the Transmit Ready status information(response type: @a Uint16 *) */ CSL_I2C_QUERY_TX_RDY , /** Get the Register Ready status information(response type: @a Uint16 *) */ CSL_I2C_QUERY_ACS_RDY , /** Get the Single Byte Data bit information (response type: @a Uint16 *) */ CSL_I2C_QUERY_SBD , /** Get the Receive overflow status information(response type: @a Uint16 *) */ CSL_I2C_QUERY_ROVR , /** Get the Transmit underflow status information(response type:@a Uint16 *)*/ CSL_I2C_QUERY_XUDF , /** Get the Arbitration Lost status information(response type: @a Uint16 *) */ CSL_I2C_QUERY_AL , /** Get the No Acknowledge status information(response type: @a Uint16 *) */ CSL_I2C_QUERY_NACK , /** Get the Reset Done status bit information(response type: @a Uint16 *) */ CSL_I2C_QUERY_RDONE} CSL_I2cHwStatusQuery;/** @brief Enumeration for queries passed to @a CSL_i2cHwControl() * * This is used to select the commands to control the operations * existing setup of I2C. The arguments to be passed with each * enumeration if any are specified next to the enumeration. */ typedef enum { /** Enable the I2C : no argument */ CSL_I2C_CMD_ENABLE = 1, /** Disable the I2C: no argument */ CSL_I2C_CMD_DISABLE , /** Set the Master mode of operation: no argument */ CSL_I2C_CMD_MODE_MASTER, /** Set the Slave mode of operation: no argument */ CSL_I2C_CMD_MODE_SLAVE, /** Software command to the I2C : no argument */ CSL_I2C_CMD_RESET , /** Clear the status bits. The argument next to the command specifies the * status bit to be cleared. The status bit can be * CSL_I2C_CLEAR_AL, * CSL_I2C_CLEAR_NACK, * CSL_I2C_CLEAR_ARDY, * CSL_I2C_CLEAR_RRDY, * CSL_I2C_CLEAR_XRDY, * CSL_I2C_CLEAR_GC */ CSL_I2C_CMD_CLEAR_STATUS, /** Set the address of the Slave device : argument @a (Uint16 *) */ CSL_I2C_CMD_SET_SLAVE_ADDR , /** Set the Data Count : argument @a (Uint16 *) */ CSL_I2C_CMD_SET_DATA_COUNT , /** Set the start condition : no argument */ CSL_I2C_CMD_START , /** Set the stop condition : no argument */ CSL_I2C_CMD_STOP , /** Set the transmission mode : no argument */ CSL_I2C_CMD_DIR_TRANSMIT , /** Set the receiver mode : no argument */ CSL_I2C_CMD_DIR_RECEIVE} CSL_I2cHwControlCmd;/** @brief Enumeration for I2C Test commands passed to @a CSL_i2cTest() * * This is used to select the Test commands to control the operations * existing setup of I2C. */typedef enum { /** Enable the Test Mode */ CSL_I2C_TEST_ENABLE = 1, /** Disable the Test mode */ CSL_I2C_TEST_DISABLE = 2, /** Enable the Free run mode */ CSL_I2C_FREE_MODE = 3, /** Enable the Stop mode */ CSL_I2C_STOP_MODE = 4, /** Enable the Test mode for Clocks */ CSL_I2C_TMODE_CLK = 5, /** Enable the Loop back mode */ CSL_I2C_TMODE_LOOP = 6, /** Enable the Status bit test */ CSL_I2C_SET_STATUS_BITS = 7 } CSL_I2cTestCmd;/**************************************************************************\* I2C global function declarations\**************************************************************************//** @brief Peripheral specific initialization function. * * This is the peripheral specific intialization function. This function is * idempotent in that calling it many times is same as calling it once. * This function initializes the CSL data structures, and doesn't touches * the hardware. *
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