📄 bios_edma3_rm_sample_init.c
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**| Copyright (c) 1998-2006 Texas Instruments Incorporated |**
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/** \file bios_edma3_rm_sample_init.c
\brief Sample Initialization for the EDMA3 RM. It should be
MANDATORILY done once before EDMA3 usage.
(C) Copyright 2006, Texas Instruments, Inc
\version 1.0 Anuj Aggarwal - Created
1.1 Anuj Aggarwal - Made the sample app generic
- Removed redundant arguments
from Cache-related APIs
- Added new function for Poll mode
testing
*/
#include <ecm.h>
#include <hwi.h>
#include <ti/sdo/edma3/rm/sample/bios_edma3_rm_sample.h>
/** @brief To enable the HWI event corresponding to the EDMA3 ECM events */
#define EDMA3_HWI_BITMASK (1u << hwInt)
/** @brief EDMA3 RM Handle, used to call all the RM APIs */
EDMA3_RM_Handle hEdmaResMgr = NULL;
/** @brief EDMA3 RM Instance specific Semaphore handle */
static EDMA3_OS_Sem_Handle rmSemHandle = NULL;
/**
* EDMA3 TC ISRs which need to be registered with the underlying OS by the user
* (Not all TC error ISRs need to be registered, register only for the
* available Transfer Controllers).
*/
void (*ptrEdma3TcIsrHandler[EDMA3_MAX_TC])(unsigned int arg) =
{
&lisrEdma3TC0ErrHandler0,
&lisrEdma3TC1ErrHandler0,
&lisrEdma3TC2ErrHandler0,
&lisrEdma3TC3ErrHandler0,
&lisrEdma3TC4ErrHandler0,
&lisrEdma3TC5ErrHandler0,
&lisrEdma3TC6ErrHandler0,
&lisrEdma3TC7ErrHandler0,
};
/** To Register the ISRs with the underlying OS, if required. */
static void registerEdma3Interrupts (void);
/** To Unregister the ISRs with the underlying OS, if previously registered. */
static void unregisterEdma3Interrupts (void);
/*
* ======== C64_enableIER ========
* enable interrupts specified by mask
*/
extern Void C64_enableIER( Uns mask );
/* External Global Configuration Structure */
extern EDMA3_RM_GblConfigParams sampleEdma3GblCfgParams;
/* External Instance Specific Configuration Structure */
extern EDMA3_RM_InstanceInitConfig sampleInstInitConfig;
/**
* \brief EDMA3 Initialization
*
* This function initializes the EDMA3 RM and registers the
* interrupt handlers.
*
* \return EDMA3_RM_SOK if success, else error code
*/
EDMA3_RM_Result edma3init (void)
{
unsigned int edma3InstanceId = 0;
EDMA3_RM_Param initParam;
EDMA3_RM_Result edma3Result = EDMA3_RM_SOK;
EDMA3_OS_SemAttrs semAttrs = {EDMA3_OS_SEMTYPE_FIFO, NULL};
EDMA3_RM_MiscParam miscParam;
if (NULL == hEdmaResMgr)
{
/* Configuration structure for the RM */
initParam.regionId = (EDMA3_RM_RegionId)1u;
initParam.isMaster = TRUE;
initParam.rmInstInitConfig = &sampleInstInitConfig;
initParam.rmSemHandle = NULL;
initParam.regionInitEnable = TRUE;
initParam.gblerrCbParams.gblerrCb = (EDMA3_RM_GblErrCallback)NULL;
initParam.gblerrCbParams.gblerrData = (void *)NULL;
miscParam.isSlave = FALSE;
/* Create EDMA3 RM Object first. */
edma3Result = EDMA3_RM_create(edma3InstanceId,
(EDMA3_RM_GblConfigParams *)&sampleEdma3GblCfgParams,
(void *)&miscParam);
if (edma3Result != EDMA3_RM_SOK)
{
#ifdef EDMA3_RM_DEBUG
EDMA3_RM_PRINTF("edma3init: EDMA3_RM_create FAILED\r\n");
#endif
}
else
{
/**
* RM Object created successfully.
* Create a semaphore now for RM instance.
*/
edma3Result = edma3OsSemCreate(1, &semAttrs, &initParam.rmSemHandle );
if (edma3Result != EDMA3_RM_SOK)
{
#ifdef EDMA3_RM_DEBUG
EDMA3_RM_PRINTF("edma3init: edma3OsSemCreate FAILED\r\n");
#endif
}
else
{
/* Save the semaphore handle for future use */
rmSemHandle = initParam.rmSemHandle;
/* Open the RM Instance */
hEdmaResMgr = EDMA3_RM_open (edma3InstanceId, (EDMA3_RM_Param *)&initParam, &edma3Result);
if(NULL == hEdmaResMgr)
{
#ifdef EDMA3_RM_DEBUG
EDMA3_RM_PRINTF("edma3init: EDMA3_RM_open FAILED\r\n");
#endif
}
else
{
/**
* Register Interrupt Handlers for various interrupts
* like transfer completion interrupt, CC error
* interrupt, TC error interrupts etc, if required.
*/
registerEdma3Interrupts();
}
}
}
}
else
{
/* EDMA3 RM already initialized, no need to do that again. */
#ifdef EDMA3_RM_DEBUG
EDMA3_RM_PRINTF("edma3init: EDMA3 RM Already Initialized...Init failed\r\n");
#endif
edma3Result = EDMA3_RM_E_INVALID_STATE;
}
return edma3Result;
}
/** To Register the ISRs with the underlying OS, if required. */
static void registerEdma3Interrupts (void)
{
unsigned int intState;
ECM_Attrs ecmattrs = ECM_ATTRS;
unsigned int numTc = 0;
/* Disabling the global interrupts */
intState = HWI_disable();
/* Enable the Xfer Completion Event Interrupt */
ecmattrs.unmask = 1u;
ECM_dispatchPlug (ccXferCompInt, (ECM_Fxn)(&lisrEdma3ComplHandler0),
&ecmattrs);
ECM_enableEvent(ccXferCompInt);
/* Enable the CC Error Event Interrupt */
ecmattrs.unmask = 1u;
ECM_dispatchPlug(ccErrorInt, (ECM_Fxn)(&lisrEdma3CCErrHandler0), &ecmattrs);
ECM_enableEvent(ccErrorInt);
/* Enable the TC Error Event Interrupt, according to the number of TCs. */
while (numTc < numEdma3Tc)
{
ecmattrs.unmask = 1u;
ECM_dispatchPlug (tcErrorInt[numTc],
(ECM_Fxn)(ptrEdma3TcIsrHandler[numTc]),
&ecmattrs);
ECM_enableEvent(tcErrorInt[numTc]);
numTc++;
}
/**
* Enabling the HWI_ID.
* EDMA3 interrupts (transfer completion, CC error etc.)
* correspond to different ECM events (SoC specific). These ECM events come
* under ECM block XXX (handling those specific ECM events). Normally, block
* 0 handles events 4-31 (events 0-3 are reserved), block 1 handles events
* 32-63 and so on. This ECM block XXX (or interrupt selection number XXX)
* is mapped to a specific HWI_INT YYY in the tcf file. So to enable this
* mapped HWI_INT YYY, one should use the corresponding bitmask in the
* API C64_enableIER(), in which the YYY bit is SET.
*/
C64_enableIER(EDMA3_HWI_BITMASK);
/* Restore interrupts */
HWI_restore(intState);
}
/**
* \brief EDMA3 De-initialization
*
* This function removes the EDMA3 RM Instance and unregisters the
* interrupt handlers. It also deletes the RM Object.
*
* \return EDMA3_RM_SOK if success, else error code
*/
EDMA3_RM_Result edma3deinit (void)
{
unsigned int edmaInstanceId = 0;
EDMA3_RM_Result edma3Result = EDMA3_RM_SOK;
/* Unregister Interrupt Handlers first */
unregisterEdma3Interrupts();
/* Delete the semaphore */
edma3Result = edma3OsSemDelete (rmSemHandle);
if (EDMA3_RM_SOK != edma3Result )
{
#ifdef EDMA3_RM_DEBUG
EDMA3_RM_PRINTF("edma3deinit: edma3OsSemDelete FAILED\r\n");
#endif
}
else
{
/* Make the semaphore handle as NULL. */
rmSemHandle = NULL;
/* Now, close the EDMA3 RM Instance */
edma3Result = EDMA3_RM_close (hEdmaResMgr, NULL);
if (EDMA3_RM_SOK != edma3Result )
{
#ifdef EDMA3_RM_DEBUG
EDMA3_RM_PRINTF("edma3deinit: EDMA3_RM_close FAILED\r\n");
#endif
}
else
{
/* Make the RM handle as NULL. */
hEdmaResMgr = NULL;
/* Now, delete the EDMA3 RM Object */
edma3Result = EDMA3_RM_delete (edmaInstanceId, NULL);
if (EDMA3_RM_SOK != edma3Result )
{
#ifdef EDMA3_RM_DEBUG
EDMA3_RM_PRINTF("edma3deinit: EDMA3_RM_delete FAILED\r\n");
#endif
}
else
{
#ifdef EDMA3_RM_DEBUG
EDMA3_RM_PRINTF("edma3deinit: EDMA3 Deinitialization" \
" Completed...\r\n");
#endif
}
}
}
return edma3Result;
}
/** To Unregister the ISRs with the underlying OS, if previously registered. */
static void unregisterEdma3Interrupts (void)
{
unsigned int intState;
unsigned int numTc = 0;
/* Disabling the global interrupts */
intState = HWI_disable();
/* Disable the Xfer Completion Event Interrupt */
ECM_disableEvent(ccXferCompInt);
/* Disable the CC Error Event Interrupt */
ECM_disableEvent(ccErrorInt);
/* Enable the TC Error Event Interrupt, according to the number of TCs. */
while (numTc < numEdma3Tc)
{
ECM_disableEvent(tcErrorInt[numTc]);
numTc++;
}
/* Restore interrupts */
HWI_restore(intState);
}
/* End of File */
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