📄 bios_edma3_drv_sample_cs.c
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/** \file bios_edma3_drv_sample_cs.c
\brief Sample functions showing the implementation of Critical section
entry/exit routines and various semaphore related routines (all OS
depenedent). These implementations MUST be provided by the user /
application, using the EDMA3 driver, for its
correct functioning.
(C) Copyright 2006, Texas Instruments, Inc
\version 1.0 Anuj Aggarwal - Created
1.1 Anuj Aggarwal - Made the sample app generic
- Removed redundant arguments
from Cache-related APIs
- Added new function for Poll mode
testing
*/
#include <ecm.h>
#include <bcache.h>
#include <hwi.h>
#include <tsk.h>
#include <clk.h>
#include <sem.h>
#include <ti/sdo/edma3/drv/sample/bios_edma3_drv_sample.h>
#define EDMA3_CACHE_WAIT (1u)
/**
* \brief EDMA3 OS Protect Entry
*
* This function saves the current state of protection in 'intState'
* variable passed by caller, if the protection level is
* EDMA3_OS_PROTECT_INTERRUPT. It then applies the requested level of
* protection.
* For EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION and
* EDMA3_OS_PROTECT_INTERRUPT_CC_ERROR, variable 'intState' is ignored,
* and the requested interrupt is disabled.
* For EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR, '*intState' specifies the
* Transfer Controller number whose interrupt needs to be disabled.
*
* \param level is numeric identifier of the desired degree of protection.
* \param intState is memory location where current state of protection is
* saved for future use while restoring it via edma3OsProtectExit() (Only
* for EDMA3_OS_PROTECT_INTERRUPT protection level).
* \return None
*/
void edma3OsProtectEntry (int level, unsigned int *intState)
{
if (((level == EDMA3_OS_PROTECT_INTERRUPT)
|| (level == EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR))
&& (intState == NULL))
{
return;
}
else
{
switch (level)
{
/* Disable all (global) interrupts */
case EDMA3_OS_PROTECT_INTERRUPT :
*intState = HWI_disable();
break;
/* Disable scheduler */
case EDMA3_OS_PROTECT_SCHEDULER :
TSK_disable();
break;
/* Disable EDMA3 transfer completion interrupt only */
case EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION :
ECM_disableEvent(ccXferCompInt);
break;
/* Disable EDMA3 CC error interrupt only */
case EDMA3_OS_PROTECT_INTERRUPT_CC_ERROR :
ECM_disableEvent(ccErrorInt);
break;
/* Disable EDMA3 TC error interrupt only */
case EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR :
switch (*intState)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
case 6:
case 7:
/* Fall through... */
/* Disable the corresponding interrupt */
ECM_disableEvent(tcErrorInt[*intState]);
break;
default:
break;
}
break;
default:
break;
}
}
}
/**
* \brief EDMA3 OS Protect Exit
*
* This function undoes the protection enforced to original state
* as is specified by the variable 'intState' passed, if the protection
* level is EDMA3_OS_PROTECT_INTERRUPT.
* For EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION and
* EDMA3_OS_PROTECT_INTERRUPT_CC_ERROR, variable 'intState' is ignored,
* and the requested interrupt is enabled.
* For EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR, 'intState' specifies the
* Transfer Controller number whose interrupt needs to be enabled.
* \param level is numeric identifier of the desired degree of protection.
* \param intState is original state of protection at time when the
* corresponding edma3OsProtectEntry() was called (Only
* for EDMA3_OS_PROTECT_INTERRUPT protection level).
* \return None
*/
void edma3OsProtectExit (int level, unsigned int intState)
{
switch (level)
{
/* Enable all (global) interrupts */
case EDMA3_OS_PROTECT_INTERRUPT :
HWI_restore(intState);
break;
/* Enable scheduler */
case EDMA3_OS_PROTECT_SCHEDULER :
TSK_enable();
break;
/* Enable EDMA3 transfer completion interrupt only */
case EDMA3_OS_PROTECT_INTERRUPT_XFER_COMPLETION :
ECM_enableEvent(ccXferCompInt);
break;
/* Enable EDMA3 CC error interrupt only */
case EDMA3_OS_PROTECT_INTERRUPT_CC_ERROR :
ECM_enableEvent(ccErrorInt);
break;
/* Enable EDMA3 TC error interrupt only */
case EDMA3_OS_PROTECT_INTERRUPT_TC_ERROR :
switch (intState)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
case 6:
case 7:
/* Fall through... */
/* Enable the corresponding interrupt */
ECM_enableEvent(tcErrorInt[intState]);
break;
default:
break;
}
break;
default:
break;
}
}
/* Function to wait for OS Ticks */
void edma3OsWaitMsecs(unsigned int mSecs)
{
unsigned int ticksForSleeping = ((CLK_countspms() / CLK_getprd()) * mSecs);
TSK_sleep(ticksForSleeping);
}
/**
* \brief EDMA3 Cache Invalidate
*
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