bios_edma3_drv_sample_app.c

vicp做为dm6446上的硬件加速器

        case EDMA3_RM_XFER_COMPLETE:
            /* Transfer completed successfully */
            irqRaised1 = 1;
            break;
        case EDMA3_RM_E_CC_DMA_EVT_MISS:
            /* Transfer resulted in DMA event miss error. */
            irqRaised1 = -1;
            break;
        case EDMA3_RM_E_CC_QDMA_EVT_MISS:
            /* Transfer resulted in QDMA event miss error. */
            irqRaised1 = -2;
            break;
        default:
            break;
        }
    }



/* Callback function 2 */
static void callback2 (unsigned int tcc, EDMA3_RM_TccStatus status,
                        void *appData)
    {
    (void)tcc;
    (void)appData;

    switch (status)
        {
        case EDMA3_RM_XFER_COMPLETE:
            /* Transfer completed successfully */
            irqRaised2 = 1;
            break;
        case EDMA3_RM_E_CC_DMA_EVT_MISS:
            /* Transfer resulted in DMA event miss error. */
            irqRaised2 = -1;
            break;
        case EDMA3_RM_E_CC_QDMA_EVT_MISS:
            /* Transfer resulted in QDMA event miss error. */
            irqRaised2 = -2;
            break;
        default:
            break;
        }
    }


/** Local MemCpy function */
extern void edma3MemCpy(void *dst, const void *src, unsigned int len);

#ifdef EDMA3_PING_PONG_TEST
static EDMA3_DRV_Result process_ping_pong_buffer(unsigned short buff_id)
{
    EDMA3_DRV_Result result = EDMA3_DRV_SOK;

    /**
     * Copy the L1D ping-pong buffers from L1D to DDR using CPU.
     * This is kind of dummy processing routine.
     */
    if (buff_id == 1u)
        {
        /* Copy pong buffer */

        /* Invalidate first if cache is enabled, otherwise CPU will take from cache. */
        /**
         * Since the ping/pong buffers are in IRAM, there is no need of invalidating
         * them. If they are in DDR, invalidate them.
         */
#ifdef EDMA3_ENABLE_DCACHE
        /*
        if (result == EDMA3_DRV_SOK)
            {
            result = Edma3_CacheInvalidate((unsigned int)dstL1DBuff2,
                                                PING_PONG_L1D_BUFFER_SIZE);
            }
        */
#endif  /* EDMA3_ENABLE_DCACHE */

        if (result == EDMA3_DRV_SOK)
            {
            edma3MemCpy((void *)(pingpongDestBufCopy),
                                (const void *)(dstL1DBuff2),
                                PING_PONG_L1D_BUFFER_SIZE);
            }
        }
    else
        {
        /* Copy ping buffer */

        /* Invalidate first if cache is enabled, otherwise CPU will take from cache. */
#ifdef EDMA3_ENABLE_DCACHE
        /*
        if (result == EDMA3_DRV_SOK)
            {
            result = Edma3_CacheInvalidate((unsigned int)dstL1DBuff1,
                                                PING_PONG_L1D_BUFFER_SIZE);
            }
        */
#endif  /* EDMA3_ENABLE_DCACHE */

        if (result == EDMA3_DRV_SOK)
            {
            edma3MemCpy((void *)(pingpongDestBufCopy),
                                (const void *)(dstL1DBuff1),
                                PING_PONG_L1D_BUFFER_SIZE);
            }
        }

    /* Adjust the pointer. */
    pingpongDestBufCopy += PING_PONG_L1D_BUFFER_SIZE;

    return result;
}
#endif


/**
 *  \brief   Main sample test case which will call other EDMA3 test cases.
 *              If one wants to call Edma3 test cases, include this main
 *              test case only.
 *
 *  \return  EDMA3_DRV_SOK or EDMA3_DRV Error Code
 */
EDMA3_DRV_Result edma3MemToMemCpytest ()
{
    EDMA3_DRV_Result result = EDMA3_DRV_SOK;


    if (hEdma == NULL)
        {
        result = EDMA3_DRV_E_INVALID_PARAM;
        }

    if (result == EDMA3_DRV_SOK)
        {
        /* Edma test without linking, async, incr mode */
        result = edma3_test(512u, 32u, 8u, EDMA3_DRV_SYNC_A);
        }


    if (result == EDMA3_DRV_SOK)
        {
#ifdef EDMA3_DEBUG_PRINT
        EDMA3_DEBUG_PRINTF ("edma3_test (without linking) Passed\r\n");
#endif  /* EDMA3_DEBUG_PRINT */

        /* Edma test with linking, async, incr mode */
        result = edma3_test_with_link(512u, 32u, 8u, EDMA3_DRV_SYNC_A);
        }
    else
        {
#ifdef EDMA3_DRV_DEBUG
        EDMA3_DRV_PRINTF ("edma3_test (without linking) Failed\r\n");
#endif  /* EDMA3_DRV_DEBUG */
        }


    if (result == EDMA3_DRV_SOK)
        {
#ifdef EDMA3_DEBUG_PRINT
        EDMA3_DEBUG_PRINTF ("edma3_test_with_link (with linking) Passed\r\n");
#endif  /* EDMA3_DEBUG_PRINT */

        /* Qdma test, async, incr mode */
        result = qdma_test(512u, 32u, 8u, EDMA3_DRV_SYNC_A);
        }
    else
        {
#ifdef EDMA3_DRV_DEBUG
        EDMA3_DRV_PRINTF ("edma3_test_with_link (with linking) Failed\r\n");
#endif  /* EDMA3_DRV_DEBUG */
        }


    if (result == EDMA3_DRV_SOK)
        {
#ifdef EDMA3_DEBUG_PRINT
        EDMA3_DEBUG_PRINTF ("qdma_test (without linking) Passed\r\n");
#endif  /* EDMA3_DEBUG_PRINT */

        /* EDMA3 misc test */
        result = edma3_misc_test();
        }
    else
        {
#ifdef EDMA3_DRV_DEBUG
        EDMA3_DRV_PRINTF ("qdma_test (without linking) Failed\r\n");
#endif  /* EDMA3_DRV_DEBUG */
        }


    if (result == EDMA3_DRV_SOK)
        {
#ifdef EDMA3_DEBUG_PRINT
        EDMA3_DEBUG_PRINTF ("edma3_misc_test Passed\r\n");
#endif  /* EDMA3_DEBUG_PRINT */
        }
    else
        {
#ifdef EDMA3_DRV_DEBUG
        EDMA3_DRV_PRINTF ("edma3_misc_test Failed\r\n");
#endif  /* EDMA3_DRV_DEBUG */
        }


#ifdef QDMA_TEST_WITH_LINKING
    if (result == EDMA3_DRV_SOK)
        {
        result = qdma_test_with_link(512u, 32u, 8u, EDMA3_DRV_SYNC_A);

        if (result == EDMA3_DRV_SOK)
            {
#ifdef EDMA3_DEBUG_PRINT
            EDMA3_DEBUG_PRINTF ("qdma_test_with_link Passed\r\n");
#endif  /* EDMA3_DEBUG_PRINT */
            }
        else
            {
#ifdef EDMA3_DRV_DEBUG
            EDMA3_DRV_PRINTF ("qdma_test_with_link Failed\r\n");
#endif  /* EDMA3_DRV_DEBUG */
            }
#endif  /* QDMA_TEST_WITH_LINKING */
        }



#ifdef EDMA3_TEST_WITH_CHAINING
    if (result == EDMA3_DRV_SOK)
        {
        result = edma3_test_with_chaining(512u, 32u, 8u, EDMA3_DRV_SYNC_A);

        if (result == EDMA3_DRV_SOK)
            {
#ifdef EDMA3_DEBUG_PRINT
            EDMA3_DEBUG_PRINTF ("edma3_test_with_chaining Passed\r\n");
#endif  /* EDMA3_DEBUG_PRINT */
            }
        else
            {
#ifdef EDMA3_DRV_DEBUG
            EDMA3_DRV_PRINTF ("edma3_test_with_chaining Failed\r\n");
#endif  /* EDMA3_DRV_DEBUG */
            }
        }
#endif  /* EDMA3_TEST_WITH_CHAINING */



#ifdef EDMA3_POLL_MODE_TEST
    if (result == EDMA3_DRV_SOK)
        {
        result = edma3_test_poll_mode(512u, 32u, 8u, EDMA3_DRV_SYNC_A);

        if (result == EDMA3_DRV_SOK)
            {
#ifdef EDMA3_DEBUG_PRINT
            EDMA3_DEBUG_PRINTF ("edma3_test_poll_mode Passed\r\n");
#endif  /* EDMA3_DEBUG_PRINT */
            }
        else
            {
#ifdef EDMA3_DRV_DEBUG
            EDMA3_DRV_PRINTF ("edma3_test_poll_mode Failed\r\n");
#endif  /* EDMA3_DRV_DEBUG */
            }
        }
#endif  /* EDMA3_POLL_MODE_TEST */


#ifdef EDMA3_PING_PONG_TEST
    if (result == EDMA3_DRV_SOK)
        {
        result = edma3_test_ping_pong_mode();

        if (result == EDMA3_DRV_SOK)
            {
#ifdef EDMA3_DEBUG_PRINT
            EDMA3_DEBUG_PRINTF ("edma3_test_ping_pong_mode Passed\r\n");
#endif  /* EDMA3_DEBUG_PRINT */
            }
        else
            {
#ifdef EDMA3_DRV_DEBUG
            EDMA3_DRV_PRINTF ("edma3_test_ping_pong_mode Failed\r\n");
#endif  /* EDMA3_DRV_DEBUG */
            }
        }
#endif  /* EDMA3_PING_PONG_TEST */

    return result;
}



/**
 *  \brief   EDMA3 mem-to-mem data copy test case, using a DMA channel.
 *
 *
 *  \param  acnt        [IN]      Number of bytes in an array
 *  \param  bcnt        [IN]      Number of arrays in a frame
 *  \param  ccnt        [IN]      Number of frames in a block
 *  \param  syncType    [IN]      Synchronization type (A/AB Sync)
 *
 *  \return  EDMA3_DRV_SOK or EDMA3_DRV Error Code
 */
static EDMA3_DRV_Result edma3_test(
                                    unsigned int acnt,
                                    unsigned int bcnt,
                                    unsigned int ccnt,
                                    EDMA3_DRV_SyncType syncType)
    {
    EDMA3_DRV_Result result = EDMA3_DRV_SOK;
    EDMA3_DRV_PaRAMRegs paramSet = {0,0,0,0,0,0,0,0,0,0,0,0};
    unsigned int chId = 0;
    unsigned int tcc = 0;
    int i;
    unsigned int count;
    unsigned int Istestpassed = 0u;
    unsigned int numenabled = 0;
    unsigned int BRCnt = 0;
    int srcbidx = 0, desbidx = 0;
    int srccidx = 0, descidx = 0;


    srcBuff1 = (signed char*)_srcBuff1;
    dstBuff1 = (signed char*)_dstBuff1;


    /* Initalize source and destination buffers */
    for (count = 0u; count < (acnt*bcnt*ccnt); count++)
        {
        srcBuff1[count] = (int)count;
        /**
         * No need to initialize the destination buffer as it is being invalidated.
        dstBuff1[count] = initval;
        */
        }


#ifdef EDMA3_ENABLE_DCACHE
    /*
    * Note: These functions are required if the buffer is in DDR.
    * For other cases, where buffer is NOT in DDR, user
    * may or may not require the below functions.
    */
    /* Flush the Source Buffer */
    if (result == EDMA3_DRV_SOK)
        {
        result = Edma3_CacheFlush((unsigned int)srcBuff1, (acnt*bcnt*ccnt));
        }

    /* Invalidate the Destination Buffer */
    if (result == EDMA3_DRV_SOK)
        {
        result = Edma3_CacheInvalidate((unsigned int)dstBuff1, (acnt*bcnt*ccnt));
        }
#endif  /* EDMA3_ENABLE_DCACHE */


    /* Set B count reload as B count. */
    BRCnt = bcnt;

    /* Setting up the SRC/DES Index */
    srcbidx = (int)acnt;
    desbidx = (int)acnt;
    if (syncType == EDMA3_DRV_SYNC_A)
        {
        /* A Sync Transfer Mode */
        srccidx = (int)acnt;
        descidx = (int)acnt;
        }
    else
        {
        /* AB Sync Transfer Mode */
        srccidx = ((int)acnt * (int)bcnt);
        descidx = ((int)acnt * (int)bcnt);
        }


    /* Setup for Channel 1*/
    tcc = EDMA3_DRV_TCC_ANY;
    chId = EDMA3_DRV_DMA_CHANNEL_ANY;

    /* Request any DMA channel and any TCC */
    if (result == EDMA3_DRV_SOK)
        {
        result = EDMA3_DRV_requestChannel (hEdma, &chId, &tcc,
                                        (EDMA3_RM_EventQueue)0,
                                            &callback1, NULL);
        }

    if (result == EDMA3_DRV_SOK)
        {
        /* Fill the PaRAM Set with transfer specific information */
        paramSet.srcAddr    = (unsigned int)(srcBuff1);
        paramSet.destAddr   = (unsigned int)(dstBuff1);

        /**
         * Be Careful !!!
         * Valid values for SRCBIDX/DSTBIDX are between