edma3.c

vicp做为dm6446上的硬件加速器

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/**  \file      edma3.c
    \brief      EDMA3 Driver Interface Implementation

    This file contains EDMA3 Driver Implementation for the EDMA3 Controller.

    (C) Copyright 2006, Texas Instruments, Inc

    @author
    @version    0.0.1 - Created
                Assumption: Channel and ParamEntry has 1 to 1 mapping
                0.0.2 - commented call to MAP_DMACH_QUEUE
                0.0.3 - added code for dynamic allocation of param entry
                0.0.4 - added code for dynamic allocation of interrupts to dma
                channels(allocation of bits in Interrupt pending register
                for dma channels)
                0.1.0 - Made generic.  Now uses services of Resource Manager.
                0.2.0     Anuj Aggarwal     - Modified it for EDMA3 package
                                            - Added multiple instances
                                            capability
                0.2.1     Anuj Aggarwal     - Modified it for more run time
                                            configuration.
                                            - Made EDMA3 package OS
                                            independent.
                0.2.2     Anuj Aggarwal     - Critical section handling code
                                            modification. Uses semaphore and
                                            interrupts disabling mechanism
                                            for resource sharing.
                0.3.0     Anuj Aggarwal     - Renamed EDMA3_DVR to EDMA3_DRV
                                            - IPR bit clearing in RM ISR
                                              issue fixed.
                                            - Sample application made generic
                0.3.1     Anuj Aggarwal     - Added DMA/QDMA Channel to TCC
                                              mapping, to fix QDMA missed
                                              event issue.
                0.3.2     Anuj Aggarwal     - Added support for POLL mode
                                            - Added a new API to modify the
                                              CC Register.
                1.0.0     Anuj Aggarwal     - Fixed resource allocation related
                                              bugs.
                1.0.0.1     Anuj Aggarwal   - Fixed spurious missed event
                                              generation related bug.
                1.0.0.2     Anuj Aggarwal   - Made the EDMA3 package RTSC
                                              compliant.
                1.0.0.3     Anuj Aggarwal   - Changed the directory structure
                                              as per RTSC standard.
                1.01.00.01  Anuj Aggarwal   - a) Added new APIs to allocate
                                              logical channels
                                              b) Created EDMA3 config files
                                              for different platforms
                                              c) Misc changes
                1.02.00.01  Anuj Aggarwal   - a) Added DM6467 support
                                              b) Fixed some MRs
                1.03.00.01  Anuj Aggarwal   - a) Added non-RTSC PJT files
                                              b) IOCTL Interface added.
                                              c) Fixed some MRs.
                1.04  Anuj Aggarwal         - a) Header files modified to have
                                                extern "C" declarations.
                                              b) Implemented ECNs DPSP00009815
                                                & DPSP00010035.

 */


/* EDMa3 Driver Internal Header Files */
#include <ti/sdo/edma3/drv/src/edma3.h>
/* Resource Manager Internal Header Files */
#include <ti/sdo/edma3/rm/src/edma3ResMgr.h>

/* Instrumentation Header File */
#ifdef EDMA3_INSTRUMENTATION_ENABLED
#include <ti/sdo/edma3/rm/src/edma3_log.h>
#endif


/* Externel Variables */
/*---------------------------------------------------------------------------*/
/**
 * Maximum Resource Manager Instances supported by the EDMA3 Package.
 */
extern const unsigned int EDMA3_MAX_RM_INSTANCES;


/**
 * \brief EDMA3 Resource Manager Objects, tied to each EDMA3 HW Controller.
 *
 * Typically one RM object will cater to one EDMA3 HW controller
 * and will have all the global config information.
 */
extern EDMA3_RM_Obj resMgrObj[EDMA3_MAX_EDMA3_INSTANCES];


/**
 * \brief Region Specific Configuration structure for
 * EDMA3 controller, to provide region specific Information.
 *
 * This configuration info can also be provided by the user at run-time,
 * while calling EDMA3_RM_open (). If not provided at run-time,
 * this info will be taken from the config file "edma3_<PLATFORM_NAME>_cfg.c",
 * for the specified platform.
 */
extern EDMA3_RM_InstanceInitConfig *userInitConfig;
extern EDMA3_RM_InstanceInitConfig *ptrInitCfgArray;


/**
 * Handles of EDMA3 Resource Manager Instances.
 *
 * Used to maintain information of the EDMA3 RM Instances
 * for each HW controller.
 * There could be a maximum of EDMA3_MAX_RM_INSTANCES instances per
 * EDMA3 HW.
 */
extern EDMA3_RM_Instance *resMgrInstance;
extern EDMA3_RM_Instance *ptrRMIArray;

/** Local MemSet function */
extern void edma3MemSet(void *dst, unsigned char data, unsigned int len);
/** Local MemCpy function */
extern void edma3MemCpy(void *dst, const void *src, unsigned int len);

/**
 * \brief EDMA3 Driver Objects, tied to each EDMA3 HW Controller.
 *
 * Typically one object will cater to one EDMA3 HW controller
 * and will have all regions' (ARM, DSP etc) specific config information.
 */
static EDMA3_DRV_Object drvObj [EDMA3_MAX_EDMA3_INSTANCES];


/**
 * Handles of EDMA3 Driver Instances.
 *
 * Used to maintain information of the EDMA3 Driver Instances for
 * each region, for each HW controller.
 * There could be as many Driver Instances as there are shadow
 * regions. Multiple EDMA3 Driver instances on the same shadow
 * region are NOT allowed.
 */
static EDMA3_DRV_Instance drvInstance [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_REGIONS];


/**
 * \brief Resources bound to a Channel
 *
 * When a request for a channel is made, the resources PaRAM Set and TCC
 * get bound to that channel. This information is needed internally by the
 * driver when a request is made to free the channel (Since it is the
 * responsibility of the driver to free up the channel-associated resources
 * from the Resource Manager layer).
 */
static EDMA3_DRV_ChBoundResources edma3DrvChBoundRes [EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_LOGICAL_CH];



/* Local functions prototypes */
/*---------------------------------------------------------------------------*/
/**
 * Local function to prepare the init config structure for
 * open of Resource Manager
 */
static EDMA3_DRV_Result edma3OpenResMgr (unsigned int instId,
                                                    unsigned int regionId,
                                                    unsigned short flag);

/** Remove various mappings and do cleanup for DMA/QDMA channels */
static EDMA3_DRV_Result edma3RemoveMapping (EDMA3_DRV_Handle hEdma,
                                 unsigned int channelId);

/*---------------------------------------------------------------------------*/



/**
 * \brief   Create EDMA3 Driver Object
 *
 * This API is used to create the EDMA3 Driver Object. It should be
 * called only ONCE for each EDMA3 hardware instance.
 *
 * Init-time Configuration structure for EDMA3 hardware is provided to pass the
 * SoC specific information. This configuration information could be provided
 * by the user at init-time. In case user doesn't provide it, this information
 * could be taken from the SoC specific configuration file
 * edma3_<SOC_NAME>_cfg.c, in case it is available.
 *
 * This API clears the error specific registers (EMCR/EMCRh, QEMCR, CCERRCLR)
 * and sets the TCs priorities and Event Queues' watermark levels, if the 'miscParam'
 * argument is NULL. User can avoid these registers' programming (in some specific
 * use cases) by SETTING the 'isSlave' field of 'EDMA3_RM_MiscParam' configuration
 * structure and passing this structure as the third argument (miscParam).
 *
 * After successful completion of this API, Driver Object's state
 * changes to EDMA3_DRV_CREATED from EDMA3_DRV_DELETED.
 *
 * \param phyCtrllerInstId  [IN]    EDMA3 Controller Instance Id
 *                                 (Hardware instance id, starting from 0).
 * \param gblCfgParams      [IN]    SoC specific configuration structure for the
 *                                  EDMA3 Hardware.
 * \param miscParam         [IN]    Misc configuration options provided in the
 *                                  structure 'EDMA3_DRV_MiscParam'.
 *                                  For default options, user can pass NULL
 *                                  in this argument.
 *
 * \return  EDMA3_DRV_SOK or EDMA3_DRV Error code
 */
EDMA3_DRV_Result EDMA3_DRV_create (unsigned int phyCtrllerInstId,
                                const EDMA3_DRV_GblConfigParams *gblCfgParams,
                                const void *miscParam)
    {
    unsigned int count = 0;
    EDMA3_DRV_Result result = EDMA3_DRV_SOK;
    EDMA3_RM_GblConfigParams rmGblCfgParams;
    /**
     * Used to reset the Internal EDMA3 Driver Data Structures for the first time.
     */
    static unsigned short drvInitDone = FALSE;

    /**
     * We are NOT checking 'gblCfgParams' for NULL. Whatever user has passed
     * is given to RM. If user passed NULL, config info from config file will be
     * taken else user specific info will be passed to the RM.
     * Similarly, 'miscParam' is not being checked and passed as it is to the
     * Resource Manager layer.
     */
    if (phyCtrllerInstId >= EDMA3_MAX_EDMA3_INSTANCES)
        {
        result = EDMA3_DRV_E_INVALID_PARAM;
        }
    else
        {
        /* Initialize the global variables for the first time */
        if (FALSE == drvInitDone)
            {
            for (count = 0; count < EDMA3_MAX_EDMA3_INSTANCES; count++)
                {
                edma3MemSet((void *)&(drvObj[count]) , 0x00u,
                            sizeof(EDMA3_DRV_Object));
                }
            drvInitDone = TRUE;
            }

        /* Initialization has been done */
        if (drvObj[phyCtrllerInstId].state != EDMA3_DRV_DELETED)
            {
            result = EDMA3_DRV_E_OBJ_NOT_DELETED;
            }
        else
            {
            if (NULL != gblCfgParams)
                {
                /* User has passed the configuration info */
                /* copy the global info */
                edma3MemCpy((void *)(&drvObj[phyCtrllerInstId].gblCfgParams),
                                        (const void *)(gblCfgParams),
                                        sizeof (EDMA3_DRV_GblConfigParams));

                /* Reset the RM global info struct first */
                edma3MemSet((void *)&(rmGblCfgParams) ,
                                    0x00u,
                                    sizeof (EDMA3_RM_GblConfigParams));

                /* Fill the RM global info struct with the DRV global info */
                edma3MemCpy((void *)(&rmGblCfgParams),