📄 edma3_drv.h
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/** \file edma3_drv.h
\brief EDMA3 Controller
This file contains Application Interface for the EDMA3 Driver. EDMA3 Driver
uses the EDMA3 Resource Manager internally for resource allocation,
interrupt handling and EDMA3 registers programming.
(C) Copyright 2006, Texas Instruments, Inc
\version 0.0.1 Purushotam Kumar - Created
0.1.0 Joseph Fernandez - Made generic
- Added documentation
- Moved SoC specific defines
to SoC specific header.
0.2.0 Anuj Aggarwal - Modified it for EDMA3 package
- Added multiple instances
capability
0.2.1 Anuj Aggarwal - Modified it for more run time
configuration.
- Made EDMA3 package OS
independent.
0.2.2 Anuj Aggarwal - Critical section handling code
modification. Uses semaphore and
interrupts disabling mechanism
for resource sharing.
0.3.0 Anuj Aggarwal - Renamed EDMA3_DVR to EDMA3_DRV
- IPR bit clearing in RM ISR
issue fixed.
- Sample application made generic
0.3.1 Anuj Aggarwal - Added DMA/QDMA Channel to TCC
mapping, to fix QDMA missed
event issue.
0.3.2 Anuj Aggarwal - Added support for POLL mode
- Added a new API to modify the
CC Register.
1.0.0 Anuj Aggarwal - Fixed resource allocation related
bugs.
1.0.0.1 Anuj Aggarwal - Fixed spurious missed event
generation related bug.
1.0.0.2 Anuj Aggarwal - Made the EDMA3 package RTSC
compliant.
1.0.0.3 Anuj Aggarwal - Changed the directory structure
as per RTSC standard.
1.01.00.01 Anuj Aggarwal - a) Added new APIs to allocate
logical channels
b) Created EDMA3 config files
for different platforms
c) Misc changes
1.02.00.01 Anuj Aggarwal - a) Added DM6467 support
b) Fixed some MRs
1.03.00.01 Anuj Aggarwal - a) Added non-RTSC PJT files
b) IOCTL Interface added.
c) Fixed some MRs.
1.04 Anuj Aggarwal - a) Header files modified to have
extern "C" declarations.
b) Implemented ECNs DPSP00009815
& DPSP00010035.
*/
#ifndef _EDMA3_DRV_H_
#define _EDMA3_DRV_H_
/* Include the Resource Manager header file */
#include <ti/sdo/edma3/rm/edma3_rm.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* \defgroup Edma3DrvMain EDMA3 Driver Interface Definition
*
* Top-level Encapsulation of all documentation for EDMA3 Driver
*
* @{
*/
/*---------------------------------------------------------------------------*/
/*------------------Usage Guidelines Start-----------------------------------*/
/*---------------------------------------------------------------------------*/
/**
* \defgroup Edma3DrvUsage EDMA3 Driver Usage Guidelines
*
* Guidelines for typical usage of EDMA3 Driver.
*
* @{
*/
/**
\brief Usage of EDMA3 Driver.
-# Create EDMA3 Driver Object (one for each EDMA3 hardware instance)
- EDMA3_DRV_Result result = EDMA3_DRV_SOK;
- unsigned int edma3HwInstanceId = 0;
- EDMA3_DRV_GblConfigParams *gblCfgParams = NULL;
- Init-time Configuration structure for EDMA3 controller, to provide
Global SoC specific Information. This could be NULL also. In that
case, static configuration will be taken.
- result = EDMA3_DRV_create (edma3HwInstanceId, gblCfgParams, NULL);
-# Open EDMA3 driver Instance
- Steps
- EDMA3_DRV_InitConfig initCfg;
- EDMA3_DRV_Handle hEdma = NULL;
- EDMA3_OS_SemAttrs semAttrs = {EDMA3_OS_SEMTYPE_FIFO, NULL};
- EDMA3_DRV_Result edmaResult;
-To get the error code while opening driver instance
-# initCfg.regionId = One of the possible regions available
for eg, (EDMA3_RM_RegionId)0 or (EDMA3_RM_RegionId)1 etc, for
different masters.
-# initCfg.isMaster = TRUE/FALSE (Whether this EDMA3
DRV instance is Master or not. The EDMA3 Shadow Region tied to
the Master DRV Instance will ONLY receive the EDMA3 interrupts
(error or completion), if enabled).
-# initCfg.drvSemHandle =
EDMA3 DRV Instance specific semaphore handle. It should
be provided by the user for proper sharing of resources.
- edma3Result = edma3OsSemCreate(1, &semAttrs,
&initCfg.drvSemHandle);
-# initCfg.drvInstInitConfig =
Init-time Region Specific Configuration Structure. It can be
provided by the user at run-time. If not provided by the user,
this info would be taken from the platform specific config file,
if it exists.
-# initCfg.drvInstInitConfig->ownDmaChannels[] =
The bitmap(s) which indicate the DMA channels owned by this
instance of the EDMA3 Driver\n
E.g. A '1' at bit position 24 indicates that this instance of
the EDMA3 Driver owns DMA Channel Id 24\n
Later when a request is made based on a particular Channel Id,
the EDMA3 Driver will check first if it owns that channel.
If it doesnot own it, EDMA3 Driver returns error.
-# initCfg.drvInstInitConfig->ownQdmaChannels[] =
The bitmap(s) which indicate the QDMA channels owned by this
instance of the EDMA3 Driver \n
-# initCfg.drvInstInitConfig->ownPaRAMSets[] =
The bitmap(s) which indicate the PaRAM Sets owned by this
instance of the EDMA3 Driver \n
-# initCfg.drvInstInitConfig->ownTccs[] =
The bitmap(s) which indicate the TCCs owned by this
instance of the EDMA3 Driver \n
-# initCfg.drvInstInitConfig->resvdDmaChannels[] =
The bitmap(s) which indicate the DMA channels reserved by this
instance of the EDMA3 Driver \n
E.g. A '1' at bit position 24 indicates that this instance of
the EDMA3 Driver reserves Channel Id 24\n
These channels are reserved and may be mapped to HW events,
these are not given to 'EDMA3_DRV_DMA_CHANNEL_ANY' requests.\n
-# initCfg.drvInstInitConfig->resvdQdmaChannels[] =
The bitmap(s) which indicate the QDMA channels reserved by this
instance of the EDMA3 Driver \n
E.g. A '1' at bit position 1 indicates that this instance of
the EDMA3 Driver reserves QDMA Channel Id 1\n
These channels are reserved for some specific purpose,
these are not given to 'EDMA3_DRV_QDMA_CHANNEL_ANY' request\n
-# initCfg.drvInstInitConfig->resvdPaRAMSets[] =
PaRAM Sets which are reserved by this Region;
-# initCfg.drvInstInitConfig->resvdTccs[] =
TCCs which are reserved by this Region;
-# initCfg.gblerrCb =
Instance wide callback function to catch non-channel specific
errors;
-# initCfg.gblerrData =
Application data to be passed back to the callback function;
-# hEdma = EDMA3_DRV_open(edma3HwInstanceId, &initCfg, &edmaResult);
-# EDMA3 driver APIs
- EDMA3_RM_ResDesc resObj;
- EDMA3_DRV_Result result;
- unsigned int ch1Id = 0;
- unsigned int ch2Id = 0;
- unsigned int tcc1 = 0;
- unsigned int tcc2 = 0;
- unsigned int qCh1Id = 0;
- unsigned int qTcc1 = 0;
- unsigned int qCh2Id = 0;
- unsigned int qTcc2 = 0;
- unsigned int paRAMId;
- int srcbidx = 0;
- int desbidx = 0;
- int srccidx = 0;
- int descidx = 0;
- unsigned int acnt = 0;
- unsigned int bcnt = 0;
- unsigned int ccnt = 0;
- unsigned int bcntreload = 0;
- EDMA3_DRV_SyncType synctype;
- EDMA3_RM_TccCallback tccCb;
- void *cbData;
-
- Use Case 1: Memory to memory transfer on any available
- DMA Channel\n\n
- tcc1 = EDMA3_DRV_TCC_ANY;
- ch1Id = EDMA3_DRV_DMA_CHANNEL_ANY;
- result = EDMA3_DRV_requestChannel (hEdma, &ch1Id, &tcc1,
(EDMA3_RM_EventQueue)0, &callback1, NULL);
- result = EDMA3_DRV_setSrcParams (hEdma, ch1Id,
(unsigned int)(srcBuff1),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
- result = EDMA3_DRV_setDestParams (hEdma, ch1Id,
(unsigned int)(dstBuff1),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
- Set EDMA transfer parameters (aCnt, bCnt, cCnt, bCntReload,
SyncType)
acnt = 256; bcnt = 1; ccnt = 1, bcntreload = 0;
synctype = EDMA3_DRV_SYNC_A;
- result = EDMA3_DRV_setTransferParams (hEdma, ch1Id, acnt, bcnt,
ccnt, bcntreload, synctype);
- Set srcbidx and srccidx to the appropriate values
- srcbidx = acnt; srccidx = acnt;
- result = EDMA3_DRV_setSrcIndex (hEdma, ch1Id, srcbidx, srccidx);
- Set desbidx and descidx to the appropriate values
- desbidx = acnt; descidx = acnt;
- result = EDMA3_DRV_setDestIndex (hEdma, ch1Id, desbidx, descidx);
- Enable the final completion interrupt.
- result = EDMA3_DRV_setOptField (hEdma, ch1Id,
EDMA3_DRV_OPT_FIELD_TCINTEN, 1);
- Enable the transfer
- result = EDMA3_DRV_enableTransfer (hEdma, ch1Id,
EDMA3_DRV_TRIG_MODE_MANUAL);
- Use Case 2: Linked memory to memory transfer on any available
- DMA Channel\n\n
- Perform steps as for Use Case 1 for the Master logical channel
ch1Id for configuration. DONOT enable the transfer for ch1Id.
- Configure link channel, ch2Id.
- tcc2 = EDMA3_DRV_TCC_ANY;
- ch2Id = EDMA3_DRV_LINK_CHANNEL;
- result = EDMA3_DRV_requestChannel (hEdma, &ch2Id, &tcc2,
(EDMA3_RM_EventQueue)0, &callback2, NULL);
- result = EDMA3_DRV_setSrcParams (hEdma, ch2Id,
(unsigned int)(srcBuff2),
EDMA3_DRV_ADDR_MODE_INCR,
EDMA3_DRV_W8BIT);
- result = EDMA3_DRV_setDestParams (hEdma, ch2Id,(
unsigned int)(dstBuff2),
EDMA3_DRV_ADDR_MODE_INCR,
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