📄 spi_test_save.lst
字号:
00F1 +1 120 P0MDIN DATA 0F1H ; PORT 0 INPUT MODE REGISTER
00F2 +1 121 P1MDIN DATA 0F2H ; PORT 1 INPUT MODE REGISTER
00F3 +1 122 P2MDIN DATA 0F3H ; PORT 2 INPUT MODE REGISTER
00F4 +1 123 P3MDIN DATA 0F4H ; PORT 3 INPUT MODE REGISTER
00F6 +1 124 EIP1 DATA 0F6H ; EXTERNAL INTERRUPT PRIORITY 1
A51 MACRO ASSEMBLER SPI_TEST_SAVE 04/26/2009 16:17:21 PAGE 3
00F8 +1 125 SPI0CN DATA 0F8H ; SPI0 CONTROL
00F9 +1 126 PCA0L DATA 0F9H ; PCA0 COUNTER REGISTER LOW BYTE
00FA +1 127 PCA0H DATA 0FAH ; PCA0 COUNTER REGISTER HIGH BYTE
00FB +1 128 PCA0CPL0 DATA 0FBH ; PCA MODULE 0 CAPTURE/COMPARE REGISTER LOW BYTE
00FC +1 129 PCA0CPH0 DATA 0FCH ; PCA MODULE 0 CAPTURE/COMPARE REGISTER HIGH BYTE
00FD +1 130 PCA0CPL4 DATA 0FDH ; PCA MODULE 4 CAPTURE/COMPARE REGISTER LOW BYTE
00FE +1 131 PCA0CPH4 DATA 0FEH ; PCA MODULE 4 CAPTURE/COMPARE REGISTER HIGH BYTE
00FF +1 132 VDM0CN DATA 0FFH ; VDD MONITOR CONTROL
+1 133
+1 134 ;------------------------------------------------------------------------------
+1 135 ;BIT DEFINITIONS
+1 136 ;
+1 137 ; TCON 88H
0088 +1 138 IT0 BIT TCON.0 ; EXT. INTERRUPT 0 TYPE
0089 +1 139 IE0 BIT TCON.1 ; EXT. INTERRUPT 0 EDGE FLAG
008A +1 140 IT1 BIT TCON.2 ; EXT. INTERRUPT 1 TYPE
008B +1 141 IE1 BIT TCON.3 ; EXT. INTERRUPT 1 EDGE FLAG
008C +1 142 TR0 BIT TCON.4 ; TIMER 0 ON/OFF CONTROL
008D +1 143 TF0 BIT TCON.5 ; TIMER 0 OVERFLOW FLAG
008E +1 144 TR1 BIT TCON.6 ; TIMER 1 ON/OFF CONTROL
008F +1 145 TF1 BIT TCON.7 ; TIMER 1 OVERFLOW FLAG
+1 146
+1 147 ; SCON0 0x98
0098 +1 148 RI0 BIT SCON0.0 ; RECEIVE INTERRUPT FLAG
0099 +1 149 TI0 BIT SCON0.1 ; TRANSMIT INTERRUPT FLAG
009A +1 150 RB80 BIT SCON0.2 ; RECEIVE BIT 8
009B +1 151 TB80 BIT SCON0.3 ; TRANSMIT BIT 8
009C +1 152 REN0 BIT SCON0.4 ; RECEIVE ENABLE
009D +1 153 MCE0 BIT SCON0.5 ; MULTIPROCESSOR COMMUNICATION ENABLE
009F +1 154 S0MODE BIT SCON0.7 ; SERIAL MODE CONTROL BIT 0
+1 155
+1 156 ; IE 0xA8
00A8 +1 157 EX0 BIT IE.0 ; EXTERNAL INTERRUPT 0 ENABLE
00A9 +1 158 ET0 BIT IE.1 ; TIMER 0 INTERRUPT ENABLE
00AA +1 159 EX1 BIT IE.2 ; EXTERNAL INTERRUPT 1 ENABLE
00AB +1 160 ET1 BIT IE.3 ; TIMER 1 INTERRUPT ENABLE
00AC +1 161 ES0 BIT IE.4 ; UART0 INTERRUPT ENABLE
00AD +1 162 ET2 BIT IE.5 ; TIMER 2 INTERRUPT ENABLE
00AE +1 163 ESPI0 BIT IE.6 ; SPI0 INTERRUPT ENABLE
00AF +1 164 EA BIT IE.7 ; GLOBAL INTERRUPT ENABLE
+1 165
+1 166 ; IP 0xB8
00B8 +1 167 PX0 BIT IP.0 ; EXTERNAL INTERRUPT 0 PRIORITY
00B9 +1 168 PT0 BIT IP.1 ; TIMER 0 PRIORITY
00BA +1 169 PX1 BIT IP.2 ; EXTERNAL INTERRUPT 1 PRIORITY
00BB +1 170 PT1 BIT IP.3 ; TIMER 1 PRIORITY
00BC +1 171 PS0 BIT IP.4 ; UART0 PRIORITY
00BD +1 172 PT2 BIT IP.5 ; TIMER 2 PRIORITY
00BE +1 173 PSPI0 BIT IP.6 ; SPI0 INTERRUPT PRIORITY
+1 174
+1 175 ; SMB0CN 0xC0
00C0 +1 176 SI BIT SMB0CN.0 ; SMBUS0 INTERRUPT FLAG
00C1 +1 177 ACK BIT SMB0CN.1 ; ACKNOWLEDGE FLAG
00C2 +1 178 ARBLOST BIT SMB0CN.2 ; ARBITRATION LOST INDICATOR
00C3 +1 179 ACKRQ BIT SMB0CN.3 ; ACKNOWLEDGE REQUEST
00C4 +1 180 STO BIT SMB0CN.4 ; STOP FLAG
00C5 +1 181 STA BIT SMB0CN.5 ; START FLAG
00C6 +1 182 TXMODE BIT SMB0CN.6 ; TRANSMIT MODE INDICATOR
00C7 +1 183 MASTER BIT SMB0CN.7 ; MASTER/SLAVE INDICATOR
+1 184
+1 185 ; TMR2CN 0xC8
00C8 +1 186 T2XCLK BIT TMR2CN.0 ; TIMER 2 EXTERNAL CLOCK SELECT
00CA +1 187 TR2 BIT TMR2CN.2 ; TIMER 2 ON/OFF CONTROL
00CB +1 188 T2SPLIT BIT TMR2CN.3 ; TIMER 2 SPLIT MODE ENABLE
00CD +1 189 TF2LEN BIT TMR2CN.5 ; TIMER 2 LOW BYTE INTERRUPT ENABLE
00CE +1 190 TF2L BIT TMR2CN.6 ; TIMER 2 LOW BYTE OVERFLOW FLAG
A51 MACRO ASSEMBLER SPI_TEST_SAVE 04/26/2009 16:17:21 PAGE 4
00CF +1 191 TF2H BIT TMR2CN.7 ; TIMER 2 HIGH BYTE OVERFLOW FLAG
+1 192
+1 193 ; PSW 0xD0
00D0 +1 194 P BIT PSW.0 ; ACCUMULATOR PARITY FLAG
00D1 +1 195 F1 BIT PSW.1 ; USER FLAG 1
00D2 +1 196 OV BIT PSW.2 ; OVERFLOW FLAG
00D3 +1 197 RS0 BIT PSW.3 ; REGISTER BANK SELECT 0
00D4 +1 198 RS1 BIT PSW.4 ; REGISTER BANK SELECT 1
00D5 +1 199 F0 BIT PSW.5 ; USER FLAG 0
00D6 +1 200 AC BIT PSW.6 ; AUXILIARY CARRY FLAG
00D7 +1 201 CY BIT PSW.7 ; CARRY FLAG
+1 202
+1 203 ; PCA0CN 0xD8H
00D8 +1 204 CCF0 BIT PCA0CN.0 ; PCA0 MODULE 0 CAPTURE/COMPARE FLAG
00D9 +1 205 CCF1 BIT PCA0CN.1 ; PCA0 MODULE 1 CAPTURE/COMPARE FLAG
00DA +1 206 CCF2 BIT PCA0CN.2 ; PCA0 MODULE 2 CAPTURE/COMPARE FLAG
00DB +1 207 CCF3 BIT PCA0CN.3 ; PCA0 MODULE 3 CAPTURE/COMPARE FLAG
00DC +1 208 CCF4 BIT PCA0CN.4 ; PCA0 MODULE 4 CAPTURE/COMPARE FLAG
00DE +1 209 CR BIT PCA0CN.6 ; PCA0 COUNTER RUN CONTROL
00DF +1 210 CF BIT PCA0CN.7 ; PCA0 COUNTER OVERFLOW FLAG
+1 211
+1 212 ; ADC0CN 0xE8H
00E8 +1 213 AD0CM0 BIT ADC0CN.0 ; ADC0 CONVERSION MODE SELECT 0
00E9 +1 214 AD0CM1 BIT ADC0CN.1 ; ADC0 CONVERSION MODE SELECT 1
00EA +1 215 AD0CM2 BIT ADC0CN.2 ; ADC0 CONVERSION MODE SELECT 2
00EB +1 216 AD0WINT BIT ADC0CN.3 ; ADC0 WINDOW COMPARE INTERRUPT FLAG
00EC +1 217 AD0BUSY BIT ADC0CN.4 ; ADC0 BUSY FLAG
00ED +1 218 AD0INT BIT ADC0CN.5 ; ADC0 CONVERISION COMPLETE INTERRUPT FLAG
00EE +1 219 AD0TM BIT ADC0CN.6 ; ADC0 TRACK MODE
00EF +1 220 AD0EN BIT ADC0CN.7 ; ADC0 ENABLE
+1 221
+1 222 ; SPI0CN 0xF8H
00FF +1 223 SPIF BIT SPI0CN.7 ; SPI 0 INTERRUPT FLAG
00FE +1 224 WCOL BIT SPI0CN.6 ; SPI 0 WRITE COLLISION FLAG
00FD +1 225 MODF BIT SPI0CN.5 ; SPI 0 MODE FAULT FLAG
00FC +1 226 RXOVRN BIT SPI0CN.4 ; SPI 0 RX OVERRUN FLAG
00FB +1 227 NSSMD1 BIT SPI0CN.3 ; SPI 0 SLAVE SELECT MODE 1
00FA +1 228 NSSMD0 BIT SPI0CN.2 ; SPI 0 SLAVE SELECT MODE 0
00F9 +1 229 TXBMT BIT SPI0CN.1 ; SPI 0 TRANSMIT BUFFER EMPTY
00F8 +1 230 SPIEN BIT SPI0CN.0 ; SPI 0 SPI ENABLE
231
0000 232 ORG 00H
0000 020100 233 LJMP Main
0100 234 ORG 0100H
235
0100 236 Main:
0100 53D9BF 237 ANL PCA0MD,#0BFH ; 关闭看门狗
0103 120123 238 LCALL SYSCLK_Init
0106 12012D 239 LCALL Port_IO_Init
0109 120139 240 LCALL SPI_Init
010C 120143 241 LCALL UART0_Init
010F 242 LOOP:
010F 30FFFD 243 JNB SPIF, $ ; 等词据
0112 C2FF 244 CLR SPIF ; 清接收中断标志
0114 E5A3 245 MOV A, SPI0DAT ; 接收示⌨️ 快捷键说明
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