860pc.h

miceteck_MPC860_BSP源码,基于VXWORK

/* dab.h - Motorola MPC860DAB board header */

/* Copyright 1998 Teltec UCD-CS */
/* Copyright 1984-1996 Wind River Systems, Inc. */

/*
modification history
--------------------
01a,15sep98,rkh  started for DAB
01e,10nov96,tpr  replaved SYS_CLK_FREQ by SPLL_FREQ_REQUESTED.
01d,08nov96,tpr  added DEC_CLOCK_FREQ.
01c,06nov96,tpr  added macros + clean up.
01b,28may96,dzb  changed to 24Mhz clock speed.
01a,19apr96,tpr  written.
*/

/*
This file contains I/O addresses and related constants for the
Motorola MPC860DAB board. 
*/

#ifndef	INCdabh
#define	INCdabh

#include "drv/mem/memDev.h"
#include "drv/intrCtl/ppc860Intr.h"

#define BUS	0				/* bus-less board */
#define CPU	PPC860				/* CPU type */

#define N_SIO_CHANNELS	 	1		/* No. serial I/O channels */

#define FREQ_20_MHZ		20000000	/* 20 Mhz */
#define FREQ_25_MHZ		25000000	/* 25 Mhz */
#define FREQ_50_MHZ		50000000	/* 50 Mhz */


/* 
 * SPLL Multiplication Factor: use to set the MF bits of the PLPRCR register.
 * PLPRCR is set by sysHwInit() in sysLib.c. 
 * SPLL_FREQ_REQUESTED and CRISTAL_FREQ are defined in config.h
 */

#define SPLL_MUL_FACTOR	((SPLL_FREQ_REQUESTED / CRISTAL_FREQ) - 1)


/* 
 * SPLL Multiplication Factor to get a 20 MHZ running frequency
 */

#define SPLL_MUL_FACTOR_20MHZ	((FREQ_20_MHZ / CRISTAL_FREQ) - 1)

/*
 * SPLL Frequency - gives the SPLL real frequency divide by 2
 */

#define SPLL_FREQ	((SPLL_MUL_FACTOR + 1) * CRISTAL_FREQ)

/*
 * Baud Rate Generator Clock - gives the Baud Rate Generator Clock (BRGCLK)
 * Frequency. 
 */

/*#define BRGCLK_FREQ	(SPLL_FREQ / ( 1 << (2 * BRGCLK_DIV_FACTOR))) */
#define BRGCLK_FREQ	CRISTAL_FREQ

/* 
 * Refresh value - defines the number of BRGCLK period between two 
 * DRAM refresh cycle.
 */

#define TMBCLK_FREQ	CRISTAL_FREQ

/* define the decrementer input clock frequency */

/*#define DEC_CLOCK_FREQ	TMBCLK_FREQ */
#define DEC_CLOCK_FREQ		12500000

/* Internal Memory Map base Address */
#define INTERNAL_MEM_MAP_ADDR		0x02200000	
#define INTERNAL_MEM_MAP_SIZE		0x00010000	/* 64 K bytes */

/* Ethernet parameters */

#ifdef  INCLUDE_CPM				/* CPM ethernet driver */
#define INCLUDE_IF_USR
#define IF_USR_NAME     "cpm"                   /* device name */
#define IF_USR_ATTACH   cpmattach               /* driver attach routine */
						/* address of SCC param RAM */
#define IF_USR_ARG1     (char *) INTERNAL_MEM_MAP_ADDR + 0x3c00 
						/* address of SCC regs */
#define IF_USR_ARG2     (int)INTERNAL_MEM_MAP_ADDR + 0x0a00
#define IF_USR_ARG3     (int) IV_SCC1           /* int number for SCC1 */
						/* address of transmit BDs */
#define IF_USR_ARG4     (int) INTERNAL_MEM_MAP_ADDR + 0x2000
						/* address of receive BDs */
#define IF_USR_ARG5     (int) INTERNAL_MEM_MAP_ADDR + 0x2100
#define IF_USR_ARG6     (int) 0x20              /* number of transmit BDs */
#define IF_USR_ARG7     (int) 0x20              /* number of receive BDs */
#define IF_USR_ARG8     (int) NONE              /* allocate mem for buffers */
#endif  /* INCLUDE_CPM */


#endif /* INCdabh */