mcc.c

ANSI C 源代码 WISD MSC8101的MCC驱动程序

/****************************************************************************
* Property of Motorola, Wireless Infrastructure Systems Division
****************************************************************************
* ANSI C source code
*
* MCC Driver for WISD MSC8101 Driver Library
*
* MOTOROLA GENERAL BUSINESS INFORMATION
****************************************************************************/


/****************************************************************************
*
* MODULE NAME: mcc_demo.c  
*
*****************************************************************************
* DESCRIPTION:MCC lib - Initilisation & driver for MCC1/TDMA1 MCC2/TDMD2
*
* AUTHOR:     Jim Gilbert.
*
* VERSION:    v1.0, 20 Dec 2001.
*
* COMPILER:   Metrowerks, CodeWarrior for Starcore Release 1.0
*             IDE v4.1 Build 696.
*
* TARGET:     StarCore/MSC8101 ADS.
*
* REVISION HISTORY: initial release v0.1, 15 June 2001.
*                                   v1.0, 20 Dec  2001.
*****************************************************************************/


/*****************************************************************************
* Include files
*****************************************************************************/

#include "msc8101ads.h"
#include "msc8101.h"
#include "mcc.h"
#include <string.h>

#include "mcc_demo.h"

extern   enum e_LOOPMODES e_Loopback;

static   t_SILast stMcc1SILast;  //Stores the last MCC1 SI RAM operation to save copying whole SIRAM 
static   t_SILast stMcc2SILast;  //Stores the last MCC2 SI RAM operation to save copying whole SIRAM


/*****************************************************************************
* FUNCTION: MCC1_InitParallelPorts()
* PURPOSE:  Sets up the parallel I/O pins for MCC1 / TDMA usage
* NOTES:    None.
* ENTRY:    None
* EXIT:     None. 
*****************************************************************************/
void MCC1_InitParallelPorts(void)
{
  /* 
     Before invoking this function resetting the Parallel Ports is highly
     recommended (to clear all bits) .
  */

  t_8101IMM *pstIMM = (t_8101IMM*)IMM_BASE;  /*Pointer to internal memory*/ 

  /* Program the Port Data Registers (PDAT) */
  // no data setting neccessary
  
#if (MCC1_TDM==TDMA) //TDMA using CLK1

  /* Program the Port Special Options Registers (PSOR) */
  pstIMM->t_aIORegs[PORTA].vuliPSOR |=  0x03C00000;    //enable TDMA1
  pstIMM->t_aIORegs[PORTC].vuliPSOR &= ~0x00000001;    //enable CLK1
  /* Program the Port Data Direction Registers (PDIR) */
  pstIMM->t_aIORegs[PORTA].vuliPDIR &= ~0x03C00000;    //TDMA1 inouts
  pstIMM->t_aIORegs[PORTC].vuliPDIR &= ~0x00000001;    //CLK1 is input
  /* Program the Port Open-Drain Registers (PODR) */
  pstIMM->t_aIORegs[PORTA].vuliPODR &= ~0x03C00000;    //no open-drain
  pstIMM->t_aIORegs[PORTC].vuliPODR &= ~0x00000001;    //no open-drain
  /* Program the Port Pin Assignment Registers (PPAR) */
  pstIMM->t_aIORegs[PORTA].vuliPPAR |= 0x03C00000;     //enable TDMA1
  pstIMM->t_aIORegs[PORTC].vuliPPAR |= 0x00000001;     //enable CLK1 
  
#endif

  return;
  
}  // end MCC1_InitParallelPorts()


/*****************************************************************************
* FUNCTION: MCC2_InitParallelPorts()
* PURPOSE:  Sets up the parallel I/O pins for MCC2 / TDMB->D usage
* NOTES:    None.
* ENTRY:    None
* EXIT:     None. 
*****************************************************************************/
void MCC2_InitParallelPorts()
{
  /* 
     Before invoking this function resetting the Parallel Ports is highly
     recommended (to clear all bits) .
  */

  t_8101IMM *pstIMM = (t_8101IMM*)IMM_BASE;  /*Pointer to internal memory*/ 

  /* Program the Port Data Registers (PDAT) */
  // no data setting neccessary
  
#if (MCC2_TDM==TDMB) //TDMB using CLK5

  /* Program the Port Special Options Registers (PSOR) */
  pstIMM->t_aIORegs[PORTB].vuliPSOR |=  0x0000000F;   //enable TDMB2
  pstIMM->t_aIORegs[PORTC].vuliPSOR &= ~0x00000010;   //enable CLK5
  /* Program the Port Data Direction Registers (PDIR) */
  pstIMM->t_aIORegs[PORTB].vuliPDIR &= ~0x0000000F;   //TDMB2 inouts
  pstIMM->t_aIORegs[PORTC].vuliPDIR &= ~0x00000010;   //CLK5 is input
  /* Program the Port Open-Drain Registers (PODR) */
  pstIMM->t_aIORegs[PORTB].vuliPODR &= ~0x0000000F;   //no open-drain
  pstIMM->t_aIORegs[PORTC].vuliPODR &= ~0x00000010;   //no open-drain
  /* Program the Port Pin Assignment Registers (PPAR) */
  pstIMM->t_aIORegs[PORTB].vuliPPAR |=  0x0000000F;   //enable TDMB2
  pstIMM->t_aIORegs[PORTC].vuliPPAR |=  0x00000010;   //enable CLK5 

#endif
      
#if (MCC2_TDM==TDMC) //TDMC using CLK7
  /* Program the Port Special Options Registers (PSOR) */
  pstIMM->t_aIORegs[PORTB].vuliPSOR |=  0x000000F0;   //enable TDMC2
  pstIMM->t_aIORegs[PORTC].vuliPSOR &= ~0x00000040;   //enable CLK7
  /* Program the Port Data Direction Registers (PDIR) */
  pstIMM->t_aIORegs[PORTB].vuliPDIR &= ~0x000000F0;   //TDMC2 inouts
  pstIMM->t_aIORegs[PORTC].vuliPDIR &= ~0x00000040;   //CLK7 is input
  /* Program the Port Open-Drain Registers (PODR) */
  pstIMM->t_aIORegs[PORTB].vuliPODR &= ~0x000000F0;   //no open-drain
  pstIMM->t_aIORegs[PORTC].vuliPODR &= ~0x00000040;   //no open-drain
  /* Program the Port Pin Assignment Registers (PPAR) */
  pstIMM->t_aIORegs[PORTB].vuliPPAR |=  0x000000F0;   //enable TDMC2
  pstIMM->t_aIORegs[PORTC].vuliPPAR |=  0x00000040;   //enable CLK7 
#endif


#if (MCC2_TDM==TDMD) //TDMD uses CLK1      
  /* Program the Port Special Options Registers (PSOR) */
  pstIMM->t_aIORegs[PORTB].vuliPSOR |=  0x00000F00;   //enable TDMD2
  pstIMM->t_aIORegs[PORTC].vuliPSOR &= ~0x00000100;   //enable CLK9
  /* Program the Port Data Direction Registers (PDIR) */
  pstIMM->t_aIORegs[PORTB].vuliPDIR &= ~0x00000F00;   //TDMD2 inouts
  pstIMM->t_aIORegs[PORTC].vuliPDIR &= ~0x00000100;   //CLK9 is input
  /* Program the Port Open-Drain Registers (PODR) */
  pstIMM->t_aIORegs[PORTB].vuliPODR &= ~0x00000F00;   //no open-drain
  pstIMM->t_aIORegs[PORTC].vuliPODR &= ~0x00000100;   //no open-drain
  /* Program the Port Pin Assignment Registers (PPAR) */
  pstIMM->t_aIORegs[PORTB].vuliPPAR |=  0x00000F00;   //enable TDMD2
  pstIMM->t_aIORegs[PORTC].vuliPPAR |=  0x00000100;   //enable CLK9 
#endif

  return;
  
}  // end MCC2_InitParallelPorts()


/*****************************************************************************
* FUNCTION: MCC1_InitGlobal()
* PURPOSE:  Initialise MCC1 Global Parameters
* NOTES:    None.
* ENTRY:    None
* EXIT:     None. 
*****************************************************************************/
void MCC1_InitGlobal(void)
{
  //establish pointer:
  t_8101IMM       *pstIMM;
  t_Mcc1BDRings   *pstMcc1;
  t_MCCPRAM       *pstMccGlobal;
    
  pstIMM  = (t_8101IMM*)IMM_BASE;  /*Pointer to internal memory*/ 
  pstMcc1 = (t_Mcc1BDRings*)(MCC1_BDRINGS_BASE);    

  //Global parameters:
  pstMccGlobal = (t_MCCPRAM * ) &(pstIMM->u_PRAM.t_Serials.astMCCPRAM[MCC1]); //set ptr.
  memset(pstMccGlobal, 0, 128); //clear 128 Bytes of global ParameterRam
  
  pstMccGlobal->vuliMCCBase   = MCC1_BDRINGS_BASE;           //base of BDs used by MCC1
  pstMccGlobal->vusiMCCState  = 0x0000; 
  pstMccGlobal->vusiMRBLR     = 0xFFFF;                      //not used here -> max. value
  pstMccGlobal->vusiGRFThr    = 0x0000;                      //Irq on all RXF buffer events
  pstMccGlobal->vusiGRFCnt    = pstMccGlobal->vusiGRFThr;    //grfthr decrementer
  pstMccGlobal->vuliRIntTmp   = 0x00000000;
  pstMccGlobal->vuliData0     = 0x00000000;
  pstMccGlobal->vuliData1     = 0x00000000;
  pstMccGlobal->vuliTIntBase  = MCC1_TINT_BASE;              //base of TINT irq circ. tab.
  pstMccGlobal->vuliTIntPtr   = pstMccGlobal->vuliTIntBase;  //current TINT ptr
  pstMccGlobal->vuliTIntTmp   = 0x00000000;                  //must be cleared by user   
  pstMccGlobal->vusiSCTPBase  = 0x0000;                      //base of superchannel table 
  pstMccGlobal->vuliCMask32   = 0xDEBB20E3;                  //32 bit crc constant
  pstMccGlobal->vusiXtraBase  = MCC1_XTRABASE;               //base of chan. extra params
  pstMccGlobal->vusiCMask16   = 0xF0B8;                      //16 bit crc constant
  pstMccGlobal->vuliRIntTmp0  = 0x00000000;                  //must be cleared by user
  pstMccGlobal->vuliRIntTmp1  = 0x00000000;                  //must be cleared by user
  pstMccGlobal->vuliRIntTmp2  = 0x00000000;                  //must be cleared by user
  pstMccGlobal->vuliRIntTmp3  = 0x00000000;                  //must be cleared by user
  pstMccGlobal->vuliRIntBase0 = MCC1_RINT0_BASE;             //base of RINT0 irq circ. tab
  pstMccGlobal->vuliRIntPtr0  = pstMccGlobal->vuliRIntBase0; //current RINT0 ptr
  pstMccGlobal->vuliRIntBase1 = MCC1_RINT1_BASE;             //base of RINT1 irq circ. tab
  pstMccGlobal->vuliRIntPtr1  = pstMccGlobal->vuliRIntBase1; //current RINT1 ptr
  pstMccGlobal->vuliRIntBase2 = MCC1_RINT2_BASE;             //base of RINT2 irq circ. tab
  pstMccGlobal->vuliRIntPtr2  = pstMccGlobal->vuliRIntBase2; //current RINT2 ptr
  pstMccGlobal->vuliRIntBase3 = MCC1_RINT3_BASE;             //base of RINT3 irq circ. tab
  pstMccGlobal->vuliRIntPtr3  = pstMccGlobal->vuliRIntBase3; //current RINT3 ptr

  pstIMM->t_aSIRegs[MCC1].vucMCCF = 0x00; //selected TDMA uses all channels 0-128
  
  //reset buffer descriptor rings:
  memset(pstMcc1,0,sizeof(t_Mcc1BDRings));

  /*
    set CP command register (CPCR) to initialize the MCC1 channel FIFOs:
    
    bit00    : software reset of CP   = 0        => no reset
    bit01-05 : param. RAM page number = 00111    => offset 0x8700 (MCC1 Param.Ram)
    bit06-10 : sub-block code         = 11100    => sub-block code for MCC1
    bit11-14 : reserved               = 0000
    bit15    : command semaphore flag = 1        => CP is processing a cmd
    bit16-17 : reserved               = 00
    bit18-25 : MCC channel number     = 00000000 => MCC channels 0-31
    bit26-27 : reserved               = 00
    bit28-31 : Opcode                 = 0000     => Init Tx and Rx FIFOs
  */

  while (pstIMM->vuliCPCR & 0x00010000); //wait until CP is ready to receive new cmd
  pstIMM->vuliCPCR = 0x1F810000;

  return;
}


/*****************************************************************************
* FUNCTION: MCC2_InitGlobal()
* PURPOSE:  Initialise MCC2 Global Parameters
* NOTES:    None.
* ENTRY:    None
* EXIT:     None. 
*****************************************************************************/
void MCC2_InitGlobal(void)
{

  //establish pointer:
  t_8101IMM       *pstIMM;
  t_Mcc2BDRings   *pstMcc2;
  t_MCCPRAM       *pstMccGlobal;
  Word16          i;
    
  pstIMM  = (t_8101IMM*)IMM_BASE;  /*Pointer to internal memory*/ 
  pstMcc2 = (t_Mcc2BDRings*)(MCC2_BDRINGS_BASE);    

  //Global parameters:
  pstMccGlobal = (t_MCCPRAM * ) &(pstIMM->u_PRAM.t_Serials.astMCCPRAM[MCC2]); //set ptr.
  memset(pstMccGlobal, 0, 128); //clear 128 Bytes of global ParameterRam
    
  pstMccGlobal->vuliMCCBase   = MCC2_BDRINGS_BASE;           //base of BDs used by MCC2
  pstMccGlobal->vusiMCCState  = 0x0000; 
  pstMccGlobal->vusiMRBLR     = 0xFFFF;                      //not used here -> max. value
  pstMccGlobal->vusiGRFThr    = 0x0000;                      //Irq on all RXF buffer events
  pstMccGlobal->vusiGRFCnt    = pstMccGlobal->vusiGRFThr;    //grfthr decrementer
  pstMccGlobal->vuliRIntTmp   = 0x00000000;
  pstMccGlobal->vuliData0     = 0x00000000;
  pstMccGlobal->vuliData1     = 0x00000000;
  pstMccGlobal->vuliTIntBase  = MCC2_TINT_BASE;              //base of TINT irq circ. tab.
  pstMccGlobal->vuliTIntPtr   = pstMccGlobal->vuliTIntBase;  //current TINT ptr
  pstMccGlobal->vuliTIntTmp   = 0x00000000;                  //must be cleared by user   
  pstMccGlobal->vusiSCTPBase  = 0x0000;                      //base of superchannel table 
  pstMccGlobal->vuliCMask32   = 0xDEBB20E3;                  //32 bit crc constant
  pstMccGlobal->vusiXtraBase  = MCC2_XTRABASE-128*8;         //base of chan. extra params
  pstMccGlobal->vusiCMask16   = 0xF0B8;                      //16 bit crc constant
  pstMccGlobal->vuliRIntTmp0  = 0x00000000;                  //must be cleared by user
  pstMccGlobal->vuliRIntTmp1  = 0x00000000;                  //must be cleared by user
  pstMccGlobal->vuliRIntTmp2  = 0x00000000;                  //must be cleared by user
  pstMccGlobal->vuliRIntTmp3  = 0x00000000;                  //must be cleared by user
  pstMccGlobal->vuliRIntBase0 = MCC2_RINT0_BASE;             //base of RINT0 irq circ. tab
  pstMccGlobal->vuliRIntPtr0  = pstMccGlobal->vuliRIntBase0; //current RINT0 ptr
  pstMccGlobal->vuliRIntBase1 = MCC2_RINT1_BASE;             //base of RINT1 irq circ. tab
  pstMccGlobal->vuliRIntPtr1  = pstMccGlobal->vuliRIntBase1; //current RINT1 ptr
  pstMccGlobal->vuliRIntBase2 = MCC2_RINT2_BASE;             //base of RINT2 irq circ. tab
  pstMccGlobal->vuliRIntPtr2  = pstMccGlobal->vuliRIntBase2; //current RINT2 ptr
  pstMccGlobal->vuliRIntBase3 = MCC2_RINT3_BASE;             //base of RINT3 irq circ. tab
  pstMccGlobal->vuliRIntPtr3  = pstMccGlobal->vuliRIntBase3; //current RINT3 ptr


  for (i=0; i<(MCC2_SI_ENTRIES/32); i++)
  {
    pstIMM->t_aSIRegs[MCC2].vucMCCF |= (MCC2_TDM << 6) >> (i*2); //group 1 of MCC2 (ch 128-159) uses TDM_D 
  }
  
  //reset buffer descriptor rings:
  memset(pstMcc2,0,sizeof(t_Mcc2BDRings));

  /*
    set CP command register (CPCR) to initialize the MCC2 channel FIFOs:
    
    bit00    : software reset of CP   = 0        => no reset
    bit01-05 : param. RAM page number = 01000    => offset 0x8800 (MCC2 Param.Ram)
    bit06-10 : sub-block code         = 11101    => sub-block code for MCC2 
    bit11-14 : reserved               = 0000
    bit15    : command semaphore flag = 1        => CP is processing a cmd
    bit16-17 : reserved               = 00
    bit18-25 : MCC channel number     = 10000000 => MCC channels 128-159
    bit26-27 : reserved               = 00
    bit28-31 : Opcode                 = 0000     => Init Tx and Rx FIFOs
  */

  while (pstIMM->vuliCPCR & 0x00010000); //wait until CP is ready to receive new cmd
  pstIMM->vuliCPCR = 0x23A12000;

  return;
}