ac97_sport.h

Blackfin AC97 Interface driver

/*
 * File:         ac97_sport.c 
 * Description:  low level driver for ac97 connected to sportX/dmaY on blackfin 53x
 * 
 * Rev:          $Id: ac97_sport.h,v 1.1 2004/11/05 04:13:52 lgsoft Exp $
 * Created:      Sat Dec  6 21:40:06 CET 2003
 * Author:       Luuk van Dijk, Bas Vermeulen
 * mail:         [e-mail]
 * 
 * Copyright (C) 2003 Luuk van Dijk, Bas Vermeulen BuyWays B.V.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2, or (at your option)
 * any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; see the file COPYING.
 * If not, write to the Free Software Foundation,
 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 */


/*
 * SYNOPSIS:
 *  
 *  static struct ac97_sport_dev_t* dev=NULL;
 *
 *  // install a handler before opening the device!
 *  void ivg9handler(void){ if(dev) ac97_sport_handle_irq(dev); }
 *  
 *  install_interrupt_handler( IVG9, ivghandler );
 *   NOTE: this must enable the interrupt in the IMASK /and/ the SIC_IMASK
 *
 *  
 *  dev = ac97_sport_open(bufsize); 
 *  ac97_sport_start|stop(dev);
 *  ac97_sport_close(dev);
 *
 *  void ac97_sport_set_talktrough_mode(struct ac97_sport_dev_t* dev);
 *  set to talktrougth testing mode: rxbuf = txbuf, and init mixer
 *
 *  int    result = ac97_sport_set_register(dev, int register, uint16_t value);
 *  int    value  = ac97_sport_get_register(dev, int register);
 *
 *  //  negative get value means register cache is (still) dirty
 *
 *  int result = ac97_sport_put_pcm_from_user(dev, uint16_t* pcmdata, size_t len)
 *  int result = ac97_sport_get_pcm_to_user( dev, uint16_t* pcmdata, size_t len)
 *
 *  result = 0 (ok), EAGAIN or copy_to/from_user result code
 * 
 * 
 */
#ifndef AC97_SPORT_H
#define  AC97_SPORT_H
#include <asm/dma.h>



                                           // conections on concert 97
#define  AC97_RESET              0x00      // Writing any value to this register performs a register reset, which causes all registers to revert to their
																					//default values.
#define  AC97_MASTER_VOL_STEREO  0x02      // Line Out
#define  AC97_HEADPHONE_VOL      0x04      // 
#define  AC97_MASTER_VOL_MONO    0x06      // TAD Output
#define  AC97_MASTER_TONE        0x08      //
#define  AC97_PCBEEP_VOL         0x0a      // none
#define  AC97_PHONE_VOL          0x0c      // TAD Input (mono)
#define  AC97_MIC_VOL            0x0e      // MIC Input (mono)
#define  AC97_LINEIN_VOL         0x10      // Line Input (stereo)
#define  AC97_CD_VOL             0x12      // CD Input (stereo)
#define  AC97_VIDEO_VOL          0x14      // none
#define  AC97_AUX_VOL            0x16      // Aux Input (stereo)
#define  AC97_PCMOUT_VOL         0x18      // Wave Output (stereo)
#define  AC97_RECORD_SELECT      0x1a      //
#define  AC97_RECORD_GAIN        0x1c
#define  AC97_RECORD_GAIN_MIC    0x1e
#define  AC97_GENERAL_PURPOSE    0x20
#define  AC97_3D_CONTROL         0x22
#define  AC97_MODEM_RATE         0x24
#define  AC97_POWER_CONTROL      0x26

// AC97-2.0 registers
#define  AC97_EXT_AUDIO_ID       0x28				
#define  AC97_EXT_AUDIO_CTRL     0x2a	
#define  AC97_PCM_FRONT_RATE     0x2c	
#define  AC97_PCM_SURR_RATE      0x2e
#define  AC97_PCM_LFE_RATE       0x30
#define  AC97_PCM_LR_RATE        0x32
#define  AC97_MIC_RATE           0x34
#define  AC97_6CH_VOL_CLFE       0x36
#define  AC97_6CH_VOL_LRSURR     0x38	

// Modem registers from 0x3C to 0x58 (next 15 enums)

// registers 0x5a - 0x7a are vendor reserved
#define  AC97_MIXER_VOL			 0x72
//ad1985
#define	CODEC_J_SENSE_AUDIO_STATUS	0x72
#define	CODEC_SERIAL_CONFIGURATION	0x74
#define	CODEC_MISC_CONTROL_BITS		0x76

#define  AC97_VENDOR_ID1         0x7C
#define  AC97_VENDOR_ID2         0x7E

// Known AC97 codec vendors
#define AC97_VENDOR_CRYSTAL      0x43525900  // Crystal Semicondutor "CRY"
#define AC97_VENDOR_TRITECH      0x54524100  // TriTech "TRA"
#define AC97_VENDOR_AKM          0x414B4D00  // Asahi Kasei "AKM"
#define AC97_VENDOR_SIGMATEL     0x83847600  // SigmaTel


// volume control bit defines
#define AC97_MUTE								0x8000
#define AC97_MUTE_HI             0x80
#define AC97_MUTE_LO			 0x00
#define AC97_MICBOOST_HI         0x00
#define AC97_MICBOOST_LO         0x40
#define AC97_LEFTVOL_HI          0x07
#define AC97_LEFTVOL_LO          0x3f
#define AC97_RIGHTVOL_HI         0x3f
#define AC97_RIGHTVOL_LO         0x07
#define AC97_FULLVOL_HI          0x07
#define AC97_FULLVOL_LO          0x07

#define AC97_MIXER_HI			 0x1f
#define AC97_RECGAIN	         0x0f

// record mux defines

#define AC97_RECMUX_MIC          0x0000
#define AC97_RECMUX_CD           0x0001
#define AC97_RECMUX_VIDEO        0x0002      // not used
#define AC97_RECMUX_AUX          0x0003      
#define AC97_RECMUX_LINE         0x0004      
#define AC97_RECMUX_STEREO_MIX   0x0005
#define AC97_RECMUX_MONO_MIX     0x0006
#define AC97_RECMUX_PHONE        0x0007

// sample rate defines
#define AC97_SAMPLERATE_8000		8000
#define AC97_SAMPLERATE_16000		16000
#define AC97_SAMPLERATE_32000		32000
#define AC97_SAMPLERATE_48000		48000
// general purpose register bit defines

#define AC97_GP_LPBK             0x0080      // Loopback mode
#define AC97_GP_MS               0x0100      // Mic Select 0=Mic1, 1=Mic2
#define AC97_GP_MIX              0x0200      // Mono output select 0=Mix, 1=Mic
#define AC97_GP_RLBK             0x0400      // Remote Loopback - Modem line codec
#define AC97_GP_LLBK             0x0800      // Local Loopback - Modem Line codec
#define AC97_GP_LD               0x1000      // Loudness 1=on
#define AC97_GP_3D               0x2000      // 3D Enhancement 1=on
#define AC97_GP_ST               0x4000      // Stereo Enhancement 1=on
#define AC97_GP_POP              0x8000      // Pcm Out Path, 0=pre 3D, 1=post 3D


// powerdown control and status bit defines

// status
#define AC97_PWR_MDM             0x0010      // Modem section ready
#define AC97_PWR_REF             0x0008      // Vref nominal
#define AC97_PWR_ANL             0x0004      // Analog section ready
#define AC97_PWR_DAC             0x0002      // DAC section ready
#define AC97_PWR_ADC             0x0001      // ADC section ready

// control
#define AC97_PWR_PR0             0x0100      // ADC and Mux powerdown
#define AC97_PWR_PR1             0x0200      // DAC powerdown
#define AC97_PWR_PR2             0x0400      // Output mixer powerdown (Vref on)
#define AC97_PWR_PR3             0x0800      // Output mixer powerdown (Vref off)
#define AC97_PWR_PR4             0x1000      // AC-link powerdown
#define AC97_PWR_PR5             0x2000      // Internal Clk disable
#define AC97_PWR_PR6             0x4000      // HP amp powerdown
#define AC97_PWR_PR7             0x8000      // Modem off - if supported

// useful power states
#define AC97_PWR_D0              0x0000      // everything on
#define AC97_PWR_D1              AC97_PWR_PR0|AC97_PWR_PR1|AC97_PWR_PR4
#define AC97_PWR_D2              AC97_PWR_PR0|AC97_PWR_PR1|AC97_PWR_PR2|AC97_PWR_PR3|AC97_PWR_PR4
#define AC97_PWR_D3              AC97_PWR_PR0|AC97_PWR_PR1|AC97_PWR_PR2|AC97_PWR_PR3|AC97_PWR_PR4
#define AC97_PWR_ANLOFF          AC97_PWR_PR2|AC97_PWR_PR3  //analog section off
//Miscellaneous Control Bits
#define AD1985_MCB_DACZ			0x8000
#define AD1985_MCB_AC97NC		0x4000
#define AD1985_MCB_MSPLT		0x2000
#define AD1985_MCB_LODIS		0x1000
#define AD1985_MCB_CLDIS		0x0800
#define AD1985_MCB_HPSEL		0x0400
#define AD1985_MCB_DMIX1		0x0200
#define AD1985_MCB_DMIX0		0x0100
#define AD1985_MCB_SPRD			0x0080
#define AD1985_MCB_2CMIC		0x0040
#define AD1985_MCB_LOSEL		0x0020
#define AD1985_MCB_SRU			0x0010
#define AD1985_MCB_VREFH		0x0008
#define AD1985_MCB_VREFD		0x0004
#define AD1985_MCB_MBG1			0x0002
#define AD1985_MCB_MBG0			0x0001

enum _phonemode
{
	AUDIO_PHONE_IDEL = 0,
	AUDIO_PHONE_PSTNPHONE,
	AUDIO_PHONE_NETPHONE,
	AUDIO_PHONE_NETPSTN,
	AUDIO_PHONE_NETPSTNPHONE,
	AUDIO_PHONE_TONE
};

#define TX48K_BUFFER 			10
#define TX48K_BUFFERSIZE 	480
#define AC97_BUFFER_SIZE TX48K_BUFFER * TX48K_BUFFERSIZE

#define AUDIO_AC97_BUFFER_SIZE 	80	
//#define MAX_AUDIO_BUFFER 	20
//PPV 17MARCH2006
#define MAX_AUDIO_BUFFER        9//21
//#define MAX_AUDIO_BUFFER        36
#define BLOCKSIZE 		AUDIO_AC97_BUFFER_SIZE
#define AC97_BUFFER_SIZE_8K MAX_AUDIO_BUFFER*AUDIO_AC97_BUFFER_SIZE 		//for ec  

typedef struct ac97_cmd_t
{
	unsigned short reg;
	unsigned short value;
} _ac97_cmd_t;
#define CMDQUEUE_LEN 128
typedef struct ac97_cmd_queue_t
{
	_ac97_cmd_t cmd_buffer[CMDQUEUE_LEN];
	unsigned char head,tail;
} _ac97_cmd_queue_t;
/* 
 * frame communicated over the ac97 sport link
 */

#define TAG_VALID 0x8000
#define TAG_CMD   0x6000
#define TAG_PCM_LEFT   0x1000
#define TAG_PCM_RIGHT  0x0800
#define TAG_PCM  (TAG_PCM_LEFT | TAG_PCM_RIGHT )
/*
#define TAG_VALID 0x8000
#define TAG_CMD   0x6000
#define TAG_PCM_LEFT   0x1000
#define TAG_PCM_RIGHT  0x0800
#define TAG_PCM  (TAG_PCM_LEFT|TAG_PCM_RIGHT)
*/
struct ac97_frame 
{
	__u16 ac97_tag;   // slot 0
	__u16 ac97_addr;  // slot 1
	__u16 ac97_addr4_data12;  // slot 2 
	__u16 ac97_cmddataL8_pcmleftH8;
	__u16 ac97_pcmleft12_pcmright4;
	__u16 ac97_pcmright16;  // pad to 16 words
} __attribute__ ((packed));



#define FRAG_NUM 3
#define FRAG_SIZE 480

//#define AC97_BUFFER_SIZE AC97_BUFFER_SIZE_8K * 6
#define  FRAG_SIZE_8K  FRAG_SIZE/6

struct ac97_sport_dev_t 
{

	//dma buffer
//	struct ac97_frame txbuf[FRAG_NUM][FRAG_SIZE];
//	struct ac97_frame rxbuf[FRAG_NUM][FRAG_SIZE];	

	struct ac97_frame *txbuf;
	struct ac97_frame *rxbuf;		
	
	int codec_ready;        // we received frames with the 'valid' bit set
	int codec_initialized;  // we sent the ac97 initialization

	wait_queue_head_t audio_in_wait;
	wait_queue_head_t audio_out_wait;

	__u16 register_cache[128];     // ac97 register cache
	__u16 register_dirty[128/16];  // flag: clear when read-back after write happened
	
	spinlock_t    aC97_lock;
};
/*
 * since we can have only 1 device in the b533 I removed the dev argument
 * and made it a static variable in ac97_sport.c 
 * -- lvd 2004/01/09
 */

// struct ac97_sport_dev_t;
#if 0
extern struct ac97_sport_dev_t dev;
extern short rx_8kbuf_r[AC97_BUFFER_SIZE_8K];
extern short tx_8kbuf_r[AC97_BUFFER_SIZE_8K];
extern short rx_8kbuf_l[AC97_BUFFER_SIZE_8K];
extern short tx_8kbuf_l[AC97_BUFFER_SIZE_8K];
extern unsigned char phonemode;
// bufsize: in units of ac97 frames
extern int  ac97_sport_open();

extern void ac97_sport_set_talkthrough_mode(void);

extern void ac97_sport_close(void);

// interrupt handlers
extern int ac97_sport_handle_rx(void);
extern int ac97_sport_handle_tx(void);


// these functions return -EAGAIN if the cmdfifo is full or the cache is still dirty
// and -EINVAL if reg not even and between 0 and 127
// 0 means ok.

extern int  ac97_sport_set_register(uint16_t reg, uint16_t val);


//ssize_t ac97_sport_put_pcm_from_user(uint32_t* pcmdata, size_t len);
//ssize_t ac97_sport_get_pcm_to_user(  uint32_t* pcmdata, size_t len);
extern ssize_t ac97_audio_write(const uint16_t* pcmdata, size_t len);
extern ssize_t ac97_audio_read(uint16_t* pcmdata, size_t len);

extern int ac97_audio_read_min_bytes(void);
extern int ac97_audio_write_max_bytes(void);

extern int ac97_wait_for_audio_read_with_timeout(unsigned long timeout);
extern int ac97_wait_for_audio_write_with_timeout(unsigned long timeout);


extern wait_queue_head_t* ac97_get_read_waitqueue(void);
extern wait_queue_head_t* ac97_get_write_waitqueue(void);

extern void ac97_sport_silence(void);

extern void ac97_sport_start(void);
extern void ac97_sport_stop(void);
#define NTC
#endif
extern void ac97_set_sample_rate(unsigned int rate);
#endif