rc5keyexp.vhd

rc5 key expansion algorithm implementation in vhdl, using state machine too. use ieee papers for mor

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-- Company: 
-- Engineer: 
-- 
-- Create Date:    14:44:18 03/04/2009 
-- Design Name: 
-- Module Name:    rc5keyexp - Behavioral 
-- Project Name: 
-- Target Devices: 
-- Tool versions: 
-- Description: 
--
-- Dependencies: 
--
-- Revision: 
-- Revision 0.01 - File Created
-- Additional Comments: 
--
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LIBRARY	IEEE;
USE	IEEE.STD_LOGIC_1164.ALL;

PACKAGE rc5_pkg IS
   TYPE   S_ARRAY IS ARRAY (0 TO 25) OF STD_LOGIC_VECTOR (31 DOWNTO 0);
   TYPE   L_ARRAY IS ARRAY (0 TO 3) OF STD_LOGIC_VECTOR (31 DOWNTO 0);
END rc5_pkg;

---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;



LIBRARY	IEEE;
USE	IEEE.STD_LOGIC_1164.ALL;
USE	WORK.RC5_PKG.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;


ENTITY key_exp IS
    PORT
    (
        clr, clk	: IN STD_LOGIC;
        key_in	: IN STD_LOGIC;
        ukey	: IN STD_LOGIC_VECTOR(127 DOWNTO 0);
        skey	: OUT S_ARRAY;
        key_rdy	: OUT STD_LOGIC
    );
END key_exp;




architecture rtl of key_exp is
    
    signal i_cnt : std_logic_vector(4 downto 0);
    signal j_cnt : std_logic_vector (1 downto 0);
    signal k_cnt : std_logic_vector (6 downto 0);
    signal a_tmp1:std_logic_vector (31 downto 0);
  -- signal skey  : std_logic_vector (31 downto 0);
    signal a_tmp2 : std_logic_vector (31 downto 0);
    signal a_reg  : std_logic_vector (31 downto 0);
  -- B registers
    signal b_tmp1 : std_logic_vector (31 downto 0);
    signal b_tmp2 : std_logic_vector (31 downto 0);
    signal b_reg : std_logic_vector (31 downto 0);
    
    signal ab_tmp : std_logic_vector(31 downto 0);
    signal s_arr_tmp: work.rc5_pkg.S_ARRAY;
    signal l_arr : work.rc5_pkg.L_ARRAY;
    
    
    
TYPE     StateType IS (ST_IDLE, ST_KEY_IN, ST_KEY_EXP, ST_READY);
SIGNAL	state : StateType;


    begin
    
a_tmp1 <= s_arr_tmp(conv_integer(i_cnt)) + a_reg + b_reg;
-- LEFT ROTATE BY 3
a_tmp2<=a_tmp1(28 DOWNTO 0) & a_tmp1(31 DOWNTO 29); 
ab_tmp<=a_tmp2 + b_reg;
b_tmp1<=l_arr(conv_integer(j_cnt)) + ab_tmp;

WITH ab_tmp(4 DOWNTO 0) SELECT
  b_tmp2<= 
   b_tmp1(30 DOWNTO 0) & b_tmp1(31) WHEN "00001",
   b_tmp1(29 DOWNTO 0) & b_tmp1(31 DOWNTO 30) WHEN "00010",
   b_tmp1(28 DOWNTO 0) & b_tmp1(31 DOWNTO 29) WHEN "00011",
   b_tmp1(27 DOWNTO 0) & b_tmp1(31 DOWNTO 28) WHEN "00100",
   b_tmp1(26 DOWNTO 0) & b_tmp1(31 DOWNTO 27) WHEN "00101",
   b_tmp1(25 DOWNTO 0) & b_tmp1(31 DOWNTO 26) WHEN "00110",
   b_tmp1(24 DOWNTO 0) & b_tmp1(31 DOWNTO 25) WHEN "00111",
   b_tmp1(23 DOWNTO 0) & b_tmp1(31 DOWNTO 24) WHEN "01000",
   b_tmp1(22 DOWNTO 0) & b_tmp1(31 DOWNTO 23) WHEN "01001",
   b_tmp1(21 DOWNTO 0) & b_tmp1(31 DOWNTO 22) WHEN "01010",
   b_tmp1(20 DOWNTO 0) & b_tmp1(31 DOWNTO 21) WHEN "01011",
   b_tmp1(19 DOWNTO 0) & b_tmp1(31 DOWNTO 20) WHEN "01100",
   b_tmp1(18 DOWNTO 0) & b_tmp1(31 DOWNTO 19) WHEN "01101",
   b_tmp1(17 DOWNTO 0) & b_tmp1(31 DOWNTO 18) WHEN "01110",
   b_tmp1(16 DOWNTO 0) & b_tmp1(31 DOWNTO 17) WHEN "01111",
   b_tmp1(15 DOWNTO 0) & b_tmp1(31 DOWNTO 16) WHEN "10000",
   b_tmp1(14 DOWNTO 0) & b_tmp1(31 DOWNTO 15) WHEN "10001",
   b_tmp1(13 DOWNTO 0) & b_tmp1(31 DOWNTO 14) WHEN "10010",
   b_tmp1(12 DOWNTO 0) & b_tmp1(31 DOWNTO 13) WHEN "10011",
   b_tmp1(11 DOWNTO 0) & b_tmp1(31 DOWNTO 12) WHEN "10100",
   b_tmp1(10 DOWNTO 0) & b_tmp1(31 DOWNTO 11) WHEN "10101",
   b_tmp1(9 DOWNTO 0) & b_tmp1(31 DOWNTO 10) WHEN "10110",
   b_tmp1(8 DOWNTO 0) & b_tmp1(31 DOWNTO 9) WHEN "10111",
   b_tmp1(7 DOWNTO 0) & b_tmp1(31 DOWNTO 8) WHEN "11000",
   b_tmp1(6 DOWNTO 0) & b_tmp1(31 DOWNTO 7) WHEN "11001",
   b_tmp1(5 DOWNTO 0) & b_tmp1(31 DOWNTO 6) WHEN "11010",
   b_tmp1(4 DOWNTO 0) & b_tmp1(31 DOWNTO 5) WHEN "11011",   
   b_tmp1(3 DOWNTO 0) & b_tmp1(31 DOWNTO 4) WHEN "11100",
   b_tmp1(2 DOWNTO 0) & b_tmp1(31 DOWNTO 3) WHEN "11101",
   b_tmp1(1 DOWNTO 0) & b_tmp1(31 DOWNTO 2) WHEN "11110",
   

  b_tmp1(0) & b_tmp1(31 DOWNTO 1)   WHEN "11111",
  b_tmp1   WHEN OTHERS;

-- STATE MACHINE

  PROCESS(clr, clk)	  
     BEGIN
       IF(clr='0') THEN
           state<=ST_IDLE;
       ELSIF(clk'EVENT AND clk='1') THEN
           CASE state IS
              WHEN ST_IDLE | ST_READY=>
                  	IF(key_in='1') THEN  state<=ST_KEY_IN;   END IF;
              WHEN ST_KEY_IN=> 
		state<=ST_KEY_EXP;  
              WHEN ST_KEY_EXP=> 
		IF(k_cnt="1001101") THEN   state<=ST_READY;  END IF;
          END CASE;
        END IF;
  END PROCESS;            


-- A REGISTER

    PROCESS(clr, clk)  BEGIN
        IF(clr='0') THEN
           a_reg <= (others => '0');
        ELSIF(clk'EVENT AND clk='1') THEN
           IF(state=ST_KEY_EXP) THEN   a_reg<=a_tmp2;
           END IF;
        END IF;
    END PROCESS;
    
    
    -- B register
    PROCESS(clr, clk)  BEGIN
        IF(clr='0') THEN
           b_reg <= (others => '0');
			  ELSIF(clk'EVENT AND clk='1') THEN
           IF(state=ST_KEY_EXP) THEN   b_reg<=b_tmp2;
           END IF;
        END IF;
    END PROCESS;   


 --  MOD 26 COUNTER

PROCESS(clr, clk)   
 BEGIN
    IF(clr='0') THEN  i_cnt<="00000";
    ELSIF(clk'EVENT AND clk='1') THEN
       IF(state=ST_KEY_EXP) THEN
         IF(i_cnt="11001") THEN   i_cnt<="00000";
         ELSE   i_cnt<=i_cnt+1;
         END IF;
       END IF;
    END IF;
 END PROCESS;


-- MOD 4 COUNTER
PROCESS(clr, clk) 
 BEGIN
    IF(clr='0') THEN  j_cnt<="00";
    ELSIF(clk'EVENT AND clk='1') THEN
       IF(state=ST_KEY_EXP) THEN
         IF(j_cnt="11") THEN   j_cnt<="00";
         ELSE   j_cnt<=j_cnt+1;
         END IF;
       END IF;
    END IF;
 END PROCESS;
 
 process (clr,clk)  --counter
     begin
         if(clr='0') then k_cnt<="0000000";
         elsif(clk'EVENT AND clk='1') THEN
             IF(state=ST_KEY_EXP)THEN
                 IF(k_cnt="1001101") then k_cnt<="0000000";
                 ELSE k_cnt<=k_cnt+1;
             end if;
         end if;
     end if;
 end process;            
             





 PROCESS(clr, clk)  
 BEGIN
   IF(clr='0') THEN	 -- After system reset, S array is initialized with P and Q
      s_arr_tmp(0) <= X"b7e15163"; s_arr_tmp(1) <= X"5618cb1c";s_arr_tmp(2) <= X"f45044d5";
		s_arr_tmp(3) <= X"9287be8e";s_arr_tmp(4) <= X"30bf3847";s_arr_tmp(5) <= X"cef6b200";
		s_arr_tmp(6) <= X"6d2e2bb9";s_arr_tmp(7) <= X"0b65a572";s_arr_tmp(8) <= X"a99d1f2b";
		s_arr_tmp(9) <= X"47d498e4";s_arr_tmp(10) <= X"e60c129d";s_arr_tmp(11) <= X"84438c56";
		s_arr_tmp(12) <= X"227b060f";s_arr_tmp(13) <= X"c0b27fc8";s_arr_tmp(14) <= X"5ee9f981";
		s_arr_tmp(15) <= X"fd21733a";s_arr_tmp(16) <= X"9b58ecf3";s_arr_tmp(17) <= X"399066ac";
		s_arr_tmp(18) <= X"d7c7e065";s_arr_tmp(19) <= X"75ff5a1e";s_arr_tmp(20) <= X"1436d3d7";
		s_arr_tmp(21) <= X"b26e4d90";s_arr_tmp(22) <= X"50a5c749";s_arr_tmp(23) <= X"eedd4102";
		s_arr_tmp(24) <= X"8d14babb";s_arr_tmp(25) <= X"2b4c3474";

   ELSIF(clk'EVENT AND clk='1') THEN
     IF(state=ST_KEY_EXP) THEN   s_arr_tmp(conv_integer(i_cnt)) <= a_tmp2;
     END IF;
   END IF;
 --  end if;
 END PROCESS;
 skey <= s_arr_tmp; -- ONLY ON CLR





PROCESS(clr, clk)
   BEGIN
     IF(clr='0') THEN
        l_arr(0)<="00000000000000000000000000000000";
          l_arr(1)<="00000000000000000000000000000000";
            l_arr(2)<="00000000000000000000000000000000";
              l_arr(3)<="00000000000000000000000000000000";
     ELSIF(clk'EVENT AND clk='1') THEN
        IF(state=ST_KEY_IN) THEN
           l_arr(0)<=ukey(31 DOWNTO 0);
          l_arr(1)<=ukey(63 DOWNTO 32);
          l_arr(2)<=ukey(95 DOWNTO 64);
          l_arr(3)<=ukey(127 DOWNTO 96);
        ELSIF(state=ST_KEY_EXP) THEN
           l_arr(conv_integer(j_cnt))<=b_tmp2;
        END IF;
     END IF;
  END PROCESS;

end rtl;